ZXM41N10FTA [DIODES]

Transistor,;
ZXM41N10FTA
型号: ZXM41N10FTA
厂家: DIODES INCORPORATED    DIODES INCORPORATED
描述:

Transistor,

文件: 总2页 (文件大小:87K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Obsolete. Alternative is BSS123.  
ZXM41N10F  
SOT23 N-CHANNEL ENHANCEMENT MODE VERTICAL D MOSFET  
FEATURES  
BVDSS = 100V  
Low Threshold  
DEVICE MARKING  
410  
ABSOLUTE MAXIMUM RATINGS  
PINOUT TOP VIEW  
SOT23  
PARAMETER  
SYMBOL  
VALUE  
100  
UNIT  
Drain-source voltage  
Drain-gate voltage  
V
V
V
V
DS  
100  
DGR  
Continuous drain current at T  
Pulsed drain current  
=25°C  
I
I
170  
mA  
mA  
V
amb  
D
680  
DM  
Gate-source voltage  
V
P
± ±0  
GS  
tot  
Power dissipation at T  
=25°C  
360  
mW  
°C  
amb  
Operating and storage temperature range  
T :T  
-55 to +150  
j
stg  
ELECTRICAL CHARACTERISTICS (at T  
= 25°C unless otherwise stated)  
amb  
PARAMETER  
SYMBOL MIN.  
TYP.  
MAX.  
UNIT CONDITIONS  
Drain-source breakdown voltage BV  
100  
0.5  
V
I =0.25mA, V =0V  
D GS  
DSS  
Gate-source threshold voltage  
Gate-body leakage  
V
I
1.5  
50  
V
I =1mA, V = V  
DS GS  
D
GS(th)  
nA  
nA  
V
=±20V, V =0V  
DS  
GSS  
DSS  
GS  
Zero gate voltage drain current  
Static drain-source on-state  
I
500  
V
=100V, V =0V  
DS GS  
R
8
V
V
=4.5V, I =150mA  
D
DS(on)  
GS  
GS  
(1)  
resistance  
12  
=3V, I =50mA  
D
(1)(2)  
Forward transconductance  
g
C
C
80  
mS  
pF  
V
=25V, I =100mA  
D
fs  
DS  
(2)  
Input capacitance  
25  
9
iss  
oss  
Common source output  
pF  
V
=25V, V =0V, f=1MHz  
GS  
(2)  
DS  
capacitance  
(2)  
Reverse transfer capacitance  
C
4
pF  
ns  
ns  
ns  
ns  
rss  
(2)(3)  
Turn-on delay time  
t
t
t
t
10  
10  
15  
25  
d(on)  
(2)(3)  
Rise time  
r
V
30V, I =280mA  
DD  
D
(2)(3)  
Turn-off delay time  
d(off)  
f
(2)(3)  
Fall time  
NOTES:  
(1)  
Measured under pulsed conditions. Width=300µs. Duty cycle Յ2% (2) Sample test.  
Switching times measured with 50source impedance and <5ns rise time on a pulse generator  
(3)  
ISSUE 2 - OCTOBER 2006  
SEMICONDUCTORS  
1
ZXM41N0F  
PACKAGE OUTLINE  
PAD LAYOUT DETAILS  
Controlling dimensions are in millimeters. Approximate conversions are given in inches  
PACKAGE DIMENSIONS  
Millimeters  
Inches  
Min  
Millimeters  
Inches  
Max  
DIM  
DIM  
Min  
2.67  
1.20  
Max  
Max  
0.120  
0.055  
0.043  
0.021  
Min  
0.33  
0.01  
2.10  
0.45  
Max  
Max  
0.020  
0.004  
0.0985  
0.025  
A
B
C
D
F
3.05  
1.40  
1.10  
0.53  
0.15  
0.105  
0.047  
H
K
0.51  
0.10  
2.50  
0.64  
0.013  
0.0004  
0.083  
0.018  
L
0.37  
0.085  
0.015  
M
N
0.0034 0.0059  
0.075 NOM  
0.95 NOM  
10Њ TYP  
0.0375 NOM  
10Њ TYP  
G
1.90 NOM  
© Zetex Semiconductors plc 2006  
Europe  
Americas  
Asia Pacific  
Zetex (Asia) Ltd  
Corporate Headquaters  
Zetex GmbH  
Zetex Inc  
Zetex plc  
Kustermann-Park  
Balanstraße 59  
D-8541 München, Germany  
700 Veterans Memorial Hwy  
Hauppauge, NY 11788  
USA  
3701-04 Metroplaza Tower 1  
Hing Fong Road, Kwai Fong  
Hong Kong  
Fields New Road, Chadderton  
Oldham, OL9 8NP  
United Kingdom  
Telefon: (49) 89 45 49 49 0  
Fax: (49) 89 45 49 49 49  
europe.sales@zetex.com  
Telephone: (1) 631 360 2222  
Fax: (1) 631 360 8222  
usa.sales@zetex.com  
Telephone: (852) 26100 611  
Fax: (852) 24250 494  
asia.sales@zetex.com  
Telephone (44) 161 622 4444  
Fax: (44) 161 622 4446  
hq@zetex.com  
These offices are supported by agents and distributors in major countries world-wide.  
This publication is issued to provide outline information only which (unless agreed by the Company in writing) may not be used, applied or reproduced  
for any purpose or form part of any order or contract or be regarded as a representation relating to the products or services concerned. The Company  
reserves the right to alter without notice the specification, design, price or conditions of supply of any product or service.  
For the latest product information, log on to www.zetex.com  
ISSUE 2 - OCTOBER 2006  
SEMICONDUCTORS  
2

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