ZXLD1601H6 [DIODES]
Switching Regulator, 0.5A, 1000kHz Switching Freq-Max, PDSO6, SC70, 6 PIN;
| 型号： | ZXLD1601H6 |
| 厂家： | 
DIODES INCORPORATED |
| 描述： | Switching Regulator, 0.5A, 1000kHz Switching Freq-Max, PDSO6, SC70, 6 PIN 开关 光电二极管 |
| 文件： | 总12页 (文件大小：134K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ZXLD1601
ADJ USTABLE DC - DC BOOST CONVERTER WITH INTERNAL SWITCH
IN SC70
DESCRIPTION
The ZXLD1601 is a PFM inductive boost converter Output voltage is set to a nom inal value between 26V
designed to provide output voltages of up to 28V from and 28V, by an internal resistor network, but can be
a 2.5V to 5.5V input supply.
adjusted to lower values by external resistors, an
external PWM control signal applied to the ‘Enable’
pin, or a com bination of the two. Depending upon the
control frequency, the PWM signal will provide either
continuous (low ripple) or gated control. The PWM
filter com ponents are contained within the chip.
The ZXLD1601 includes the output switch and peak
current sense resistor, and can provide up to 10m A
output current at m axim um output voltage. Higher
current is available at lower output voltages.
Quiescent current is typically 60A and a shutdown Minim um output voltage is determ ined by the input
function is provided to reduce this current to less than supply.
100nA in the ‘off’ state.
The device is assem bled in a low profile SC70-6 pin
package.
ADVANCED FEATURES
APPLICATIONS
• LCD and OLED bias
• Internal 30V NDMOS switch, current sense and
output setting resistors.
• True analogue output voltage control via PWM
• Cellular / m obile phones
• Digital cam eras
with internal filter
FEATURES
• Low profile SC70-6 pin package
• PDAs
• LCD m odules
• Internal PWM filter for adjustable output
• High efficiency (85% typ)
• Varactor and PIN diode bias
• Palm top com puters
• Wide input voltage range: 2.5V to 5.5V
• Up to 250m A output current at 5V
• Low quiescent current: (60A typ)
• 100nA m axim um shutdown current
• Up to 1MHz switching frequency
• Low external com ponent count
TYPICAL APPLICATION CIRCUIT
PINOUT
TOP VIEW
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S E M IC O N D U C T O R S
1
ZXLD1601
ABSOLUTE MAXIMUM RATINGS
(Voltages to GND unless otherwise stated)
Input voltage (VIN
)
7V
LX output voltage (VLX
)
30V
Switch output current (ILX
)
500m A
300m W
-40 to 85°C
-55 to 150°C
125°C
Power dissipation (PD)
Operating tem perature (TOP
Storage tem perature (TST
J unction tem perature (Tj MAX
)
)
)
(1)
ELECTRICAL CHARACTERISTICS: (Test conditions: V =VEN=3V, TAMB=25°C unless otherwise stated
)
IN
S ym b o l Pa ra m e t e r
Co n d it io n s
Min
Typ
Ma x Un it s
V
In p u t vo lta g e
2.5
5.5
V
IN
I
S u p p ly cu rre n t
Qu ie s ce n t
IN
V
V
= V , I = 0, Output not switching
IN LX
60
100
100
µA
n A
EN
S h u td o w n
= 0V
<10
EN
V
R
FB p in co n tro l vo lta g e
0.98
1.07
V
FB
In te rn a l re s is to r fro m FB p in
to GND p in
135
k⍀
1
R
In te rn a l re s is to r fro m FB p in
3.45
M⍀
2
to V
p in
S ENS E
f
Op e ra tin g fre q u e n cy
LX o u tp u t ‘OFF’ tim e
LX o u tp u t ‘ON’ tim e
L=10H, V
L=10H, V
=28V, 5m A lo a d
=28V, 5m A lo a d
600
500
kHz
n s
LX
OUT
T
T
350
OFF
(2)
5
µs
ON
I
S w itch p e a k cu rre n t lim it
S w itch ‘On ’ re s is ta n ce
S w itch le a ka g e cu rre n t
320
m A
⍀
LXp k
OUT
R
1.75
LX
I
V
=20V
1
µA
V
LX(le a k)
LX
V
Controller default output
voltage
FB p in flo a tin g
26
28
OUT
V
V
EN pin high level Input voltage De vice a ctive
EN pin low level Input voltage De vice in s h u td o w n
1.5
V
V
V
ENH
ENL
ENL
ENH
IN
0.4
-100
1
I
I
EN pin low level input current
EN pin high level input current
EN p in tu rn o ff d e la y
V
V
V
=0V
n A
A
µs
EN
EN
EN
=VIN
(3)
EN(hold)
T
s w itch e d fro m h ig h to lo w
120
NOTES:
1
2
3
Production testing of the device is perform ed at 25°C. Functional operation of the device over a –40°C to +85°C tem perature range is
guaranteed by design, characterization and process control.
Nom inal ‘on’ tim e (TONnom ) is defined by the input voltage (V ), coil inductance (L) and peak current (I
) according to the expression:
IN
LXpkdc
T
= {I
x L/V } +200ns
ONnom
LX(pkdc) IN
This is the tim e for which the device rem ains active after the EN pin has been asserted low. This delay is necessary to allow the output to be
m aintained during dc PWM m ode operation.
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ZXLD1601
(1)
ELECTRICAL CHARACTERISTICS (Cont.): (Test conditions: V =V =3V, T
=25°C unless otherwise stated
)
IN EN
AMB
S ym b o l Pa ra m e t e r
Co n d it io n s
Min
Typ
Ma x Un it s
⌬T/T
PWM d u ty cycle ra n g e a t
10kHz < f < 100kHz, VENH =VIN
20
100
%
‘EN’ in p u t fo r d c o u tp u t
vo lta g e co n tro l
fLPF
In te rn a l PWM lo w p a s s filte r
cu t-o ff fre q u e n cy
4
kHz
ALPF
Filte r a tte n u a tio n
f=30kHz
52.5
d B
%
(4)
⌬T/T
PWM d u ty cycle ra n g e a t
‘EN’ in p u t fo r ‘g a te d ’ o u tp u t
vo lta g e co n tro l
f < 1kHz, VENH =VIN
0
100
NOTES:
4
The m axim um PWM signal frequency during this m ode of operation should be kept as low as possible to m inim ize errors due to the turn-off
delay
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ZXLD1601
PIN DESCRIPTION
Pin No . Na m e
De s crip t io n
LX
Ou tp u t o f NDMOS s w itch
Gro u n d (0V)
1
2
3
GND
FB
Fe e d b a ck p in fo r vo lta g e co n tro l lo o p
No m in a l vo lta g e 1.025V
EN
En a b le in p u t (a ctive h ig h to tu rn o n d e vice )
4
Als o u s e d to a d ju s t o u tp u t cu rre n t b y PWM s ig n a l.
Co n n e ct to V fo r p e rm a n e n t o p e ra tio n .
in
V
Ou tp u t vo lta g e s e n s e
5
6
S ENS E
V
In p u t vo lta g e (2.5V to 5.5V). De co u p le w ith
ca p a cito r clo s e to d e vice .
IN
BLOCK DIAGRAM
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ZXLD1601
Device Description
The device is a PFM flyback dc-dc boost converter,
working in discontinuous m ode.
Filtered PWM operation
The input of an internal low pass filter is switched to
VREF when the EN pin is high and switched to ground
when the EN pin is low. The output of this filter drives
the com parator within the control loop. A continuous
high state on EN therefore provides a filtered voltage of
value Vref to the com parator. However, by varying the
duty cycle of the EN signal at a suitably high frequency
With reference to the chip block diagram and typical
application circuit, the operation of the device is as
follows:
Control loop
When ‘EN’ is high, the control circuits becom e active (f>10kHz), the control loop will see a voltage, that has
and the low side of the coil (L1) is switched to ground an average value equal to the duty cycle m ultiplied by
via NDMOS transistor (MN). The current in L1 is
VREF. This provides a m eans of adjusting the output
allowed to build up to an internally defined level voltage to a lower value. It also allows the device to be
(nom inally 320m A) before MN is turned off. The energy both turned on and adjusted with a single signal at the
stored in L1 is then transferred to the output capacitor ‘EN’ pin. The output during this m ode of operation will
(C2) via Schottky diode (D1). The output voltage is be a dc voltage equal to VREF*(R1+R2)/R1 x duty cycle.
sensed at pin ‘VSENSE’ by internal resistors R1 and R2
(which m ay be shunted externally at pin ‘FB’) and
Gated PWM operation
co m p a re d to
a re fe re n ce vo lta g e VREF (1.025V
nom inal). A com parator senses when the output
voltage is above that set by the reference and its output
is used to control the ‘off’ tim e of the output switch. The
control loop is self-oscillating, producing pulses of up
to 5µs m axim um duration (switch ‘on’), at a frequency
that varies in proportion to the output current. The
feedback loop m aintains a voltage of VREF at the FB pin
and therefore defines a m axim um output voltage equal
to VREF *(R1+R2)/R1. The m inim um ‘off’ tim e of the
The internal circuitry of the ZXLD1601 is turned off
when no signal is present on the ‘EN’ pin for m ore than
120µs (nom inal). A low frequency signal applied to the
EN pin will therefore gate the device ‘on’ and ‘off’ at the
gating frequency and the duty cycle of this signal can
be varied to provide an average output equal to VREF
*(R1+R2)/R1 x duty cycle. For best accuracy, the gating
frequency should be m ade as low as possible (e.g.
below 1kHz), such that the turn off delay of the chip is
output switch is fixed at 0.5µs nom inal, to allow tim e only a sm all proportion of the gating period
for the coil’s energy to be dissipated before the switch
Further details of setting output current are given in the
is turned on again. This m aintains stable and efficient
application notes.
operation in discontinuous m ode.
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ZXLD1601
TYPICAL CHARACTERISTICS
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S E M IC O N D U C T O R S
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ZXLD1601
TYPICAL PERFORMANCE GRAPHS
(For typical applications circuit at VIN=3V, L=22µH Murata LQH32CN series, TA=25°C unless otherwise stated)
ISSUE 3 - AUGUST 2004
S E M IC O N D U C T O R S
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ZXLD1601
APPLICATIONS
Setting output voltage
1) PWM output voltage adjustm ent (analogue m ode)
When connected as shown in the typical application During this m ode of operation the device operation is
circuit, the ZXLD1601 will produce a nom inal default continuous, providing a low ripple output voltage
output of between 26V and 28V. This is set by the (VOUT) directly proportional to the duty cycle (D) of the
internal potential divider com prising of resistors R1 logic signal applied to the EN pin according to the
and R2. (See device block diagram ).
relationship:
Th e in te rn a l p o te n tia l d ivid e r n e tw o rk R1/R2 is
accessible at the FB pin and can be shunted by m eans
of external resistors to set different nom inal output
voltages. The potential divider defines output voltage
according to the relationship:
V
OUT = D x VOUT(nom )
Square wave signals applied to the EN pin, for
exam ple, will turn the device on and produce a nom inal
regulated output of 13.5V.
The ZXLD1601 contains a tim ing circuit that switches
the device on a few m icroseconds after the application
of a rising edge to EN and turns it back off again
nom inally 120µs after the falling edge of EN. For
continuous PWM m ode operation, the frequency of the
control signal m ust therefore be m aintained above
10kHz at all tim es, to prevent the internal delay circuit
from tim ing out and switching the device into standby
m ode. The m axim um frequency applied to EN should
be lim ited to 100kHz to m inim ize errors due to internal
switching delays
R2
⎛
⎞
⎟
⎜
VOUT = VFB 1 +
⎝
R1⎠
where VFB = 1.025V.
When using external resistors, these should be chosen
with lower values than the internal resistors to
m inim ize errors caused by the device to device
variation in absolute value of the internal resistors
( 30% m ax). The internal resistors have high values in
order to m inim ize these errors.
2) PWM output voltage adjustm ent (gated m ode)
Re q u ire d
Ext e rn a l
Ext e rn a l re s is t o r
o u t p u t vo lt a g e re s is t o r a cro s s a cro s s R2
R1
This m ethod of adjustm ent can be used in applications
where the output ripple is less im portant than the
supply current. The m ethod of adjustm ent is the sam e
as in 1) above, however, during this m ode of operation,
the device is gated on and off, providing an average
output voltage (VOUT) directly proportional to the duty
cycle (D) of the logic signal applied to the EN pin
according to the relationship:
5V
43K⍀
130K⍀
487K⍀
649K⍀
649K⍀
620K⍀
1.07M⍀
12V
18V
21V
25V
28V
56K⍀
43K⍀
VOUT(AVG) = D x VOUT(nom )
34.8K⍀
27K⍀
The ripple on this voltage will be determ ined by the size
of the output capacitor.
The output voltage can be adjusted all the way down to
the input voltage by either m ethod of PWM control, but
for best results, the duty cycle range should be kept
within the specified range. Lower duty cycles will result
in increased output ripple and non-linearity in the
relationship between duty cycle and output voltage. If a
greater control range is required, the nom inal output
can be reduced by the use of external resistors before
the PWM signal is applied.
40.2K⍀
The following table gives suggested values for various
output voltages.
Once the nom inal output voltage has been set, it can be
adjusted to a lower value by applying a pulse width
m odulated (PWM) control signal to the EN pin, using
one of the two m ethods described below.
Minim izing output voltage ripple
PWM adjustm ent perm its the device to be turned on
and the output voltage set by a single logic signal
applied to the EN pin. No external resistors are
required and the am plitude of the control signal is not
critical, providing it conform s to the lim its defined in
the electrical characteristics.
For applications requiring lower output ripple it m ay be
necessary to add a sm all ceram ic capacitor in parallel
with R2. A value of 4.7pF is suitable for m ost output
ranges.
ISSUE 3 - AUGUST 2004
S E M IC O N D U C T O R S
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ZXLD1601
Capacitor selection
A ceram ic capacitor grounded close to the GND pin of For m axim um stability over tem perature, capacitors
the package is recom m ended at the output of the with X7R dielectric are recom m ended, as these have a
d e v ic e . S u r fa c e m o u n t t y p e s o ffe r t h e b e s t m uch sm aller tem perature coefficient than other types.
p e rfo rm a n ce d u e to th e ir lo w e r in d u cta n ce . A
m inim um value of 0.22µF is advised, although higher
A table of recom m ended m anufacturers is provided
values will lower switching frequency and im prove
below:
efficiency especially at lower load currents. A higher
value will also m inim ize ripple when using the device
to provide an adjustable dc output current.
Ma n u fa ct u re r
Mu ra ta
We b s it e
A good quality, low ESR capacitor should also be used
for input decoupling, as the ESR of this capacitor is
effectively in series with the source im pedance and
lowers overall efficiency. This capacitor has to supply
the relatively high peak current to the coil and sm ooth
the current ripple on the input supply. A m inim um
value of 4.7µF is acceptable if the input source is close
to th e d e vice , b u t h ig h e r va lu e s w ill im p ro ve
perform ance at lower input voltages, when the source
im pedance is high. The input capacitor should be
m ounted as close as possible to the IC
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AVX
Inductor selection
Recom m ended inductor values for the ZXLD1601 are
The choice of inductor will depend on available board
space as well as required perform ance. Sm all value in the range 6.8µH to 22µH. The inductor should be
inductors have the advantage of sm aller physical size m ounted as close to the device as possible with low
and m ay offer lower series resistance and higher resistance connections to the LX and VIN pins.
saturation current com pared to larger values. A
Suitable coils for use with the ZXLD1601 are shown in
disadvantage of lower inductor values is that they
the table below:
result in higher frequency switching, which in turn
causes reduced efficiency due to switch losses. Higher
inductor values can provide better perform ance at
lower supply voltages. However, if the inductance is
too high, the output power will be lim ited by the
internal oscillator, which will prevent the coil current
from reaching its peak value. This condition will arise
whenever the ram p tim e (ILX(peak) x L/VIN) exceeds the
nom inal 5µs m axim um ‘on’ tim e lim it for the LX output.
Pa rt No .
L
DCR
I
Ma n u fa ct u re r
S AT
(
H)
(
)
(A)
CMD4D11-100MC
DO1608-103
10
10
10
10
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0.16
1.3
0.5
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ISSUE 3 - AUGUST 2004
S E M IC O N D U C T O R S
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ZXLD1601
Diode selection
Th e re ctifie r d io d e (D1) s h o u ld b e
a fa s t lo w
capacitance Schottky diode with low reverse leakage at
the working voltage. It should also have a peak current
rating above the peak coil current and a continuous
current rating higher than the m axim um output load
current.
The table below gives som e typical characteristics for
diodes that can be used with the ZXLD1601:
Dio d e
V
@ 100m A (m V)
I
(m A) Ic (m A)
I a t 30V ( A)
R
Pa cka g e
F
FS M
ZHCS 400 300
ZHCS 500 300
1000
1000
400
500
15
15
S OD323
S OT23
Layout considerations
PCB tracks should be kept as short as possible to
m inim ize ground bounce, and the ground pin of the
device should be soldered directly to the ground plane.
It is particularly im portant to m ount the coil and the
input/output capacitors close to the device to m inim ize
p a ra s itic re s is ta n ce a n d in d u cta n ce , w h ich w ill
degrade efficiency. The FB pin is a high im pedance
input, so PCB track lengths to this should also be kept
as short as possible to reduce noise pickup. Excess
capacitance from the FB pin to ground should be
avoided.
ISSUE 3 - AUGUST 2004
S E M IC O N D U C T O R S
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ZXLD1601
NOTES:
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S E M IC O N D U C T O R S
11
ZXLD1601
PACKAGE OUTLINE
PACKAGE DIMENSIONS
Millim eters
DIM
Inches
Min
0.80
-
Max
1.10
0.10
1.00
0.30
0.25
Min
0.0315
-
Max
A
A1
A2
b
0.0433
0.0039
0.0394
0.0118
0.0098
0.80
0.15
0.08
0.0315
0.006
0.0031
C
D
2.00 BSC
2.10 BSC
1.25 1.35
0.0787 BSC
0.0826 BSC
0.0492 0.0531
E
E1
e
0.65 BSC
1.30 BSC
0.0255 BSC
0.0511 BSC
e1
L
0.26
0°
0.46
8°
0.0102
0°
0.0181
8°
a°
ORDERING INFORMATION
DEVICE
DEVICE DES CRIPTION
TEMPERATURE RANGE PART MARK TAPING OPTIONS
ZXLD1601H6 Bo o s t co n ve rte r in S C70-6 -40°C to +85°C
601
TA, TC
TA reels 3000 devices, TC reels 10000 devices
© Zetex Sem iconductors plc 2004
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ISSUE 3 - AUGUST 2004
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