AP7340D-31FS4-7_技术文档

AP7340

150mA HIGH PSRR LOW NOISE LDO WITH ENABLE

Description

Pin Assignments

The AP7340 is low dropout regulator with high output voltage

accuracy, low R_DSON, high PSRR, low output noise and low quiescent

current. This regulator is based on a CMOS process.

The AP7340 includes a voltage reference, error amplifier, current limit

circuit and an enable input to turn it on and off. With the integrated

resistor network fixed output voltage versions can be delivered.

With its low power consumption and line and load transient response

the AP7340 is well suited for low power handheld communication

equipment.

The AP7340 is packaged in a X2-DFN1010-4 package and allows for

smallest footprint and dense PCB layout.

PIN1 – V_OUT, PIN2 – GND, PIN3 – EN, PIN4 – V_IN

Features

●

Low V_INand wide V_INrange: 1.7V to 5.25V

Applications

Guarantee Output Current,150mA



Smart phone/PAD

V_OUTaccuracy ±1%

RF supply

Ripple Rejection 75dB at 1kHz

Cameras

Low output noise, 60uVrms from 10Hz to 100kHz

Quiescent current as low as 35µA

Portable Video

Portable Media player

Wireless adapter

Wireless communication

V_OUTfixed 1.2V to 3.3V

Totally Lead-Free & and Fully RoHS Compliant (Note 1)

Halogen and Antimony Free, Green Device (Note 2)

Notes:

1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.

2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"

and Lead-free.

3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and

<1000ppm antimony compounds.

Typical Applications Circuit

Figure 1 Typical Application Circuit

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October 2013

AP7340

Document number: DS35282 Rev. 2 - 2

AP7340

Pin Descriptions

PIN No

Pin Name

Function

X2-DFN1010-4

1

2

Power Output Pin

Ground

V_OUT

GND

Enable pin. This pin should be driven either high or low and must not be floating. Driving this pin

high enables the regulator, while pulling it low puts the regulator into shutdown mode

EN

V_IN

3

4

Power Input pin

In PCB layout, prefer to use large copper area to cover this pad for better thermal dissipation, then

connect this area to GND or leave it open. However do not use it as GND electrode function alone.

Thermal PAD

Functional Block Diagram

AP7340 (Non discharge)

AP7340D (with discharge)

Absolute Maximum Ratings (Note 4) (@T_A= +25°C, unless otherwise specified.)

Symbol

V_IN

Parameter

Input Voltage

Ratings

6.0

Unit

V

V_CE

Input Voltage EN

Output Voltage

6.0

V

V_OUT

I_OUT

P_D

-0.3 to V_IN+0.3

300

V

Output Current

mA

mW

°C

Power Dissipation

Operating Temperature

Storage Temperature

400

T_A

-40 to +85

-55 to +125

T_STG

Note:

4. a). Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and

functional operation of the device at these conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may

affect device reliability.

b). Ratings apply to ambient temperature at 25°C . The JEDEC High-K board design used to derive this data was a 2 inch x 2 inch multilayer board

with 1-ounce internal power and ground planes and 2-ounce copper traces on the top and bottom of the board.

Recommended Operating Conditions (@T_A= +25°C, unless otherwise specified.)

Symbol

V_IN

Parameter

Min

1.7

0

Max

5.25

150

+85

Unit

V

Input Voltage

Output Current

mA

°C

I_OUT

T_A

Operating Ambient Temperature

-40

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AP7340

Document number: DS35282 Rev. 2 - 2

AP7340

Electrical Characteristics

(V_EN= V_IN= V_OUT+1.0V, C_IN= C_OUT0.47µF, I_OUT= 1.0mA @T_A= +25°C, unless otherwise specified.)

Parameter

Input Voltage

Conditions

Min

1.7

-1

Typ

Max

5.25

1

Units

V

T_A= -40°C to +85°C

T_A= +25°C

V

_IN= (V_OUT

– _Nom+1.0V) to

Output Voltage Accuracy (Note 11)

%

5.25V, I_OUT= 1mA to 150mA

-1.5

+1.5

T_A= -40°C to +85°C

0.02

0.5

0.1

1.0

%/V

Line Regulation (dV_OUT/dV_IN/V_OUT

) V_IN= (V_{OUT – Nom}+1.0V) to 5.25V, I_OUT= 1.0mA

Load Regulation

%/A

uA

V_IN= V_OUT

I_OUT= 0mA

- _Nom+1.0V, I_OUT= 1mA to 150mA

(dV_OUT/V_OUT/dI_OUT

)

35

60

50

100

1.0

Quiescent Current

(Note 6)

I_OUT= 150mA

0.01

uA

mA

I_STANDBY

V_EN= 0V (Disabled)

Output Current

150

Fold-back Short Current (Note 7)

PSRR (Note 8)

55

75

V

_OUTshort to ground

V_IN= [V_OUT+1V] VDC + 0.2Vp-pAC,

f = 1kHz

dB

V

_OUT≥1.8V,

I

_OUT= 30mA

Output Noise Voltage (Note 8)

(Note 9)

60

µVrms

BW = 10Hz to 100kHz, I_OUT= 30mA

0.50

0.38

0.34

0.28

0.22

0.21

0.62

0.47

0.42

0.36

0.30

0.27

1.2V ≤ V_OUT< 1.5V

1.5V ≤ V_OUT< 1.7V

1.7V ≤ V_OUT< 2.0V

2.0V ≤ V_OUT< 2.5V

2.5V ≤ V_OUT< 2.8V

2.8V ≤ V_OUT≤ 3.3V

Dropout Voltage

(Note 5)

V

I

_OUT= 150mA

Output Voltage Temperature

Coefficient

±30

ppm/C

I_OUT= 30mA, T_A= -40°C to +85°C

EN Input Low Voltage

EN Input High Voltage

0

0.5

V

1.3

5.25

EN Input Leakage

-1.0

+1.0

µA

V

_EN= 0, V_IN= 5.0V or V_EN= 5.0V, V_IN= 0V

On Resistance of N-channel for

auto-discharge (Note 10)

30

Vin = 4.0V V_EN= 0V (Disabled)



Notes:

5. Dropout voltage is the voltage difference between the input and the output at which the output voltage drops 2% below its nominal value.

6. Quiescent current is defined here is the difference in current between the input and the output.

7. Short circuit current is measured with V_OUTpulled to GND.

8. This specification is guaranteed by design.

9. To make sure lowest environment noise minimizes the influence on noise measurement.

10. AP7340 has 2 options for output, Built-in discharge and non-discharge

11. Potential multiple grades based on following output voltage accuracy.

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AP7340

Document number: DS35282 Rev. 2 - 2

AP7340

Typical Characteristics

Output Noise (AP7340-33)

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AP7340

Typical Characteristics (cont.)

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AP7340

Typical Characteristics (cont.)

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AP7340

Typical Characteristics (cont.)

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Typical Characteristics (cont.)

AP7340-25

AP7340-33

6

5

4

5

4

3

Input Voltage

2.520

3.320

3.300

3.280

Output Voltage

2.500

2.480

0

20

40

60

80

100

0

20

40

60

80

100

Time t (µs)

V_IN=3.5V

tr=tf=0.5µs

V_IN=4.3V

tr=tf=0.5µs

AP7340-25

AP7340-33

150

100

150

100

Output Current

50mA  100mA

Output Current

50mA  100mA

50

0

50

0

3.35

3.30

3.25

3.20

2.35

2.50

Output Voltage

2.45

2.40

Output Voltage

0

20

40

60

80

100

0

20

40

60

80

100

Time t (µs)

V_IN=4.3V

tr=tf=0.5µs

V_IN=3.5V

tr=tf=0.5µs

AP7340-33

AP7340-25

300

150

0

300

150

0

Output Current

1mA  150mA

Output Current

1mA  150mA

3.50

3.30

3.10

2.90

2.70

2.50

2.30

2.10

Output Voltage

0

20

40

60

80

100

0

20

40

60

80

100

Time t (µs)

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AP7340

Document number: DS35282 Rev. 2 - 2

AP7340

Typical Characteristics (cont.)

AP7340-25

I_OUT=0mA

I_OUT=30mA

3

2

3

2

CE Input Voltage

1

0

1

0

3

2

1

0

3

2

1

Output Voltage

0

40

80

120

160

200

0

40

80

120

160

200

Time t (µs)

AP7340-25

AP7340-33

I_OUT=150mA

I_OUT=0mA

3

2

3

2

1

0

CE Input Voltage

1

0

3

2

1

0

3

2

1

0

Output Voltage

0

40

80

120

160

200

0

40

80

120

160

200

Time t (µs)

AP7340-33

I_OUT=150mA

AP7340-33

I_OUT=30mA

3

2

1

0

CE Input Voltage

1

0

3

2

1

3

2

1

0

Output Voltage

0

Output Voltage

0

40

80

120

160

200

0

40

80

120

160

200

Time t (µs)

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AP7340

Document number: DS35282 Rev. 2 - 2

AP7340

Typical Characteristics (cont.)

AP7340-18

I_OUT=0mA

AP7340-18

I_OUT=30mA

6

4

2

66

CE Input Voltage

4

2

CE Input Voltage

4

3

0

4

3

2

0

2

Output Voltage

1

Output Voltage

1

0

40

80

120

160

200

0

40

80

120

160

200

Time t (µs)

AP7340-18

AP7340-33

I_OUT=0mA

I_OUT=150mA

6

4

2

6

4

2

0

CE Input Voltage

4

3

2

4

3

2

1

0

Output Voltage

1

0

40

80

120

160

200

0

40

80

120

160

200

Time t (µs)

AP7340-33

Time t (µs)

AP7340-33

I_OUT=150mA

I_OUT=30mA

6

4

2

0

4

2

0

CE Input Voltage

4

3

2

4

3

2

Output Voltage

1

0

1

0

40

80

120

160

200

0

40

80

120

160

200

Time t (µs)

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AP7340

Document number: DS35282 Rev. 2 - 2

AP7340

Application Information

Output Capacitor

An output capacitor (C_OUT) is needed to improve transient response and maintain stability. The AP7340 is stable with very small ceramic output

capacitors. The ESR (equivalent series resistance) and capacitance drives the selection. If the application has large load variations, it is

recommended to utilize low-ESR bulk capacitors. It is recommended to place ceramic capacitors as close as possible to the load and the ground

pin and care should be taken to reduce the impedance in the layout.

Input Capacitor

To prevent the input voltage from dropping during load steps it is recommended to utilize an input capacitor (C_IN). A minimum 0.47μF ceramic

capacitor is recommended between V_INand GND pins to decouple input power supply glitch. This input capacitor must be located as close as

possible to the device to assure input stability and reduce noise. For PCB layout, a wide copper trace is required for both V_INand GND pins.

Enable Control

The AP7340 is turned on by setting the EN pin high, and is turned off by pulling it low. If this feature is not used, the EN pin should be tied to V_INpin

to keep the regulator output on at all time. To ensure proper operation, the signal source used to drive the EN pin must be able to swing above and

below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section.

Short Circuit Protection

When V_OUTpin is short-circuit to GND, short circuit protection will be triggered and clamp the output current to approximately 60mA. This feature

protects the regulator from over-current and damage due to overheating.

Layout Considerations

For good ground loop and stability, the input and output capacitors should be located close to the input, output, and ground pins of the device. The

regulator ground pin should be connected to the external circuit ground to reduce voltage drop caused by trace impedance. Ground plane is

generally used to reduce trace impedance. Wide trace should be used for large current paths from V_INto V_OUT, and load circuit.

ESR vs. Output Current

Ceramic type output capacitor is recommended for this series; however, the other output capacitors with low ESR also can be used. The relations

between I_OUT(Output Current) and ESR of an output capacitor are shown below. The stable region is marked as the hatched area in the graph.

Measurement conditions:

Frequency Band : 10Hz to 2MHz, Temperature

: -40°C to +85°C

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AP7340

Document number: DS35282 Rev. 2 - 2

AP7340

Ordering Information

7” Tape and Reel

Part Number Suffix

Package

Code

Part Number

Packaging

Quantity

AP7340-XXFS4-7

AP7340D-XXFS4-7

FS4

X2-DFN1010-4

5000/Tape & Reel

-7

Marking Information

X2-DFN1010-4

(Top View)

XX : Identification Code

Y : Year : 0~9

XX

W : Week : A~Z : 1~26 week;

a~z : 27~52 week; z represents

52 and 53 week

Y W X

X : A~Z : Internal code

Part Number

Package

X2-DFN1010-4

Identification Code

AP7340-12FS4-7

AP7340-15FS4-7

AP7340-18FS4-7

AP7340-185FS4-7

AP7340-25FS4-7

AP7340-28FS4-7

AP7340-285FS4-7

AP7340-30FS4-7

AP7340-31FS4-7

AP7340-32FS4-7

AP7340-33FS4-7

AP7340D-12FS4-7

AP7340D-15FS4-7

AP7340D-18FS4-7

AP7340D-185FS4-7

AP7340D-25FS4-7

AP7340D-28FS4-7

AP7340D-285FS4-7

AP7340D-30FS4-7

AP7340D-31FS4-7

AP7340D-32FS4-7

CH

CJ

X2-DFN1010-4

CK

EV

CM

CN

EW

EX

EY

EZ

CP

DG

DH

DJ

DV

DK

DM

DW

DX

DY

DZ

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AP7340

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AP7340

Package Outline Dimensions (All dimensions in mm.)

Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for latest version.

Package Type: X2-DFN1010-4

A3

A1

X2-DFN1010-4

A

Dim

A

A1

A3

b

D

D2

E

E2

e

L

L1

L2

Z

Min

-

0.00

-

Max

0.40

0.05

-

Typ

0.39

0.02

0.13

0.25

1.00

0.48

1.00

0.48

0.65

0.25

0.32

0.07

0.050

Seati ng Pl ane

D

e

0.20

0.95

0.38

0.95

0.38

-

0.30

1.05

0.58

1.05

0.58

-

C

L1

0

.

2

5

E

L2

0.20

0.27

0.02

-

0.30

0.37

0.12

-

L

b

All Dimensions in mm

Z

Suggested Pad Layout

Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.

Package Type: X2-DFN1010-4

X2

C

Value

Y2

Dimensions

(in mm)

0.650

0.250

0.480

0.900

0.400

0.470

0.220

0.480

Y1

C

X

X1

X2

Y

Y1

Y2

Y3

Y4

X1

Y

X

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AP7340

Document number: DS35282 Rev. 2 - 2

AP7340

Tape Orientation

For X2-DFN1010-4

Note:

12. The taping orientation of the other package type can be found on our website at http://www.diodes.com/datasheets/ap02007.pdf

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AP7340

IMPORTANT NOTICE

DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT,

INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE

(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).

Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes

without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the

application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or

trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume

all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated

website, harmless against all damages.

Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel.

Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and

hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or

indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.

Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings

noted herein may also be covered by one or more United States, international or foreign trademarks.

This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the

final and determinative format released by Diodes Incorporated.

LIFE SUPPORT

Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express

written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:

A. Life support devices or systems are devices or systems which:

1. are intended to implant into the body, or

2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the

labeling can be reasonably expected to result in significant injury to the user.

B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the

failure of the life support device or to affect its safety or effectiveness.

Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and

acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any

use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related

information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its

representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems.

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AP7340

Document number: DS35282 Rev. 2 - 2


型号：	AP7340D-31FS4-7
厂家：	DIODES INCORPORATED
描述：	150mA HIGH PSRR LOW NOISE LDO WITH ENABLE 150毫安高PSRR低噪声LDO具有使能
文件：	总15页 (文件大小：974K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

AP7340D-31FS4-7 [DIODES]

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