2N7002K [DIODES]

60V N-Channel Enhancement Mode MOSFET - ESD Protected; 60V N沟道增强型MOSFET - ESD保护
2N7002K
型号: 2N7002K
厂家: DIODES INCORPORATED    DIODES INCORPORATED
描述:

60V N-Channel Enhancement Mode MOSFET - ESD Protected
60V N沟道增强型MOSFET - ESD保护

晶体 晶体管 开关 光电二极管 PC
文件: 总5页 (文件大小:161K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
2N7002K  
60V N-Channel Enhancement Mode MOSFET - ESD Protected  
FEATURES  
• RDS(ON), VGS@10V,IDS@500mA=3  
• RDS(ON), VGS@4.5V,IDS@200mA=4Ω  
• Advanced Trench Process Technology  
• High Density Cell Design For Ultra Low On-Resistance  
• Very Low Leakage Current In Off Condition  
• Specially Designed for Battery Operated Systems, Solid-State Relays  
Drivers : Relays, Displays, Lamps, Solenoids, Memories, etc.  
• ESD Protected 2KV HBM  
• Component are in compliance with EU RoHS 2002/95/EC directives  
MECHANICALDATA  
• Case: SOT-23 Package  
D
Terminals : Solderable per MIL-STD-750,Method 2026  
• Marking : K72  
3
1
2
G
S
Maximum RATINGS and Thermal Characteristics (TA=25OC unless otherwise noted )  
PARAMETER  
Symbol  
VD S  
Limit  
60  
Units  
V
Drain-Source Voltage  
Gate-Source Voltage  
Continuous Drain Current  
VG S  
+20  
300  
V
mA  
ID  
1 )  
Pulsed Drain Current  
ID M  
2000  
mA  
TA =25O  
TA =75O  
C
C
350  
210  
Maximum Power Dissipation  
PD  
mW  
O C  
Operating Junction and Storage Temperature Range  
Junction-to Ambient Thermal Resistance(PCB mounted)2  
TJ ,TS T G  
-55 to + 150  
357  
Rθ J A  
O C/W  
Note: 1. Maximum DC current limited by the package  
2. Surface mounted on FR4 board, t < 5 sec  
PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE  
STAD-JAN.03.2007  
PAGE . 1  
2N7002K  
ELECTRICALCHARACTERISTICS  
Parameter  
Symbol  
Test Condition  
Min.  
Typ.  
Max.  
Units  
Static  
Drain-Source Breakdown Voltage  
Gate Threshold Voltage  
Drain-Source On-State Resistance  
Drain-Source On-State Resistance  
Zero Gate Voltage Drain Current  
Gate Body Leakage  
BVD S S  
VG S ( t h )  
RD S ( o n )  
RD S ( o n )  
ID S S  
VG S =0V, ID =10uA  
VD S =VG S , ID =250uA  
VGS =4.5V, I D =200mA  
VGS =10V, I D =500mA  
VD S =60V, VGS =0V  
60  
-
-
V
V
1
-
2.5  
4.0  
3.0  
1
-
-
-
-
-
-
uA  
uA  
mS  
V
IG S S  
VG S =+20V, VD S =0V  
VD S =15V, ID =250mA  
IS =200mA , VG S =0V  
-
100  
-
-
-
+10  
-
Forward Transconductance  
gf S  
Diode Forward Voltage  
Dynamic  
VS D  
0.82  
1.3  
VD S =15V, ID =200mA  
VGS=4.5V  
Total Gate Charge  
Qg  
-
-
0.8  
nC  
ns  
Turn-On Delay Time  
Turn-Off Delay Time  
Input Capacitance  
to n  
-
-
-
-
-
-
-
-
-
-
20  
40  
35  
10  
5
VD D =30V , RL=150  
ID =200mA , VGE N=10V  
RG=10Ω  
to f f  
Ci s s  
Co s s  
Cr s s  
VD S =25V, VG S =0V  
f=1.0MHZ  
Output Capacitance  
Reverse Transfer Capacitance  
pF  
V
DD  
VDD  
Switching  
Test Circuit  
Gate Charge  
Test Circuit  
RL  
RL  
V
IN  
VGS  
V
OUT  
1mA  
RG  
RG  
STAD-JAN.03.2007  
PAGE . 2  
2N7002K  
Typical Characteristics Curves (TA=25OC,unless otherwise noted)  
1.2  
1
1.2  
V
DS=10V  
V
GS= 10V ~ 6.0V  
5.0V  
4.0V  
1
0.8  
0.6  
0.4  
0.2  
0
0.8  
0.6  
0.4  
0.2  
0
T
J
=25OC  
3.0V  
0
1
2
3
4
5
6
0
1
2
3
4
5
VGS - Gate-to-Source Voltage (V)  
VDS - Drain-to-Source Voltage (V)  
FIG.1-OutputCharacteristic
FIG.2- Transfer Characteristic  
5
4
3
2
1
0
5
4
3
ID=500mA  
V
GS=4.5V  
2
1
0
ID=200mA  
V
GS=10V  
2
3
4
5
6
7
8
9
10  
0
0.2  
0.4  
0.6  
0.8  
1
VGS - Gate-to-Source Voltage (V)  
ID - Drain Current (A)  
FIG.3- On Resistance vs Drain Current  
FIG.4- On Resistance vs Gate to Source Voltage  
1.8  
V
GS=10V  
ID=500mA  
1.6  
1.4  
1.2  
1
0.8  
0.6  
-50 -25  
0
25  
50  
75 100 125 150  
TJ - Junction Temperature (oC)  
FIG.5- On Resistance vs Junction Temperature  
STAD-JAN.03.2007  
PAGE . 3  
2N7002K  
10  
8
V
DS=10V  
Vgs  
I
D
=250mA  
Qg  
6
4
2
Qsw  
Vgs(th)  
0
0
0.2  
0.4  
0.6  
0.8  
1
Qg(th)  
Qgs  
Qg - Gate Charge (nC)  
Qgd  
Qg  
Fig.6 - Gate Charge Waveform  
Fig.7 - Gate Charge  
1.2  
88  
ID=250uA  
ID=250uA  
86  
84  
82  
80  
78  
76  
74  
72  
1.1  
1
0.9  
0.8  
0.7  
-50 -25  
0
25  
50  
75 100 125 150  
-50 -25  
0
25  
50  
75 100 125 150  
TJ - Junction Temperature (oC)  
TJ - Junction Temperature (oC)  
Fig.8 - Threshold Voltage vs Temperature  
Fig.9 - Breakdown Voltage vs Junction Temperature  
10  
V
GS=0V  
1
25OC  
=125OC  
0.1  
T
J
-55OC  
0.01  
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
1.6  
VSD - Source-to-Drain Voltage (V)  
Fig.10 - Source-Drain Diode Forward Voltage  
STAD-JAN.03.2007  
PAGE . 4  
2N7002K  
MOUNTING PAD LAYOUT  
ORDER INFORMATION  
• Packing information  
T/R - 12K per 13" plastic Reel  
T/R - 3K per 7” plastic Reel  
LEGAL STATEMENT  
Copyright PanJit International, Inc 2007  
The information presented in this document is believed to be accurate and reliable. The specifications and information herein  
are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its  
products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit  
does not convey any license under its patent rights or rights of others.  
STAD-JAN.03.2007  
PAGE . 5  

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