CY7C1021B-15ZE [CYPRESS]
1-Mbit (64K x 16) Static RAM; 1兆位（ 64K ×16 ）静态RAM
| 型号： | CY7C1021B-15ZE |
| 厂家： | 
CYPRESS |
| 描述： | 1-Mbit (64K x 16) Static RAM |
| 文件： | 总10页 (文件大小：362K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CY7C1021B
CY7C10211B
1-Mbit (64K x 16) Static RAM
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is
written into the location specified on the address pins (A0
through A15). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O9 through I/O16) is written into the location
specified on the address pins (A0 through A15).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O1 to I/O8. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O9 to I/O16. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
Features
• Temperature Ranges
— Commercial: 0°C to 70°C
— Industrial: –40°C to 85°C
— Automotive: –40°C to 125°C
• High speed
— tAA = 10 ns (Commercial & Industrial)
— tAA = 15 ns (Automotive)
• CMOS for optimum speed/power
• Low active power
— 825 mW (max.)
The input/output pins (I/O1 through I/O16) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Available in 44-pin TSOP II and 400-mil SOJ
• Also available in Lead (Pb)-Free 44-pin TSOP II
Functional Description[1]
The CY7C1021B/10211B is a high-performance CMOS static
RAM organized as 65,536 words by 16 bits. This device has
an automatic power-down feature that significantly reduces
power consumption when deselected.
The CY7C1021B/10211B is available in standard 44-pin
TSOP Type II and 400-mil-wide SOJ packages. Customers
should use part number CY7C10211B when ordering parts
with 10-ns tAA, and CY7C1021B when ordering 12- and 15-ns
tAA
.
Logic Block Diagram
DATA IN DRIVERS
A7
A6
A5
A4
A3
A2
64K x 16
RAM Array
512 X 2048
I/O1–I/O8
I/O9–I/O16
A1
A0
COLUMN DECODER
BHE
WE
CE
OE
BLE
Note:
1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose, CA 95134
•
408-943-2600
Document #: 38-05145 Rev. *A
Revised June 20, 2004
CY7C1021B
CY7C10211B
Selection Guide
7C10211B-10
7C1021B-12
7C1021B-15
Maximum Access Time (ns)
Maximum Operating Current (mA)
10
150
-
10
-
12
140
-
10
-
15
130
150
10
15
0.5
Com’l / Ind’l
Automotive
Com’l / Ind’l
Automotive
L Version
Maximum CMOS Standby Current (mA)
0.5
0.5
Pin Configurations
SOJ / TSOP II
Top View
44
1
A
A
5
4
43
42
41
40
39
38
37
36
35
34
33
A
A
6
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
3
A
A
2
7
OE
A
1
BHE
BLE
A
0
CE
I/O
I/O
1
16
I/O
I/O
I/O
2
15
14
13
I/O
3
I/O
V
I/O
4
V
SS
CC
V
V
SS
CC
32
I/O
I/O
I/O
5
6
7
8
12
11
10
9
31
30
29
28
27
26
25
I/O
I/O
I/O
I/O
I/O
WE 17
NC
18
A
A
8
15
19
A
A
14
9
A
13
12
20
21
22
A
10
A
11
A
24
23
NC
NC
Pin Definitions
Pin Name SOJ, TSOP–Pin Number
I/O Type
Input
Description
Address Inputs used to select one of the address locations.
A0–A15
1–5,18–21, 24–27, 42–44
I/O1–I/O16
7–10, 13–16, 29–32,
35–38
Input/Output Bidirectional Data I/O lines. Used as input or output lines depending
on operation.
NC
WE
22, 23, 28
17
No Connect No Connects. Not connected to the die.
Input/Control Write Enable Input, active LOW. When selected LOW, a Write is
conducted. When deselected HIGH, a Read is conducted.
CE
BHE, BLE
OE
6
Input/Control Chip Enable Input, active LOW. When LOW, selects the chip. When
HIGH, deselects the chip.
39, 40
41
Input/Control Byte Write Select Inputs, active LOW. BLE controls I/O8–I/O1, BHE
controls I/O16–I/O9.
Input/Control Output Enable, active LOW. Controls the direction of the I/O pins.
When LOW, the I/O pins are allowed to behave as outputs. When
deasserted HIGH, I/O pins are three-stated, and act as input data
pins.
VSS
VCC
12, 34
11, 33
Ground
Ground for the device. Should be connected to ground of the
system.
Power Supply Power Supply inputs to the device.
Document #: 38-05145 Rev. *A
Page 2 of 10
CY7C1021B
CY7C10211B
Static Discharge Voltage............................................ >2001V
Maximum Ratings
(per MIL-STD-883, Method 3015)
(Above which the useful life may be impaired. For user guidelines,
Latch-Up Current.....................................................>200 mA
Operating Range
not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Ambient
Range
Commercial
Industrial
Temperature (TA)[3]
0°C to +70°C
VCC
Power Applied.............................................–55°C to +125°C
Supply Voltage on VCC to Relative GND[2] .... –0.5V to +7.0V
5V ± 10%
5V ± 10%
5V ± 10%
–40°C to +85°C
–40°C to +125°C
DC Voltage Applied to Outputs
in High Z State[2] ......................................–0.5V to VCC+0.5V
Automotive
DC Input Voltage[2]...................................–0.5V to VCC+0.5V
Current into Outputs (LOW).........................................20 mA
Electrical Characteristics Over the Operating Range
7C10211B-10 7C1021B-12 7C1021B-15
Min. Max. Min. Max. Min. Max. Unit
Test
Parameter
Description
Conditions
VOH
Output HIGH
VCC = Min., IOH = –4.0 mA
2.4
2.4
2.4
V
V
V
V
Voltage
VOL
VIH
VIL
IIX
Output LOW
Voltage
Input HIGH
Voltage
VCC = Min., IOL = 8.0 mA
0.4
6.0
0.8
0.4
6.0
0.8
0.4
6.0
0.8
2.2
2.2
2.2
Input LOW
−0.5
–0.5
–0.5
Voltage[2]
Input Load
Current
GND < VI < VCC
Com’l / Ind’l
−1
-
−1
-
+1
–1
-
–1
-
+1
–1
-4
–1
-4
+1
+4
+1
+4
µA
µA
µA
µA
Automotive
Com’l / Ind’l
Automotive
-
+1
-
-
+1
-
IOZ
Output Leakage GND < VI < VCC
,
Current
Output Disabled
IOS
ICC
ISB1
Output Short
VCC = Max., VOUT = GND
−300
–300
–300 mA
Circuit Current[4]
VCC Operating
Supply Current
VCC = Max., IOUT = 0 Com’l / Ind’l
150
140
130 mA
150 mA
mA, f = fMAX = 1/tRC
Automotive
-
40
-
-
40
-
Automatic CE
Power-Down
Current—TTL
Inputs
Max. VCC, CE > VIH
VIN > VIH or VIN < VIL, f
= fMAX
Com’l / Ind’l
Automotive
40
50
mA
mA
ISB2
Automatic CE
Power-Down
Max. VCC, CE > VCC – Com’l / Ind’l
10
-
0.5
10
-
0.5
10
15
0.5
mA
mA
mA
0.3V, VIN > VCC – 0.3V,
Automotive
Current—CMOS or VIN < 0.3V, f = 0
Inputs
L Version
Thermal Resistance[5]
44-lead
TSOP-II
Parameter
Description
Test Conditions
44-lead SOJ
Unit
ΘJA
Thermal Resistance Test conditions follow standard test methods and
64.32
76.89
°C/W
(Junction to Ambient) procedures for measuring thermal impedance,
per EIA / JESD51.
Thermal Resistance
ΘJC
31.03
14.28
°C/W
(Junction to Case)
Notes:
2. V (min.) = –2.0V and V (max) = V + 0.5V for pulse durations of less than 20 ns.
IL
IH
CC
3. T is the “Instant On” case temperature.
A
4. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
5. Tested initially and after any design or process changes that may affect these parameters.
Document #: 38-05145 Rev. *A
Page 3 of 10
CY7C1021B
CY7C10211B
Capacitance[5]
Parameter
Description
Input Capacitance
Output Capacitance
Test Conditions
Max.
8
8
Unit
pF
pF
CIN
COUT
TA = 25°C, f = 1 MHz,
V
CC = 5.0V
AC Test Loads and Waveforms
R 481 Ω
R 481 Ω
ALL INPUT PULSES
5V
5V
OUTPUT
3.0V
90%
10%
90%
10%
OUTPUT
R2
R2
GND
30 pF
5 pF
255Ω
255Ω
INCLUDING
JIG AND
SCOPE
INCLUDING
JIG AND
SCOPE
Rise Time: 1 V/ns
Fall Time:1 V/ns
(b)
(a)
167
1.73V
OUTPUT
Equivalent to:
THÉVENIN
EQUIVALENT
30 pF
Switching Characteristics[6] Over the Operating Range
7C10211B-10
7C1021B-12
7C1021B-15
Parameter
Read Cycle
tRC
tAA
tOHA
Description
Min.
Max.
Min.
12
3
Max.
Min.
Max.
Unit
Read Cycle Time
10
15
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z[7]
OE HIGH to High Z[7, 8]
CE LOW to Low Z[7]
CE HIGH to High Z[7, 8]
CE LOW to Power-Up
CE HIGH to Power-Down
Byte Enable to Data Valid
Byte Enable to Low Z
Byte Disable to High Z
10
12
15
3
3
tACE
tDOE
10
5
12
6
15
7
tLZOE
tHZOE
tLZCE
tHZCE
tPU
tPD
tDBE
tLZBE
tHZBE
Write Cycle[9]
tWC
tSCE
tAW
tHA
tSA
tSD
tHD
0
3
0
0
3
0
0
3
0
5
5
6
6
7
7
10
5
12
6
15
7
0
0
0
5
6
7
Write Cycle Time
CE LOW to Write End
10
8
7
0
0
12
9
8
0
0
15
10
10
0
0
8
ns
ns
ns
ns
ns
ns
ns
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
Data Set-Up to Write End
Data Hold from Write End
5
0
6
0
0
Notes:
6. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
I
/I and 30-pF load capacitance.
OL OH
7. At any given temperature and voltage condition, t
is less than t
, t
is less than t
, and t
is less than t
for any given device.
HZCE
LZCE HZOE
LZOE
HZWE
LZWE
8. t
, t
, t
, and t
are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
HZOE HZBE HZCE
HZWE
9. The internal write time of the memory is defined by the overlap of CE LOW, WE LOW and BHE / BLE LOW. CE, WE and BHE / BLE must be LOW to initiate a write,
and the transition of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.
Document #: 38-05145 Rev. *A
Page 4 of 10
CY7C1021B
CY7C10211B
Switching Characteristics[6] Over the Operating Range (continued)
7C10211B-10
7C1021B-12
7C1021B-15
Parameter
tLZWE
tHZWE
tBW
Description
Min.
3
Max.
Min.
3
Max.
Min.
3
Max.
Unit
ns
ns
WE HIGH to Low Z[7]
WE LOW to High Z[7, 8]
Byte Enable to End of Write
5
6
7
7
8
9
ns
Switching Waveforms
Read Cycle No. 1 [10, 11]
t
RC
ADDRESS
t
AA
t
OHA
DATA OUT
Read Cycle No. 2
ADDRESS
PREVIOUS DATA VALID
DATA VALID
[11, 12]
(OE Controlled)
t
RC
CE
t
ACE
OE
t
HZOE
t
DOE
BHE, BLE
t
LZOE
t
HZCE
t
DBE
t
LZBE
t
HZBE
HIGH
IMPEDANCE
HIGH IMPEDANCE
DATA OUT
VCC
DATA VALID
t
LZCE
t
PD
I
t
PU
CC
50%
50%
SUPPLY
I
CURRENT
SB
Notes:
10. Device is continuously selected. OE, CE, BHE and/or BHE = V .
IL
11. WE is HIGH for read cycle.
Document #: 38-05145 Rev. *A
Page 5 of 10
CY7C1021B
CY7C10211B
Switching Waveforms (continued)
[13, 14]
Write Cycle No. 1 (CE Controlled)
t
WC
ADDRESS
t
SA
t
SCE
CE
t
AW
t
HA
t
PWE
WE
t
BW
BHE, BLE
t
SD
t
HD
DATA I/O
Write Cycle No. 2 (BLE or BHE Controlled)
t
WC
ADDRESS
t
t
BW
SA
BHE, BLE
t
AW
t
HA
t
PWE
WE
CE
t
SCE
t
SD
t
HD
DATA I/O
Notes:
12. Address valid prior to or coincident with CE transition LOW.
13. Data I/O is high impedance if OE or BHE and/or BLE= V
.
IH
14. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
Document #: 38-05145 Rev. *A
Page 6 of 10
CY7C1021B
CY7C10211B
Switching Waveforms (continued)
Write Cycle No. 3
Controlled, LOW)
(WE
t
WC
ADDRESS
t
SCE
CE
t
AW
t
HA
t
SA
t
PWE
WE
t
BW
BHE, BLE
t
HZWE
t
SD
t
HD
DATA I/O
t
LZWE
Truth Table
CE OE WE BLE BHE
I/O1–I/O8
High Z
Data Out
Data Out
High Z
Data In
Data In
High Z
I/O9–I/O16
High Z
Mode
Power-Down
Read - All bits
Read - Lower bits only
Read - Upper bits only
Write - All bits
Write - Lower bits only
Write - Upper bits only
Power
H
L
X
L
X
H
X
L
X
L
Standby (ISB
)
Data Out
High Z
Data Out
Data In
High Z
Data In
High Z
High Z
Active (ICC
Active (ICC
Active (ICC
Active (ICC
Active (ICC
Active (ICC
Active (ICC
Active (ICC
)
)
)
)
)
)
)
)
L
H
L
H
L
L
L
X
L
L
H
L
X
H
H
X
H
L
L
H
X
H
X
High Z
High Z
Selected, Outputs Disabled
Selected, Outputs Disabled
Ordering Information
Speed
Package
Name
Operating
Range
(ns)
Ordering Code
Package Type
10
CY7C10211B-10VC
CY7C10211B-10ZC
V34
Z44
Z44
V34
V34
V34
Z44
Z44
Z44
44-Lead (400-Mil) Molded SOJ
44-Lead TSOP Type II
44-Lead TSOP Type II
44-Lead (400-Mil) Molded SOJ
44-Lead (400-Mil) Molded SOJ
44-Lead (400-Mil) Molded SOJ
44-Lead TSOP Type II
44-Lead TSOP Type II
44-Lead TSOP Type II
Commercial
Commercial
Commercial
Commercial
Industrial
Commercial
Commercial
Industrial
CY7C10211BL-10ZC
CY7C1021B-12VC
CY7C1021B-12VI
CY7C1021BL-12VC
CY7C1021B-12ZC
CY7C1021B-12ZI
CY7C1021BL-12ZC
12
Commercial
Document #: 38-05145 Rev. *A
Page 7 of 10
CY7C1021B
CY7C10211B
Ordering Information (continued)
Speed
Package
Name
Operating
Range
Commercial
(ns)
Ordering Code
CY7C1021B-15VC
CY7C1021B-15VI
CY7C1021BL-15VC
CY7C1021B-15VE
CY7C1021B-15ZC
CY7C1021B-15ZXC
CY7C1021B-15ZI
CY7C1021BL-15ZC
CY7C1021B-15ZE
Package Type
44-pin (400-Mil) Molded SOJ
44-pin (400-Mil) Molded SOJ
44-pin (400-Mil) Molded SOJ
44-pin (400-Mil) Molded SOJ
44-pin TSOP Type II
Lead (Pb)-Free, 44-pin TSOP Type II
44-pin TSOP Type II
44-pin TSOP Type II
15
V34
V34
V34
V34
Z44
Z44
Z44
Z44
Z44
Industrial
Commercial
Automotive
Commercial
Commercial
Industrial
Commercial
Automotive
44-pin TSOP Type II
Package Diagrams
44-Lead (400-Mil) Molded SOJ V34
44
23
DIMENSIONS IN INCHES MIN.
MAX.
0.395
0.405
0.435
0.445
22
1
SEATING PLANE
1.120
1.130
0.095
0.115
0.128
0.148
0.082
MIN.
0.007
0.013
0.004
0.365
0.375
0.023
0.033
0.050
TYP.
0.045
MAX.
0°-10°
0.025
MIN.
0.013
0.023
51-85082-*B
Document #: 38-05145 Rev. *A
Page 8 of 10
CY7C1021B
CY7C10211B
Package Diagrams (continued)
44-Pin TSOP II Z44
51-85087-*A
All products and company names mentioned in this document may be the trademarks of their respective holders.
Document #: 38-05145 Rev. *A
Page 9 of 10
© Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
CY7C1021B
CY7C10211B
Document History Page
Document Title: CY7C1021B/CY7C10211B 64K x 16 Static RAM
Document Number: 38-05145
Orig. of
REV.
**
*A
ECN NO. Issue Date Change
Description of Change
Change from Spec number: 38-00951 to 38-05145
1) Added Automotive Specs to Data Sheet
109889
09/22/01
SZV
RKF
238454
See ECN
2) Added Pb-Free device offering in the Ordering Information
Document #: 38-05145 Rev. *A
Page 10 of 10
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