CY62137CV30 [CYPRESS]
2M (128K x 16) Static RAM; 2M （ 128K ×16 ）静态RAM
| 型号： | CY62137CV30 |
| 厂家： | 
CYPRESS |
| 描述： | 2M (128K x 16) Static RAM |
| 文件： | 总13页 (文件大小：229K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
®
CY62137CV25/30/33 MoBL
CY62137CV MoBL
2M (128K x 16) Static RAM
Life™ (MoBL®) in portable applications such as cellular tele-
phones. The devices also has an automatic power-down fea-
ture that significantly reduces power consumption by 80%
when addresses are not toggling. The device can also be put
into standby mode reducing power consumption by more than
99% when deselected (CE HIGH or both BLE and BHE are
HIGH). The input/output pins (I/O0 through I/O15) are placed
in a high-impedance state when: deselected (CE HIGH), out-
puts are disabled (OE HIGH), both Byte High Enable and Byte
Low Enable are disabled (BHE, BLE HIGH), or during a write
operation (CE LOW, and WE LOW).
Features
• Very high speed: 55 ns and 70 ns
• Voltage range:
— CY62137CV25: 2.2V–2.7V
— CY62137CV30: 2.7V–3.3V
— CY62137CV33: 3.0V–3.6V
— CY62137CV: 2.7V–3.6V
• Pin-compatible with the CY62137V
• Ultra-low active power
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is
written into the location specified on the address pins (A0
through A16). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O8 through I/O15) is written into the location
specified on the address pins (A0 through A16).
— Typical active current: 1.5 mA @ f = 1 MHz
— Typical active current: 5.5 mA @ f = fmax (70-ns
speed)
• Low and ultra-low standby power
• Easy memory expansion with CE and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O8 to I/O15. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
• Packages offered in a 48-ball FBGA
Functional Description[1]
The CY62137CV25/30/33 and CY62137CV are high-perfor-
mance CMOS static RAMs organized as 128K words by 16
bits. These devices feature advanced circuit design to provide
ultra-low active current. This is ideal for providing More Battery
Logic Block Diagram
DATA IN DRIVERS
10
A
10
A
9
A
8
7
6
A
A
A
A
A
128K x 16
5
4
RAM Array
I/O – I/O
0
7
2048 x 1024
3
2
I/O – I/O
A
8
15
A
A
1
0
COLUMN DECODER
BHE
WE
CE
OE
BLE
CE
Power-down
Circuit
BHE
BLE
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
Cypress Semiconductor Corporation
Document #: 38-05201 Rev. *D
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
Revised September 20, 2002
®
®
CY62137CV25/30/33 MoBL
CY62137CV MoBL
Pin Configuration[2, 3]
FBGA (Top View)
1
2
4
3
5
6
A
A
A
2
NC
OE
BLE
0
1
A
A
A
4
I/O BHE
8
CE
I/O
I/O
0
B
C
3
A
A
6
I/O I/O
I/O
2
5
9
10
1
V
NC
A
7
V
I/O
I/O
3
CC
D
E
F
SS
11
V
DNU
A
16
V
CC
SS
I/O
I/O
12
4
A
A
15
I/O
I/O
I/O
I/O
6
14
13
5
14
A
A
G
H
I/O
I/O
NC
WE
13
12
15
7
A
A
9
A
A
NC
NC
10
11
8
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Latch-up Current ................................................... > 200 mA
Operating Range
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Ambient
Range Temperature TA
Device
VCC
Supply Voltage to Ground Potential –0.5V to VCCMAX + 0.5V
CY62137CV25 Industrial –40°C to +85°C 2.2V to 2.7V
DC Voltage Applied to Outputs
CY62137CV30
CY62137CV33
CY62137CV
2.7V to 3.3V
3.0V to 3.6V
2.7V to 3.6V
in High-Z State[4]....................................–0.5V to VCC + 0.3V
DC Input Voltage[4].................................... −0.5V to VCC + 0.3V
Output Current into Outputs (LOW) .............................20 mA
Product Portfolio
Power Dissipation
Operating, ICC (mA)
f = 1 MHz f = fmax
Typ.[5] Max. Typ.[5] Max. Typ.[5]
V
CC Range (V)
Standby, ISB2 (µA)
Speed
(ns)
[5]
Product
VCC(min.) VCC(typ.)
VCC(max.)
Max.
CY62137CV25LL
2.2
2.7
3.0
2.5
3.0
3.3
2.7
55
70
55
70
55
70
70
70
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
3
3
3
3
3
3
3
3
7
15
12
15
12
15
12
12
12
2
2
5
10
5.5
7
CY62137CV30LL
CY62137CV33LL
3.3
3.6
10
15
5.5
7
5.5
5.5
5.5
CY62137CVLL
CY62137CVSL
2.7V
2.7V
3.3
3.3
3.6
3.6
5
1
15
5
Notes:
2. NC pins are not connected to the die.
3. E3 (DNU) can be left as NC or VSS to ensure proper application.
4. VIL(min.) = –2.0V for pulse durations less than 20 ns.
5. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25°C.
Document #: 38-05201 Rev. *D
Page 2 of 13
®
®
CY62137CV25/30/33 MoBL
CY62137CV MoBL
Electrical Characteristics Over the Operating Range
CY62137CV25-55
CY62137CV25-70
Parameter
VOH
Description
Test Conditions
Min. Typ.[5] Max. Min. Typ.[5] Max. Unit
Output HIGH Voltage IOH = –0.1 mA
Output LOW Voltage IOL = 0.1 mA
Input HIGH Voltage
VCC = 2.2V
VCC = 2.2V
2.0
1.8
2.0
1.8
V
V
V
VOL
0.4
0.4
VIH
VCC
+
VCC +
0.3V
0.6
+1
0.3V
0.6
+1
VIL
IIX
Input LOW Voltage
–0.3
–1
–0.3
–1
V
Input Leakage Current GND < VI < VCC
µA
µA
IOZ
Output Leakage
Current
GND < VO < VCC, Output Disabled –1
+1
–1
+1
ICC
VCC Operating Supply f = fMAX = 1/tRC
VCC = 2.7V
IOUT = 0 mA
CMOS Levels
7
15
3
5.5
1.5
12
3
mA
Current
f = 1 MHz
1.5
ISB1
Automatic CE
Power-downCurrent—
CMOS Inputs
CE > VCC – 0.2V
2
10
2
10
µA
VIN > VCC – 0.2V or VIN < 0.2V,
f = fmax (Address and Data Only),
f=0 (OE, WE, BHE, and BLE)
ISB2
Automatic CE
CE > VCC – 0.2V
Power-downCurrent— VIN > VCC – 0.2V or VIN < 0.2V,
CMOS Inputs f = 0, VCC = 2.7V
CY62137CV30-55
CY62137CV30-70
Parameter
VOH
Description
Test Conditions
Min. Typ.[5] Max. Min. Typ.[5] Max. Unit
Output HIGH Voltage IOH = –1.0 mA
Output LOW Voltage IOL = 2.1 mA
Input HIGH Voltage
VCC = 2.7V
VCC = 2.7V
2.4
2.2
2.4
2.2
V
V
V
VOL
0.4
0.4
VIH
VCC
+
VCC +
0.3V
0.8
+1
0.3V
0.8
+1
VIL
IIX
Input LOW Voltage
–0.3
–1
–0.3
–1
V
Input Leakage Current GND < VI < VCC
µA
µA
IOZ
Output Leakage
Current
GND < VO < VCC, Output Disabled –1
+1
–1
+1
ICC
VCC Operating Supply f = fMAX = 1/tRC
VCC = 3.3V
IOUT = 0 mA
CMOS Levels
7
15
3
5.5
1.5
12
3
mA
Current
f = 1 MHz
1.5
ISB1
Automatic CE
Power-downCurrent—
CMOS Inputs
CE > VCC – 0.2V
2
10
2
10
µA
VIN > VCC – 0.2V or VIN < 0.2V,
f = fmax (Address and Data Only),
f=0 (OE, WE, BHE, and BLE)
ISB2
Automatic CE
Power-downCurrent— VIN > VCC – 0.2V or VIN < 0.2V,
CE > VCC – 0.2V
CMOS Inputs f = 0, VCC = 3.3V
Electrical Characteristics Over the Operating Range
CY62137CV33-70
CY62137CV-70
CY62137CV33-55
Parameter
Description
Test Conditions
Min. Typ.[5] Max. Min. Typ.[5] Max. Unit
VOH
Output HIGH Voltage
IOH = –1.0 mA
VCC = 3.0V
2.4
2.4
2.4
V
V
V
V
VCC = 2.7V
VCC = 3.0V
VCC = 2.7V
VOL
Output LOW Voltage
IOL = 2.1 mA
0.4
0.4
0.4
Document #: 38-05201 Rev. *D
Page 3 of 13
®
®
CY62137CV25/30/33 MoBL
CY62137CV MoBL
Electrical Characteristics Over the Operating Range (continued)
CY62137CV33-70
CY62137CV-70
CY62137CV33-55
Parameter
Description
Test Conditions
Min. Typ.[5] Max. Min. Typ.[5] Max. Unit
VIH
Input HIGH Voltage
2.2
VCC
0.3V
+
2.2
VCC
+
V
0.3V
0.8
+1
VIL
IIX
Input LOW Voltage
–0.3
–1
0.8 –0.3
V
Input Leakage Current
Output Leakage Current
GND < VI < VCC
+1
+1
–1
–1
µA
µA
IOZ
GND < VO < VCC, Output Dis-
abled
–1
+1
ICC
VCC Operating Supply Current f = fMAX = 1/tRC VCC = 3.6V
7
15
3
5.5
1.5
12
3
mA
IOUT = 0 mA
f = 1 MHz
1.5
CMOS
Levels
ISB1
Automatic CE
Power-down Current —CMOS
Inputs
CE > VCC – 0.2V
5
5
15
15
5
15
µA
VIN > VCC – 0.2V or VIN < 0.2V,
f=fmax (AddressandDataOnly),
f=0 (OE, WE, BHE, and BLE)
ISB2
Automatic CE
CE > VCC – 0.2V
LL
5
1
15
5
Power-down Current —CMOS VIN > VCC – 0.2V or VIN
Inputs
<
SL
0.2V,
f = 0, VCC = 3.6V
Capacitance[6]
Parameter
Description
Test Conditions
TA = 25°C, f = 1 MHz,
VCC = VCC(typ.)
Max.
Unit
pF
CIN
Input Capacitance
Output Capacitance
6
8
COUT
pF
Thermal Resistance
Parameter
Description
Test Conditions
BGA
Unit
ΘJA
Thermal Resistance
Still Air, soldered on a 3 x 4.5 inch, two-layer printed
circuit board
55
°C/W
(Junction to Ambient)[6]
ΘJC
Thermal Resistance
(Junction to Case)[6]
16
°C/W
AC Test Loads and Waveforms
R1
V
ALL INPUT PULSES
CC
V
Typ
CC
OUTPUT
90%
10%
90%
10%
GND
Rise TIme: 1 V/ns
R2
30 pF
Fall Time: 1 V/ns
INCLUDING
JIG AND
SCOPE
Equivalent to:
THÉVENIN EQUIVALENT
R
TH
OUTPUT
V
TH
Parameters
2.5V
16600
15400
8000
1.20
3.0V
3.3V
Unit
Ω
R1
R2
1105
1550
645
1216
1374
645
Ω
RTH
VTH
Ω
1.75
1.75
V
Note:
6. Tested initially and after any design or process changes that may affect these parameters.
Document #: 38-05201 Rev. *D
Page 4 of 13
®
®
CY62137CV25/30/33 MoBL
CY62137CV MoBL
Data Retention Characteristics (Over the Operating Range)
Parameter
VDR
Description
VCC for Data Retention
Conditions
Min. Typ.[5] Max. Unit
1.5
Vccmax
6
V
ICCDR
Data Retention Current
VCC= 1.5V
CE > VCC – 0.2V,
IN > VCC – 0.2V or VIN < 0.2V
LL
SL
1
µA
4
V
[6]
tCDR
Chip Deselect to Data Retention Time
Operation Recovery Time
0
ns
ns
[7]
tR
tRC
Data Retention Waveform[8]
DATA RETENTION MODE
> 1.5 V
VCC(min.)
VCC(min.)
V
V
CC
DR
t
t
R
CDR
CE or
BHE.BLE
Switching Characteristics Over the Operating Range[9]
55 ns
70 ns
Parameter
Read Cycle
Description
Min
55
Max
Min
70
Max
Unit
tRC
Read Cycle Time
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tAA
Address to Data Valid
55
70
tOHA
tACE
tDOE
tLZOE
tHZOE
tLZCE
tHZCE
tPU
Data Hold from Address Change
CE LOW to Data Valid
10
10
55
25
70
35
OE LOW to Data Valid
OE LOW to Low-Z[10]
OE HIGH to High-Z[10, 12]
CE LOW to Low-Z[10]
CE HIGH to High-Z[10, 12]
5
10
0
5
10
0
20
20
25
25
CE LOW to Power-up
tPD
CE HIGH to Power-down
BHE/BLE LOW to Data Valid
BHE/BLE LOW to Low-Z[10]
BHE/BLE HIGH to High-Z[10, 12]
55
55
70
70
tDBE
[11]
tLZBE
5
5
tHZBE
20
25
Write Cycle[13]
tWC
Write Cycle Time
55
45
70
60
ns
ns
tSCE
CE LOW to Write End
Notes:
7. Full-device AC operation requires linear VCC ramp from VDR to VCC(min.) > 100 µs or stable at VCC(min.) > 100 µs.
8. BHE.BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the chip enable signals or by disabling both BHE and BLE.
9. Test conditions assume signal transition time of 5 ns or less, timing reference levels of VCC(typ.)/2, input pulse levels of 0 to VCC(typ.), and output loading of the
specified IOL/IOH and 30-pF load capacitance.
10. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZBE is less than tLZBE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for
any given device.
11. If both byte enables are toggled together this value is 10 ns.
12. tHZOE, tHZCE, tHZBE, and tHZWE transitions are measured when the outputs enter a high impedance state.
13. The internal write time of the memory is defined by the overlap of WE, CE = VIL, BHE and/or BLE = VIL. All signals must be ACTIVE to initiate a write and any
of these signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates
the write.
Document #: 38-05201 Rev. *D
Page 5 of 13
®
®
CY62137CV25/30/33 MoBL
CY62137CV MoBL
Switching Characteristics Over the Operating Range[9] (continued)
55 ns
70 ns
Parameter
Description
Address Set-up to Write End
Address Hold from Write End
Address Set-up to Write Start
WE Pulse Width
Min
45
0
Max
Min
60
0
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
tAW
tHA
tSA
0
0
tPWE
tBW
40
50
25
0
45
60
30
0
BHE/BLE Pulse Width
tSD
Data Set-up to Write End
Data Hold from Write End
WE LOW to High-Z[10, 12]
WE HIGH to Low-Z[10]
tHD
tHZWE
tLZWE
20
25
10
10
Switching Waveforms
Read Cycle No. 1 (Address Transition Controlled)[14, 15]
t
RC
ADDRESS
t
AA
t
OHA
DATA OUT
PREVIOUS DATA VALID
DATA VALID
Read Cycle No. 2 (OE Controlled)[15, 16]
ADDRESS
CE
t
RC
t
PD
HZCE
t
t
ACE
OE
t
HZOE
tDOE
BHE/BLE
t
LZOE
t
HZBE
t
DBE
t
LZBE
HIGH
IMPEDANCE
HIGH IMPEDANCE
DATA OUT
DATA VALID
t
LZCE
t
PU
V
I
CC
CC
SUPPLY
CURRENT
50%
50%
I
SB
Notes:
14. Device is continuously selected. OE, CE = VIL, BHE, BLE = VIL
15. WE is HIGH for read cycle.
.
16. Address valid prior to or coincident with CE, BHE, BLE transition LOW.
Document #: 38-05201 Rev. *D
Page 6 of 13
®
®
CY62137CV25/30/33 MoBL
CY62137CV MoBL
Switching Waveforms (continued)
Write Cycle No. 1 (WE Controlled)[13, 17, 18]
t
WC
ADDRESS
CE
t
SCE
t
t
HA
AW
t
SA
t
PWE
WE
t
BW
BHE/BLE
OE
t
t
SD
HD
DATA VALID
DATA I/O
IN
NOTE 19
t
HZOE
[13, 17, 18]
Write Cycle No. 2 (CE Controlled)
t
WC
ADDRESS
CE
t
SCE
tSA
t
t
HA
AW
t
PWE
WE
t
BW
BHE/BLE
OE
t
t
SD
HD
VALID
DATA
DATA I/O
IN
19
NOTE
t
HZOE
Notes:
17. Data I/O is high-impedance if OE = VIH
.
18. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
19. During this period, the I/Os are in output state and input signals should not be applied.
Document #: 38-05201 Rev. *D
Page 7 of 13
®
®
CY62137CV25/30/33 MoBL
CY62137CV MoBL
Switching Waveforms (continued)
[18]
Write Cycle No. 3 (WE Controlled, OE LOW)
t
WC
ADDRESS
CE
t
SCE
t
BW
BHE/BLE
t
t
HA
AW
t
SA
t
PWE
WE
t
t
HD
SD
NOTE 19
DATAI/O
DATA VALID
IN
t
LZWE
t
HZWE
[18]
Write Cycle No. 4 (BHE/BLE Controlled, OE LOW)
t
WC
ADDRESS
CE
t
SCE
t
t
HA
AW
t
BW
BHE/BLE
WE
t
SA
t
PWE
t
t
HD
SD
DATA I/O
VALID
DATA
NOTE 19
IN
Document #: 38-05201 Rev. *D
Page 8 of 13
®
®
CY62137CV25/30/33 MoBL
CY62137CV MoBL
Typical DC and AC Parameters
(Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 2.5°C)
Operating Current vs. Supply Voltage
14.0
12.0
14.0
12.0
14.0
12.0
14.0
12.0
10.0
10.0
10.0
10.0
(f = f ,
max
55 ns)
(f = f
55 ns)
,
,
MoBL
MoBL
MoBL
MoBL
max
(f = f
55 ns)
,
max
8.0
6.0
4.0
8.0
6.0
8.0
6.0
4.0
8.0
6.0
(f = f
,
max
70 ns)
(f = f
(f = f
70 ns)
,
max
(f = f
,
max
max
70 ns)
70 ns)
4.0
4.0
2.0
0.0
2.0
0.0
2.0
0.0
2.0
0.0
(f = 1 MHz)
(f = 1 MHz
(f = 1 MHz)
2.7
(f = 1 MHz)
3.0
3.6
3.6
2.7
3.3
3.3
3.0
3.3
2.7
2.2
2.5
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Standby Current vs. Supply Voltage
12.0
12.0
12.0
10.0
12.0
MoBL
MoBL
10.0
8.0
10.0
8.0
10.0
8.0
MoBL
MoBL
8.0
6.0
4.0
2.0
0
6.0
4.0
2.0
0
6.0
4.0
2.0
0
6.0
LL
4.0
2.0
SL
0
3.3
3.0
2.2
2.7
2.7
2.5
3.3
3.6
3.0
3.3
3.6
2.7
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Access Time vs. Supply Voltage
60
50
40
30
60
60
60
MoBL
MoBL
MoBL
MoBL
50
40
30
50
40
30
50
40
30
20
20
20
20
10
0
10
0
10
0
10
0
3.6
3.0
3.3
2.2
2.5
2.7
3.0
3.6
2.7
3.3
2.7
3.3
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Document #: 38-05201 Rev. *D
Page 9 of 13
®
®
CY62137CV25/30/33 MoBL
CY62137CV MoBL
Truth Table
CE
H
X
WE
X
OE
X
BHE
X
BLE
X
Inputs/Outputs
High-Z
Mode
Deselect/Power-down
Deselect/Power-down
Read
Power
Standby (ISB
Standby (ISB
Active (ICC
Active (ICC
)
X
X
H
H
High-Z
)
L
H
L
L
L
Data Out (I/OO–I/O15
)
)
L
H
L
H
L
Data Out (I/OO–I/O7);
I/O8–I/O15 in High-Z
Read
)
L
H
L
L
H
Data Out (I/O8–I/O15);
I/O0–I/O7 in High-Z
Read
Active (ICC)
L
L
L
L
L
H
H
H
L
H
H
H
X
X
L
H
L
L
L
H
L
L
High-Z
High-Z
High-Z
Output Disabled
Output Disabled
Output Disabled
Write
Active (ICC
Active (ICC
Active (ICC
Active (ICC
Active (ICC
)
)
)
L
Data In (I/OO–I/O15
)
)
L
H
Data In (I/OO–I/O7);
I/O8–I/O15 in High-Z
Write
)
L
L
X
L
H
Data In (I/O8–I/O15);
I/O0–I/O7 in High-Z
Write
Active (ICC)
Ordering Information
Speed
Voltage
Package
Name
Operating
Range
(ns)
Ordering Code
Range (V)
2.2–2.7
2.2–2.7
2.7–3.3
2.7–3.3
3.0–3.6
3.0–3.6
2.7–3.6
2.7–3.6
2.7–3.6
2.7–3.6
2.2–2.7
2.2–2.7
2.7–3.3
2.7–3.3
3.0–3.6
3.0–3.6
Package Type
70
CY62137CV25LL-70BAI
CY62137CV25LL-70BVI
CY62137CV30LL-70BAI
CY62137CV30LL-70BVI
CY62137CV33LL-70BAI
CY62137CV33LL-70BVI
CY62137CVLL-70BAI
CY62137CVLL-70BVI
CY62137CVSL-70BAI
CY62137CVSL-70BVI
CY62137CV25LL-55BAI
CY62137CV25LL-55BVI
CY62137CV30LL-55BAI
CY62137CV30LL-55BVI
CY62137CV33LL-55BAI
CY62137CV33LL-55BVI
BA48A 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm)
BV48A 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm)
BA48A 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm)
BV48A 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm)
BA48A 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm)
BV48A 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm)
BA48A 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm)
BV48A 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm)
BA48A 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm)
BV48A 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm)
BA48A 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm)
BV48A 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm)
BA48A 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm)
BV48A 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm)
BA48A 48-ball Fine Pitch BGA (7 mm x 7 mm x 1.2 mm)
BV48A 48-ball Fine Pitch BGA (6 mm x 8 mm x 1 mm)
Industrial
55
Document #: 38-05201 Rev. *D
Page 10 of 13
®
®
CY62137CV25/30/33 MoBL
CY62137CV MoBL
Package Diagrams
48-ball (7.00 mm x 7.00 mm x 1.2 mm) FBGA BA48A
51-85096-*E
Document #: 38-05201 Rev. *D
Page 11 of 13
®
®
CY62137CV25/30/33 MoBL
CY62137CV MoBL
Package Diagrams (continued)
48-ball VFBGA (6 x 8 x 1 mm) BV48A
51-85150-*A
MoBL is a registered trademark and More Battery Life is a trademark of Cypress Semiconductor Corporation. All product and
company names mentioned in this document may be the trademarks of their respective holders.
Document #: 38-05201 Rev. *D
Page 12 of 13
© Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
®
®
CY62137CV25/30/33 MoBL
CY62137CV MoBL
Document History Page
Document Title: CY62137CV25/30/33 MoBL® and CY62137CV MoBL® 2M (128K x 16) Static RAM
Document Number: 38-05201
Orig. of
REV. ECN NO. Issue Date Change
Description of Change
New Data Sheet (advance information)
**
112393
114015
02/19/02
04/25/02
GAV
JUI
*A
Added BV package diagram
Changed from Advance Information to Preliminary
*B
*C
117064
118122
07/12/02
09/10/02
MGN
MGN
Changed from Preliminary to Final
Added new part number: CY62137CV with wider voltage (2.7V – 3.6V).
Added new SL power bin for new part number.
For TAA = 55 ns, improved tPWE min. from 45 ns to 40 ns.
For TAA = 70 ns, improved tPWE min. from 50 ns to 45 ns.
For TAA = 70 ns, improved tLZWE min. from 5 ns to 10 ns.
*D
118761
09/23/02
MGN
Improved Typ. ICC spec to 7 mA (for 55 ns) and 5.5 mA (for 70 ns).
Improved Max ICC spec to 15 mA (for 55 ns) and 12 mA (for 70 ns).
For TAA = 55 ns, improved tLZWE min. from 5 ns to 10 ns.
Changed upper spec. for Supply Voltage to Ground Potential to VCCMAX + 0.5V.
Changed upper spec. for DC Voltage Applied to Outputs in High-Z State and DC
Input Voltage to VCC + 0.3V.
Document #: 38-05201 Rev. *D
Page 13 of 13
相关型号：
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