CS4172XN16 [CHERRY]
Single Air-Core Gauge Driver; 单空芯仪表驱动器
| 型号： | CS4172XN16 |
| 厂家： | 
CHERRY SEMICONDUCTOR CORPORATION |
| 描述： | Single Air-Core Gauge Driver |
| 文件： | 总6页 (文件大小：162K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CS4172
Single Air-Core Gauge Driver
Features
Description
The CS4172 is a monolithic BiCMOS
225¡, and 315¡ angles. This increased
torque reduces the error due to pointer
droop at these critical angles.
■ Serial Input Bus
integrated circuit used to translate a
digital 10-bit word from a micropro-
cessor/microcontroller to complemen-
tary DC outputs. The DC outputs
drive an air-core meter commonly
used in vehicle instrument panels. The
10 bits of data are used to linearly con-
trol the quadrature coils of the meter
directly with a 0.35¡ resolution and
±1.0¡ accuracy over the full 360¡ range
of the gauge. The interface from the
microcontroller is by a Serial Periph-
eral Interface (SPI) compatible serial
connection using up to a 2MHz shift
clock rate.
■ 2 MHz Operating
Each output buffer is capable of sup-
plying up to 80mA per coil and are
controlled by a common enable pin.
When OE is low the output buffers are
turned off but the logic portion of the
chip remains powered and continues
to operate normally.
Frequency
■ Tangential Drive
Algorithm
■ 80mA Drive Circuits
■ 0.5¡ Accuracy (Typ.)
■ Power-On-Reset
The Serial Gauge Driver is self-protect-
ed against output short circuit condi-
tions. The output drivers are disabled
anytime the on-chip protection circuit-
ry detects a short circuit condition. The
outputs remain off until a falling edge
is presented on CS. If the short circuit
is still present the output drivers auto-
matically disable themselves again. A
thermal protection circuit limits the
junction temperature to approximately
160¡C for conditions of high supply
voltage and high ambient temperature.
■ Protection Features
Output Short Circuit
Overtemperature
The digital code, which is directly pro-
portional to the desired gauge pointer
deflection, is shifted into a DAC and
multiplexer. These two blocks provide
a tangential conversion function to
change the digital data into the appro-
priate DC coil voltage for the angle
demanded. The tangential algorithm
creates approximately 40% more
Package Options
16 Lead PDIP
The status pin (ST) reflects the state of
the outputs and is low whenever the
outputs are disabled.
+
-
-
1
COS
COS
Gnd
Gnd
NC
SIN
torque in the meter movement than
does a sin-cos algorithm at 45¡, 135¡,
+
SIN
Gnd
VBB
Block Diagram
SO
SI
ST
CS
VBB
VCC
VCC
OE
SCLK
POR
LOGIC
SIN+
16 Lead SO Wide
SI
VTOP
VVAR
VBAT
Serial
to
Parallel
Shift
(internally fused leads)
7 Bit
DAC
SCLK
CS
SINÐ
MUX
D0 Ð D6
+
-
1
COS
COS
SO
SIN
COS+
COSÐ
+
SIN
-
Register
SO
VBB
Gnd
Gnd
SI
D7 Ð D9
Gnd
Gnd
Output
Amplifiers
OC
R
S
S
FAULT
Latch
ST
CS
POR
VCC
OE
ST
SCLK
OE
Gnd
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
Rev. 4/19/99
1
A
¨
Company
Absolute Maximum Ratings
Supply Voltage
VBB ....................................................................................................................................................................-1.0V to 15.0V
VCC ......................................................................................................................................................................-1.0V to 6.0V
Digital Inputs ..............................................................................................................................................................-1.0V to 6.0V
Ground Potential Difference (|AGnd-DGnd|)....................................................................................................................0.5V
Steady State Output Current ............................................................................................................................................±100mA
Forced Injection Current (Inputs and Supply).................................................................................................................±10mA
Operating Junction Temperature (TJ)..................................................................................................................................150¡C
Storage Temperature Range .................................................................................................................................-65¡C to 150¡C
Lead Temperature Soldering
Wave Solder (through hole styles only) .....................................................................................10 sec. max, 260¡C peak
Reflow (SMD styles only) ......................................................................................60 sec. max above 183¡C, 230¡C peak
ESD Susceptibility (Human Body Model)..............................................................................................................................2kV
Electrical Characteristics: -40¡C ² TA ² 105¡C; 7.5V ² VBB ² 14V; 4.5V ² VCC ² 5.5V (unless otherwise specified)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
■ Supply Voltages and Currents
VBB Quiescent Current
Output disabled (OE = 0V)
[RCOS, RSIN = RL(MIN)] @45¡
(code = XÕ080) VBB = 14V
1
5
175
mA
mA
VCC Quiescent Current
OE = high, VBB = 0V
SCLK = 2.0MHz
1
mA
V
■ Digital Inputs and Outputs
Output High Voltage
SO, IOH = 0.8mA
VCC - 0.8
Output Low Voltage
SO, IOL =0.8mA
ST, IOL = 2.5mA
0.4
0.8
V
V
Output High Current
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
ST, VCC = 5.0V
25
µA
V
CS, SCLK, SI, OE
0.7 ´ VCC
CS, SCLK, SI, OE
0.3 ´ VCC
V
CS, SCLK, SI, OE; VIN = 0.7 ´ VCC
CS, SCLK, SI, OE; VIN = 0.3 ´ VCC
1
1
µA
µA
■ Analog Outputs
Output Function Accuracy
-1.2
70
+1.2
250
deg
mA
Output Shutdown Current,
Source
VBB = 14.0V
VBB = 14.0V
VBB = 7.5V
VBB = 7.5V
Output Shutdown Current,
Sink
70
43
43
250
250
250
mA
mA
mA
V
Output Shutdown Current,
Source
Output Shutdown Current,
Sink
Coil Drive Output Voltage
Minimum Load Resistance
0.748 ´ VBB
TA = 105¡C
TA = 25¡C
TA = -40¡C
229
171
150
½
½
½
2
Electrical Characteristics: -40¡C ² TA ² 105¡C; 7.5V ² VBB ² 14V; 4.5V ² VCC ² 5.5V (unless otherwise specified)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Shift Clock Frequency
SCLK High Time
SCLK Low Time
SO Rise Time
2.0
MHz
ns
175
175
ns
0.75V to VCC - 1.2V; CL = 90pF
0.75V to VCC - 1.2V; CL = 90pF
CL = 90pF
150
150
150
ns
SO Fall Time
ns
SO Delay Time
SI Setup Time
ns
75
75
0
ns
SI Hold Time
ns
CS Setup Time
CS Hold Time
ns
75
ns
Package Pin Description
PACKAGE PIN#
PIN SYMBOL
FUNCTION
16 Lead SO Wide
16 Lead PDIP
1
1
SIN-
SIN+
VBB
Gnd
SI
Negative output for SINE coil.
Positive output for SINE coil.
Analog supply. Nominally 13.5V.
Ground.
2
2
3
4,5,12,13
6
4
3,13,14
6
Serial data input. Data present at the rising edge of the
clock signal is shifted into the internal shift register.
7
7
VCC
5V logic supply. The internal registers and latches are
reset by a POR generated by the rising edge of the voltage
on this pin.
8
9
8
9
OE
Controls the state of the output buffers. A logic low on
this pin turns them off.
SCLK
Serial clock for shifting in/out of data. Rising edge shifts
data on SI into the shift register and the falling edge
changes the data on SO.
10
10
CS
When high allows data at SI to be shifted into part with
the rising edges of SCLK. The falling edge transfers the
shift register contents into the DAC and multiplexer to
update the output buffers. The falling edge also re-enables
the output drivers if they have been disabled by a fault.
11
14
11
5
ST
STATUS reflects the state of the outputs and is low any-
time the outputs are disabled, either by OE or the internal
protection circuitry. Requires external pull-up resistor.
SO
Serial data output. Existing 10-bit data is shifted out when
new data is shifted in. Allows cascading of multiple
devices on common serial port.
15
16
15
16
12
COS-
COS+
NC
Negative output for COSINE coil.
Positive output for COSINE coil.
No connection.
3
Applications Information
Quadrant II
Theory of Operation
VSIN+ Ð VSIN-
VCOS+ Ð VCOS-
q = 180¡ Ð Tan-1
The SACD is for interfacing between a microcontroller or
microprocessor and air-core meter movements commonly
used in automotive vehicles for speedometers and
tachometers. These movements are built using 2 coils
placed at a 90¡ orientation to each other. A magnetized
disc floats in the middle of the coils and responds to the
magnetic field generated by each coil. The disc has a shaft
attached to it that protrudes out of the assembly. A point-
er indicator is attached to this shaft and in conjunction
with a separate printed scale displays the vehicleÕs speed
or the engineÕs speed.
[
]
For q = 90.176¡ to 134.824¡:
VSIN = 0.748 ´ VBB
VCOS = -Tan(q Ð 90¡) ´ 0.748 ´ VBB
For q = 135.176¡ to 179.824¡:
V
SIN = Tan(180¡ Ð q) ´ 0.748 ´ VBB
VCOS = -0.748 ´ VBB
The disc (and pointer) respond to the vector sum of the
voltages applied to the coils. Ideally, this relationship fol-
Quadrant III
q = 180¡ + Tan-1
VSIN+ Ð VSIN-
VCOS+ Ð VCOS-
sine
cosine
[
]
lows a
equation. Since this is a transcendental and
non-linear function, devices of this type use an approxi-
mation for this relationship. The SACD uses a tangential
algorithm as shown in Figure 1. Only 1 output varies in
any 45 degree range.
For q = 180.176¡ to 224.824¡:
VSIN = -Tan(q Ð 180¡) ´ 0.748 ´ VBB
VCOS = -0.748 ´ VBB
For q = 225.176¡ Ð 269.824¡:
VSIN = -0.748 ´ VBB
Degrees of Rotation
0°
45°
90°
135°
180°
225°
270°
315°
360°
Max (128)
VCOS = -Tan(270¡ Ð q) ´ 0.748 ´ VBB
+
SIN
Output
Min (0)
Quadrant IV
Max (128)
Ð
SIN
VSIN+ Ð VSIN-
VCOS+ Ð VCOS-
q = 360¡ Ð Tan-1
Output
Min (0)
[
]
Max (128)
For q = 270.176¡ to 314.824¡:
VSIN = -0.748 ´ VBB
+
COS
Output
Min (0)
VCOS = Tan(q Ð 270¡) ´ 0.748 ´ VBB
Max (128)
Ð
COS
Output
For q = 315.176¡ Ð 359.824¡:
VSIN = -Tan(360¡ Ð q) ´ 0.748 ´ VBB
VCOS = 0.748 ´ VBB
Min (0)
000
001
010
011
100
101
110
111
000
MUX bits (D9 Ð D7)
Figure 1. Major gauge outputs.
VCOS+
360/0°
Quadrant I
0.748VBB
VSIN+ Ð VSIN-
VCOS+ Ð VCOS-
q = Tan-1
q
[
]
IV
I
270°
VSINÐ
90°
VSIN+
For q = 0.176¡ to 44.824¡:
VSIN = Tanq ´ 0.748 ´ VBB
VCOS = 0.748 ´ VBB
0.748VBB
0.748VBB
II
III
For q = 45.176¡ to 89.824¡:
VSIN = 0.748 ´ VBB
0.748VBB
VCOS = Tan(90¡ Ð q) ´ 0.748 ´ VBB
180°
VCOS-
Graph 1. Major gauge response.
4
Applications Information: continued
To drive the gaugeÕs pointer to a particular angle, the
register changes at SO on the falling edge of SCLK. This
arrangement allows the cascading of devices. SO is
always enabled. Data shifts through without affecting the
outputs until CS is brought low. At this time the internal
DAC is updated and the outputs change accordingly.
microcontroller sends a 10-bit digital word into the serial
port. These 10 bits are divided as shown in Figure 2.
However, from a software programmers viewpoint, a
360¡ circle is divided into 1024 equal parts of .35¡ each.
Table 1 shows the data associated with the 45¡ divisions
of the 360¡ driver.
CS
CSHold
CSSetup
MSB
D9
LSB
D0
SCLK
Major
Gauge
(360°)
D8
D7
D6
D5
D4
D3
D2
D1
SI(Setup)
SI(Hold)
D9 Ð D7 select
which octant
Divides a 45° octant into 128 equal parts
to achieve a .35° resolution
Code 0 Ð 12710
SI
Figure 2. Definition of serial word.
SO(Rise, Fall)
10% - 90%
SO
SO(tpd)
Input Code
(Decimal) Degrees
Ideal
Nominal
Degrees
VSIN
(V)
VCOS
(V)
Figure 3. Serial data timing diagram.
0
0
45
90
135
180
225
270
315
359.65
0.176
45.176
90.176
135.176
180.176
225.176
270.176
315.176
359.826
0.032
10.476
10.476
10.412
-0.032
-10.476
-10.476
-10.476
-0.032
10.476
10.412
-0.032
-10.476
-10.476
-10.412
0.032
128
256
384
512
640
768
896
1023
VCC
CS
SI
10 Bits
10 Bits
10.476
10.476
OE
ST
Table 1. Nominal output for major gauge (VBB = 14V).
The 10 bits are shifted into the deviceÕs shift register MSB
first using an SPI compatible scheme. This method is
shown in Figure 3. The CS must be high and remain high
for SCLK to be enabled. Data on SI is shifted in on the ris-
ing edge of the synchronous clock signal. Data in the shift
OUTPUTS
ENABLED
OUTPUTS
ENABLED
Figure 4. Power-up sequence.
Application Diagram
VBAT
5V
VREG
12V
CS-8156
ENABLE
360° Gauge
SIN-
10k
COS+
COS-
VBB
SIN+
ST
VCC
CS
SI
SCLK
CS4172
Microcontroller
SO
Next Driver
OE
5
Package Specification
Thermal
PACKAGE THERMAL DATA
PACKAGE DIMENSIONS IN mm (INCHES)
D
16 Lead
PDIP
42
16 Lead
SO Wide*
18
Data
Lead Count
Metric
Max Min
English
Max Min
RQJC typ
ûC/W
ûC/W
RQJA typ
80
75
16 Lead PDIP
16 Lead SO Wide*
19.69
10.50
18.67 .775 .735
10.10 .413 .398
Plastic DIP (N); 300 mil wide
7.11 (.280)
6.10 (.240)
1.77 (.070)
1.14 (.045)
8.26 (.325)
7.62 (.300)
2.54 (.100) BSC
3.68 (.145)
2.92 (.115)
0.39 (.015)
MIN.
.356 (.014)
.203 (.008)
.558 (.022)
.356 (.014)
Some 8 and 16 lead
packages may have
1/2 lead at the end
of the package.
REF: JEDEC MS-001
D
All specs are the same.
Surface Mount Wide Body (DW); 300 mil wide
7.60 (.299)
7.40 (.291)
10.65 (.419)
10.00 (.394)
0.51 (.020)
0.33 (.013)
1.27 (.050) BSC
2.49 (.098)
2.24 (.088)
2.65 (.104)
2.35 (.093)
0.32 (.013)
0.23 (.009)
1.27 (.050)
0.40 (.016)
0.30 (.012)
0.10 (.004)
D
REF: JEDEC MS-013
Ordering Information
Part Number
CS4172XN16
CS4172XDWF16
Description
16 Lead PDIP
16 Lead SO Wide*
Cherry Semiconductor Corporation reserves the right to
make changes to the specifications without notice. Please
contact Cherry Semiconductor Corporation for the latest
available information.
CS4172XDWFR16 16 Lead SO Wide* (tape & reel)
*Internally Fused Leads
Rev. 4/19/99
© 1999 Cherry Semiconductor Corporation
6
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