CET4435A [CET]

P-Channel Enhancement Mode Field Effect Transistor; P沟道增强型场效应晶体管
CET4435A
型号: CET4435A
厂家: CHINO-EXCEL TECHNOLOGY    CHINO-EXCEL TECHNOLOGY
描述:

P-Channel Enhancement Mode Field Effect Transistor
P沟道增强型场效应晶体管

晶体 晶体管 场效应晶体管
文件: 总4页 (文件大小:111K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CET4435A  
P-Channel Enhancement Mode Field Effect Transistor  
FEATURES  
-30V, -8.8A, RDS(ON) = 24m@VGS = -10V.  
RDS(ON) = 35m@VGS = -4.5V.  
High dense cell design for extremely low RDS(ON)  
.
Rugged and reliable.  
D
Lead free product is acquired.  
SOT-223 package.  
G
D
S
D
G
SOT-223  
S
ABSOLUTE MAXIMUM RATINGS TA = 25 C unless otherwise noted  
Parameter  
Symbol  
VDS  
VGS  
ID  
Limit  
Units  
Drain-Source Voltage  
-30  
V
V
A
A
Gate-Source Voltage  
Drain Current-Continuous  
Drain Current-Pulsed a  
±20  
-8.8  
-35  
IDM  
Maximum Power Dissipation  
PD  
3
W
C
Operating and Store Temperature Range  
TJ,Tstg  
-55 to 150  
Thermal Characteristics  
Parameter  
Symbol  
Limit  
Units  
Thermal Resistance, Junction-to-Ambient b  
RθJA  
42  
C/W  
Rev 1. 2006.January  
http://www.cetsemi.com  
Specification and data are subject to change without notice .  
7 - 42  
CET4435A  
Electrical Characteristics TA = 25 C unless otherwise noted  
Parameter  
Off Characteristics  
Symbol  
Test Condition  
Min  
Typ  
Max  
Units  
Drain-Source Breakdown Voltage  
Zero Gate Voltage Drain Current  
Gate Body Leakage Current, Forward  
Gate Body Leakage Current, Reverse  
On Characteristics c  
BVDSS  
IDSS  
VGS = 0V, ID = -250µA  
VDS = -24V, VGS = 0V  
VGS = 20V, VDS = 0V  
VGS = -20V, VDS = 0V  
-30  
V
-1  
µA  
nA  
nA  
IGSSF  
IGSSR  
100  
-100  
5
7
Gate Threshold Voltage  
Static Drain-Source  
VGS(th)  
RDS(on)  
VGS = VDS, ID = -250µA  
VGS = -10V, ID = -8.8A  
VGS = -4.5V, ID = -5A  
-1  
-3  
24  
35  
V
20  
27  
mΩ  
mΩ  
On-Resistance  
Dynamic Characteristics d  
Forward Transconductance  
Input Capacitance  
gFS  
Ciss  
Coss  
Crss  
VDS = -15V, ID = -8.8A  
12  
2220  
550  
230  
S
pF  
pF  
pF  
VDS = -15V, VGS = 0V,  
f = 1.0 MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Switching Characteristics d  
Turn-On Delay Time  
td(on)  
tr  
td(off)  
tf  
12  
6
24  
18  
ns  
ns  
VDD = -15V, ID = -1A,  
VGS = -10V, RGEN = 6Ω  
Turn-On Rise Time  
Turn-Off Delay Time  
110  
35  
22  
7
140  
70  
ns  
Turn-Off Fall Time  
ns  
Total Gate Charge  
Qg  
28  
nC  
nC  
nC  
VDS = -15V, ID = -4.6A,  
VGS = -5V  
Gate-Source Charge  
Qgs  
Qgd  
Gate-Drain Charge  
8
Drain-Source Diode Characteristics and Maximun Ratings  
Drain-Source Diode Forward Current b  
Drain-Source Diode Forward Voltage c  
IS  
-2.1  
-1.2  
A
V
VSD  
VGS = 0V, IS = -2.1A  
Notes :  
a.Repetitive Rating : Pulse width limited by maximum junction temperature.  
b.Surface Mounted on FR4 Board, t < 10 sec.  
c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.  
d.Guaranteed by design, not subject to production testing.  
7 - 43  
CET4435A  
25  
20  
15  
10  
30  
24  
18  
12  
6
-VGS=10,8,7,6,5V  
25 C  
-VGS=4V  
5
0
-VGS=3V  
TJ=125 C  
-55 C  
4
0
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
0
1
2
3
5
6
-VDS, Drain-to-Source Voltage (V)  
-VGS, Gate-to-Source Voltage (V)  
Figure 1. Output Characteristics  
Figure 2. Transfer Characteristics  
3000  
2500  
2000  
1500  
1000  
500  
2.2  
1.9  
1.6  
1.3  
1.0  
0.7  
0.4  
ID=-8.8A  
VGS=-10V  
C
iss  
C
oss  
C
rss  
0
0
5
10  
15  
20  
25  
-100  
-50  
0
50  
100  
150  
200  
-VDS, Drain-to-Source Voltage (V)  
TJ, Junction Temperature( C)  
Figure 3. Capacitance  
Figure 4. On-Resistance Variation  
with Temperature  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
0.6  
VDS=VGS  
V
GS=0V  
ID=-250µA  
101  
100  
10-1  
-50 -25  
0
25 50 75 100 125 150  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
TJ, Junction Temperature( C)  
-VSD, Body Diode Forward Voltage (V)  
Figure 5. Gate Threshold Variation  
with Temperature  
Figure 6. Body Diode Forward Voltage  
Variation with Source Current  
7 - 44  
CET4435A  
102  
101  
100  
10-1  
10-2  
10  
8
VDS=-15V  
ID=-4.6A  
RDS(ON)Limit  
1ms  
10ms  
100ms  
1s  
6
DC  
4
2
TA=25 C  
TJ=150 C  
Single Pulse  
0
10-2  
10-1  
100  
101  
102  
0
5
10  
15  
20  
25  
30  
7
Qg, Total Gate Charge (nC)  
-VDS, Drain-Source Voltage (V)  
Figure 7. Gate Charge  
Figure 8. Maximum Safe  
Operating Area  
VDD  
on  
t
toff  
d(off)  
t
r
t
d(on)  
OUT  
RL  
t
f
t
VIN  
90%  
10%  
90%  
D
OUT  
V
V
VGS  
10%  
INVERTED  
RGEN  
G
90%  
50%  
50%  
S
IN  
V
10%  
PULSE WIDTH  
Figure 10. Switching Waveforms  
Figure 9. Switching Test Circuit  
100  
D=0.5  
0.2  
10-1  
0.1  
0.05  
0.02  
PDM  
t1  
t2  
0.01  
10-2  
1. RθJA (t)=r (t) * RθJA  
2. RθJA=See Datasheet  
3. TJM-TA = P* RθJA (t)  
4. Duty Cycle, D=t1/t2  
Single Pulse  
10-3  
10-4  
10-3  
10-2  
10-1  
100  
101  
102  
Square Wave Pulse Duration (sec)  
Figure 11. Normalized Thermal Transient Impedance Curve  
7 - 45  

相关型号:

CET451AN

N-Channel Enhancement Mode Field Effect Transistor
CET

CET453N

N-Channel Enhancement Mode Field Effect Transistor
CET

CET6426

N-Channel Enhancement Mode Field Effect Transistor
CET

CET6861

P-Channel Enhancement Mode Field Effect Transistor
CET

CET9435A

P-Channel Enhancement Mode MOSFET
CET

CETMK107BJ223KA-T

Ceramic Capacitor, Multilayer, Ceramic, 25V, 10% +Tol, 10% -Tol, X5R, 15% TC, 0.022uF, Surface Mount, 0603, CHIP, ROHS COMPLIANT
TAIYO YUDEN

CETMK212F103Z-TE

Ceramic Capacitor, Multilayer, Ceramic, 25V, Y5V, -82/+22ppm/Cel TC, 0.01uF, 0805
TAIYO YUDEN

CETMK212F104Z-TE

Ceramic Capacitor, Multilayer, Ceramic, 25V, Y5V, -82/+22ppm/Cel TC, 0.1uF, 0805
TAIYO YUDEN

CETMK212F154Z-BE

Ceramic Capacitor, Multilayer, Ceramic, 25V, Y5V, -82/+22ppm/Cel TC, 0.15uF, 0805
TAIYO YUDEN

CETMK212F155Z-BE

Ceramic Capacitor, Multilayer, Ceramic, 25V, Y5V, -82/+22ppm/Cel TC, 1.5uF, 0805
TAIYO YUDEN

CETMK212F155Z-T

Ceramic Capacitor, Multilayer, Ceramic, 25V, Y5V, -82/+22ppm/Cel TC, 1.5uF, 0805
TAIYO YUDEN

CETMK212F223Z-TE

Ceramic Capacitor, Multilayer, Ceramic, 25V, Y5V, -82/+22ppm/Cel TC, 0.022uF, 0805
TAIYO YUDEN