CEP80N75 [CET]
N-Channel Enhancement Mode Field Effect Transistor; N沟道增强型网络场效晶体管
| 型号： | CEP80N75 |
| 厂家： | 
CHINO-EXCEL TECHNOLOGY |
| 描述： | N-Channel Enhancement Mode Field Effect Transistor |
| 文件： | 总4页 (文件大小：397K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CEP80N75/CEB80N75
CEF80N75
N-Channel Enhancement Mode Field Effect Transistor
FEATURES
Type
VDSS
75V
75V
75V
RDS(ON)
13mΩ
13mΩ
13mΩ
ID
@VGS
10V
CEP80N75
CEB80N75
CEF80N75
80A
80A
80A e
10V
10V
D
Super high dense cell design for extremely low RDS(ON)
High power and current handing capability.
Lead free product is acquired.
.
TO-220 & TO-263 & TO-220F full-pak for through hole.
G
S
CEB SERIES
TO-263(DD-PAK)
CEP SERIES
TO-220
CEF SERIES
TO-220F
ABSOLUTE MAXIMUM RATINGS T = 25 C unless otherwise noted
c
Limit
Parameter
Symbol
Units
TO-220/263
TO-220F
Drain-Source Voltage
VDS
VGS
ID
75
V
V
Gate-Source Voltage
±20
80
320
200
1.3
880
45
80 e
320 e
75
Drain Current-Continuous
Drain Current-Pulsed a
A
f
IDM
A
Maximum Power Dissipation @ TC = 25 C
- Derate above 25 C
Single Pulsed Avalanche Energy d
Single Pulsed Avalanche Current d
Operating and Store Temperature Range
W
W/ C
mJ
A
PD
0.5
EAS
IAS
880
45
TJ,Tstg
-55 to 175
C
Thermal Characteristics
Parameter
Symbol
RθJC
Limit
Units
C/W
C/W
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
0.75
62.5
2
RθJA
65
Rev 2. 2007.Feb
http://www.cetsemi.com
Details are subject to change without notice .
1
CEP80N75/CEB80N75
CEF80N75
Electrical Characteristics T = 25 C unless otherwise noted
c
Parameter
Off Characteristics
Symbol
Test Condition
Min
Typ
Max
Units
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
On Characteristics b
BVDSS
IDSS
VGS = 0V, ID = 250µA
VDS = 60V, VGS = 0V
VGS = 20V, VDS = 0V
VGS = -20V, VDS = 0V
75
V
1
µA
nA
nA
IGSSF
IGSSR
100
-100
Gate Threshold Voltage
Static Drain-Source
VGS(th)
RDS(on)
VGS = VDS, ID = 250µA
VGS = 10V, ID = 40A
2
4
V
10
13
mΩ
On-Resistance
Dynamic Characteristics c
Forward Transconductance
Input Capacitance
gFS
Ciss
Coss
Crss
VDS = 15V, ID = 40A
45
3550
580
40
S
pF
pF
pF
VDS = 25V, VGS = 0V,
f = 1.0 MHz
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics c
Turn-On Delay Time
td(on)
tr
td(off)
tf
24
5
48
10
ns
ns
VDD = 37.5V, ID = 45A,
VGS = 10V, RGEN = 4.7Ω
Turn-On Rise Time
Turn-Off Delay Time
61
122
36
ns
Turn-Off Fall Time
18
ns
Total Gate Charge
Qg
79.3
20.6
25.9
105.5
nC
nC
nC
VDS = 60V, ID = 75A,
VGS = 10V
Gate-Source Charge
Qgs
Qgd
Gate-Drain Charge
Drain-Source Diode Characteristics and Maximun Ratings
g
Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage b
IS
75
A
V
VSD
VGS = 0V, IS = 75A
1.5
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature .
b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2% .
c.Guaranteed by design, not subject to production testing.
d.L =0.87mH, I =45A, V = 38V, R = 25Ω, Starting T = 25 C .
AS
DD
G
J
e.Limited only by maximum temperature allowed .
f .Pulse width limited by safe operating area .
g.Full package I
= 51A .
S(max)
2
CEP80N75/CEB80N75
CEF80N75
50
40
30
20
120
100
VGS=10,9,8,7V
V
GS=6V
75
50
25
0
25 C
V
GS=5V
10
0
-55 C
4
TJ=125 C
1
0
0.5
1
1.5
2
0
2
3
5
VDS, Drain-to-Source Voltage (V)
VGS, Gate-to-Source Voltage (V)
Figure 1. Output Characteristics
Figure 2. Transfer Characteristics
2.6
2.2
1.8
1.4
1.0
0.6
0.2
6000
5000
4000
3000
2000
1000
0
ID=40A
VGS=10V
C
iss
C
oss
C
rss
0
5
10
15
20
25
-100
-50
0
50
100
150
200
VDS, Drain-to-Source Voltage (V)
TJ, Junction Temperature( C)
Figure 3. Capacitance
Figure 4. On-Resistance Variation
with Temperature
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
VDS=VGS
ID=250µA
V
GS=0V
102
101
100
-50 -25
0
25 50 75 100 125 150
0.4
0.6
0.8
1.0
1.2
1.4
TJ, Junction Temperature( C)
VSD, Body Diode Forward Voltage (V)
Figure 5. Gate Threshold Variation
with Temperature
Figure 6. Body Diode Forward Voltage
Variation with Source Current
3
CEP80N75/CEB80N75
CEF80N75
103
10
8
VDS=60V
ID=75A
RDS(ON)Limit
102
100µs
6
1ms
10ms
DC
4
101
2
TC=25 C
TJ=175 C
Single Pulse
100
0
10-1
100
101
102
0
15
30
45
60
75
90
Qg, Total Gate Charge (nC)
VDS, Drain-Source Voltage (V)
Figure 7. Gate Charge
Figure 8. Maximum Safe
Operating Area
VDD
on
t
toff
d(off)
t
r
t
d(on)
OUT
RL
t
f
t
VIN
90%
10%
90%
D
OUT
V
V
VGS
10%
INVERTED
RGEN
G
90%
50%
50%
S
IN
V
10%
PULSE WIDTH
Figure 10. Switching Waveforms
Figure 9. Switching Test Circuit
100
D=0.5
0.2
0.1
PDM
10-1
0.05
0.02
0.01
t1
t2
1. Rθ JC (t)=r (t) * Rθ JC
2. Rθ JC=See Datasheet
3. TJM-TC = P* Rθ JC (t)
4. Duty Cycle, D=t1/t2
Single Pulse
10-2
10-2
10-1
100
101
102
103
104
Square Wave Pulse Duration (msec)
Figure 11. Normalized Thermal Transient Impedance Curve
4
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