CAT660ESA-TE13 [CATALYST]

100mA CMOS Charge Pump Inverter/Doubler; 百毫安CMOS电荷泵逆变器/倍增
CAT660ESA-TE13
型号: CAT660ESA-TE13
厂家: CATALYST SEMICONDUCTOR    CATALYST SEMICONDUCTOR
描述:

100mA CMOS Charge Pump Inverter/Doubler
百毫安CMOS电荷泵逆变器/倍增

文件: 总16页 (文件大小:497K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Preliminary Information  
E
CAT660  
100mA CMOS Charge Pump Inverter/Doubler  
TM  
FEATURES  
I Replaces MAX660 and LTC®660  
I Converts V+ to V- or V+ to 2V+  
I Low output resistance, 4typical  
I High power efficiency  
I Low quiescent current  
I Pin-compatible, high-current alternative to  
7660/1044  
I Industrial temperature range  
I Available in 8-pin SOIC, DIP and 0.8mm thin 8-  
pad TDFN packages  
I Selectable charge pump frequency  
- 10kHz or 80kHz  
- Lead-free, halogen-free package option  
- Optimize capacitor size  
APPLICATIONS  
I Negative voltage generator  
I Voltage doubler  
I Low EMI power source  
I Instrumentation  
I GaAs FET biasing  
I LCD contrast bias  
I Cellular phones, pagers  
I Voltage splitter  
I Lithium battery power supply  
DESCRIPTION  
The CAT660 is a charge-pump voltage converter. It will  
inverta1.5Vto5.5Vinputtoa-1.5Vto-5.5Voutput.Only  
two external capacitors are needed. With a guaranteed  
100mAoutputcurrentcapability,theCAT660canreplace  
a switching regulator and its inductor. Lower EMI is  
achieved due to the absence of an inductor.  
V+. The operating frequency can also be adjusted with  
an external capacitor at the OSC pin or by driving OSC  
with an external clock.  
Both 8-pin DIP and SOIC packages are available in the  
industrial temperature range. The TDFN package has a  
4x4mmfootprintandfeaturesa0.8mmmaximumheight.  
Comparedtothe8-pinSOICtheTDFNpackagefootprint  
is nearly 50% less. For die availability, contact Catalyst  
Semiconductor marketing.  
In addition, the CAT660 can double a voltage supplied  
from a battery or power supply. Inputs from 2.5V to 5.5V  
will yield a doubled, 5V to 11V output voltage.  
A Frequency Control pin (BOOST/FC) is provided to  
select either a high (80kHz) or low (10kHz) internal  
oscillator frequency, thus allowing quiescent current vs.  
capacitor size trade-offs to be made. The 80kHz  
frequency is selected when the FC pin is connected to  
The CAT660 replaces the MAX660 and the LTC660.  
In addition, the CAT660 is pin compatible with the 7660/  
1044, offering an easy upgrade for applications with  
100mA loads.  
TYPICAL APPLICATION  
+V  
IN  
1.5V to 5.5V  
Doubled  
Positive  
1
2
3
4
BOOST/FC  
CAP+  
V+  
OSC  
LV  
8
7
6
5
1
2
3
4
BOOST/FC  
CAP+  
V+  
OSC  
LV  
8
7
6
5
Output  
Voltage  
C1  
+
CAT660  
CAT660  
C1  
Inverted  
Negative  
Output  
+
GND  
CAP-  
GND  
CAP-  
V
= 2.5V to 5.5V  
IN  
OUT  
OUT  
Voltage  
POSITIVE  
VOLTAGE DOUBLER  
VOLTAGE INVERTER  
© 2005 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc. No. 5000, Rev. U  
1
CAT660  
PIN CONFIGURATION  
SOIC Package (S, X)  
DIP Package (P)  
BOOST/FC 1  
8 V+  
TDFN Package (RD8, ZD8)  
BOOST/FC 1  
CAP+ 2  
8 V+  
1
2
3
4
BOOST/FC  
CAP+  
V+  
8
7
6
5
CAT  
660  
CAT  
660  
OSC  
LV  
CAP+ 2  
GND 3  
CAP- 4  
7 OSC  
6 LV  
7 OSC  
6 LV  
CAT  
660  
GND  
GND 3  
CAP-  
OUT  
5 OUT  
CAP- 4  
5 OUT  
(Top View)  
TDFN Package: 4mm x 4mm  
0.8mm maximum height  
(Top View)  
(Top View)  
PIN DESCRIPTIONS  
Circuit Configuration  
Pin Number  
Name  
Inverter Mode  
Doubler Mode  
1
Boost/FC  
Frequency Control for the internal oscilla-  
tor. With an external oscillator BOOST/FC  
has no effect.  
Same as inverter.  
Boost/FC  
Open  
Oscillator Frequency  
10kHz typical, 5kHz minimum  
80kHz typical, 40kHz minimum  
V+  
Same as inverter.  
2
3
4
5
6
CAP+  
GND  
CAP-  
OUT  
LV  
Charge pump capacitor. Positive terminal.  
Power supply ground.  
Power supply. Positive voltage input.  
Same as inverter.  
Charge pump capacitor. Negative terminal.  
Output for negative voltage.  
Power supply ground.  
LV must be tied to OUT for all input  
voltages.  
Low-Voltage selection pin. When the input  
voltage is less than 3V, connect LV to GND.  
For input voltages above 3V, LV may be  
connected to GND or left open. If OSC is  
driven externally, connect LV to GND.  
Oscillatorcontrolinput.Anexternalcapacitor  
can be connected to lower the oscillator  
frequency. An external oscillator can drive  
OSC and set the chip operating frequency.  
The charge-pump frequency is one-half the  
frequency at OSC.  
Same as inverter. Do not overdrive  
OSCindoublingmode. Standardlogic  
levels will not be suitable. See the  
applications section for additional  
information.  
7
OSC  
V+  
8
Power supply. Positive voltage input.  
Positive voltage output.  
ORDERING INFORMATION  
Part Number  
CAT660EPA  
Package  
8 lead Plastic DIP  
Temperature Range  
-40°C to 85°C  
-40°C to 85°C  
-40°C to 85°C  
-40°C to 85°C  
-40°C to 85°C  
-40°C to 85°C  
-40°C to 85°C  
CAT660ESA  
8-lead SOIC  
CAT660ESA-TE13  
CAT660ERD8  
CAT660EVA  
8-lead SOIC, Tape & Reel  
8-pad TDFN  
8-lead SOIC (Lead-free, Halogen-free)  
8-lead SOIC (Lead-free, Halogen-free)  
8-pad TDFN (Lead-free, Halogen-free)  
CAT660EVA-TE13  
CAT660EZD8  
Doc. No. 5000, Rev. U  
2
CAT660  
ABSOLUTE MAXIMUM RATINGS  
V+ to GND .............................................................6V  
Storage Temperature.........................-65°C to 160°C  
Lead Soldering Temperature (10 sec)............. 300°C  
Note: TA = Ambient Temperature  
Input Voltage (Pins 1, 6 and 7) .. -0.3V to (V+ + 0.3V)  
BOOST/FC and OSC Input Voltage ........... The least  
negative of (Out - 0.3V) or (V+ - 6V) to (V+ + 0.3V)  
These are stress ratings only and functional operation is not  
implied. Exposure to absolute maximum ratings for prolongued  
time periods may affect device reliability. All voltages are with  
respect to ground.  
Output Short-circuit Duration to GND .............. 1 sec.  
(OUT may be shorted to GND for 1 sec without damage but  
shorting OUT to V+ should be avoided.)  
Operating Ambient Temperature Range  
Continuous Power Dissipation (TA = 70°C)  
CAT660E.............. -40°C to 85°C  
Plastic DIP................................................730mW  
SOIC.........................................................500mW  
TDFN ............................................................... 1W  
ELECTRICAL CHARACTERISTICS  
V+ = 5V, C1 = C2 = 150µF, Boost/FC = Open, COSC = 0pF, inverter mode with test circuit as shown in Figure 1 unless  
otherwise noted. Temperature is over operating ambient temperature range unless otherwise noted.  
Parameter  
Symbol  
VS  
Conditions  
Min  
3.0  
1.5  
2.5  
Typ  
Max Units  
Inverter: LV = Open. RL = 1kΩ  
Inverter: LV = GND. RL = 1kΩ  
Doubler: LV = OUT. RL = 1kΩ  
BOOST/FC = open, LV = Open  
BOOST/FC = V+ , LV = Open  
OUT is more negative than -4V  
IL = 100mA, C1 = C2 = 150 µF (Note 2)  
BOOST/FC = V+ (C1, C2 ESR 0.5)  
IL = 100mA, C1 = C2 = 10 µF  
BOOST/FC = Open  
5.5  
5.5  
5.5  
0.5  
3
V
Supply Voltage  
Supply Current  
IS  
0.09  
0.3  
mA  
Output Current  
IOUT  
RO  
100  
mA  
Output Resistance  
4
7
12  
Oscillator Frequency FOSC  
(Note 3)  
5
10  
80  
kHz  
µA  
%
BOOST/FC = V+  
40  
OSC Input Current  
IOSC  
BOOST/FC = Open  
BOOST/FC = V+  
1
5
Power Efficiency  
PE  
RL = 1kconnected between V+ and  
OUT, TA = 25°C (Doubler)  
RL = 500connected between GND and  
OUT, TA = 25°C (Inverter)  
96  
92  
98  
96  
IL = 100mA to GND, TA = 25°C (Inverter)  
No load, TA = 25°C  
88  
Voltage Conversion VEFF  
Efficiency  
99  
99.9  
%
Note 1. In Figure 1, test circuit capacitors C1 and C2 are 150µF and have 0.2maximum ESR. Higher ESR levels may reduce efficiency and output  
voltage.  
Note2. TheoutputresistanceisacombinationoftheinternalswitchresistanceandtheexternalcapacitorESR. Formaximumvoltageandefficiency  
keep external capacitor ESR under 0.2.  
Note 3. FOSC is tested with COSC = 100pF to minimize test fixture loading. The test is correlated back to COSC=0pF to simulate the capacitance  
at OSC when the device is inserted into a test socket without an external COSC  
.
Doc. No. 5000, Rev. U  
3
CAT660  
Figure 1. Test Circuit  
I
S
1
2
3
4
8
7
6
5
+
5V  
V
+
V
BOOST/FC  
V+  
External  
Oscillator  
CAPC+ AT660  
OSC  
+
C
1
C
GND  
LV  
OUT  
OSC  
150µF  
R
CAP-  
L
I
L
V
OUT  
Voltage Inverter  
C2  
150µF  
+
TYPICAL OPERATING CHARACTERISTICS  
Typical characteristic curves are generated using the test circuit in Figure 1. Inverter test conditions are: V+=5V, LV  
= GND, BOOST/FC = Open and TA = 25˚C unless otherwise indicated. Note that the charge-pump frequency is one-  
half the oscillator frequency.  
Supply Current vs. Input Voltage  
Supply Current vs. Temperature (no load)  
120  
150  
120  
90  
60  
30  
0
VIN = 5V  
100  
80  
60  
40  
20  
0
No Load  
VIN = 3V  
VIN = 2V  
1
2
3
4
INPUT VOLTAGE [V]  
5
6
-50 -25  
0
25 50 75 100 125  
Output Resistance vs. Input Voltage  
Output Resistance vs. Temperature (50  
load)  
10  
8
7
6
8
6
VIN = 2V  
100 Load  
5
VIN = 3V  
4
2
0
4
VIN = 5V  
3
2
-50 -25  
0
25  
50  
75 100 125  
1
2
3
4
INPUT VOLTAGE [V]  
5
6
Doc. No. 5000, Rev. U  
4
CAT660  
TYPICAL OPERATING CHARACTERISTICS  
Inverted Output Voltage vs. Load, V+ = 5V  
Output Voltage Drop vs. Load Current  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
5.0  
4.8  
4.6  
4.4  
4.2  
4.0  
V+ = 3V  
V+ = 5V  
0
20  
40  
60  
80  
100  
0
20  
40  
60  
80  
100  
LOAD CURRENT [mA]  
LOAD CURRENT [mA]  
Oscillator Frequency vs. Supply Voltage  
Oscillator Frequency vs. Supply Voltage  
20  
18  
200  
LV = OPEN  
16  
150  
14  
12  
LV = GND  
LV = GND  
10  
8
100  
LV = OPEN  
6
50  
4
BOOST = OPEN  
2
BOOST = +V  
0
0
2
3
4
5
SUPPLY VOLTAGE [V]  
6
2
3
4
5
SUPPLY VOLTAGE [V]  
6
Supply Current vs. Oscillator Frequency  
10000  
No Load  
1000  
V+ = 5V  
100  
10  
1
10  
100  
1000  
OSCILLATOR FREQUENCY [kHz]  
Doc. No. 5000, Rev. U  
5
CAT660  
The 1/FC1 term can be modeled as an equivalent  
impedance REQ. A simple equivalent circuit is shown in  
figure 3. This circuit does not include the switch  
resistance nor does it include output voltage ripple. It  
does allow one to understand the switch-capacitor  
topology and make prudent engineering tradeoffs.  
APPLICATION INFORMATION  
Circuit Description and Operating Theory  
The CAT660 switches capacitors to invert or double an  
input voltage.  
Figure 2 shows a simple switch capacitor circuit. In  
position 1 capacitor C1 is charged to voltage V1. The  
total charge on C1 is Q1 = C1V1. When the switch  
movestoposition2, theinputcapacitorC1isdischarged  
to voltage V2. After discharge, the charge on C1 is Q2 =  
C1V2.  
For example, power conversion efficiency is set by the  
output impedance, which consists of REQ and switch  
resistance. As switching frequency is decreased, REQ,  
the 1/FC1 term, will dominate the output impedance,  
causinghighervoltagelossesanddecreasedefficiency.  
As the frequency is increased quiescent current  
increases. At high frequency this current becomes  
significant and the power efficiency degrades.  
The charge transferred is:  
Q = Q1 - Q2 = C1 × (V1 - V2)  
The oscillator is designed to operate where voltage  
losses are a minimum. With external 150µF capacitors,  
theinternalswitchresistancesandtheEquivalentSeries  
Resistance (ESR) of the external capacitors determine  
the effective output impedance.  
If the switch is cycled "F" times per second, the current  
(charge transfer per unit time) is:  
I = F × ∆Q = F × C1 (V1 - V2)  
Rearranging in terms of impedance:  
A block diagram of the CAT660 is shown in figure 4. The  
CAT660 is a replacement for the MAX660 and the  
LTC660.  
(V1-V2)  
(1/FC1)  
V1-V2  
REQ  
I=  
=
Figure 2. Switched-Capacitor Building Block  
Figure 3. Switched-Capacitor Equivalent Circuit  
REQ  
V1  
V2  
V1  
V2  
C1  
C2  
R
L
C2  
R
L
1
FC1  
REQ =  
Doc. No. 5000, Rev. U  
6
CAT660  
OSCILLATOR FREQUENCY CONTROL  
Theswitchingfrequencycanberaised,loweredordrivenfromanexternalsource.Figure5showsafunctionaldiagram  
of the oscillator circuit.  
The CAT660 oscillator has four control modes:  
BOOST/FC Pin Connection  
Open  
OSC Pin Connection  
Open  
Nominal Oscillator Frequency  
10kHz  
BOOST/FC= V+  
Open or BOOST/FC= V+  
Open  
Open  
80kHz  
External Capacitor  
External Clock  
Frequency of external clock  
If BOOST/FC and OSC are left floating (Open), the  
nominal oscillator frequency is 10kHz. The pump  
frequency is one-half the oscillator frequency.  
an external capacitor at OSC, the operating frequency  
can be set.  
Note that the frequency appearing at CAP+ or CAP- is  
one-half that of the oscillator.  
By connecting the BOOST/FC pin to V+, the charge and  
discharge currents are increased, and the frequency is  
increased by approximately 8 times. Increasing the  
frequencywilldecreasetheoutputimpedanceandripple  
currents.Thiscanbeanadvantageathighloadcurrents.  
Increasing the frequency raises quiescent current but  
allows smaller capacitance values for C1 and C2.  
Driving the CAT660 from an external frequency source  
can be easily achieved by driving Pin 7 and leaving the  
BOOST pin open, as shown in Figure 6. The output  
current from Pin 7 is small, typically 1µA to 8µA, so a  
CMOScandrivetheOSCpin.For5Vapplications,aTTL  
logic gate can be used if an external 100kpull-up  
If pin 7, OSC, is loaded with an external capacitor the  
frequency is lowered. By using the BOOST/FC pin and  
resistor is used as shown in figure 6.  
Figure 4. CAT660 Block Diagram  
+
(8)  
V
SW1  
SW2  
+
CAP  
(2)  
BOOST/FC  
Ο
Ο
8x  
(1)  
+
C1  
2
OSC  
-
OSC  
(7)  
CAP  
(4)  
VOUT  
(5)  
C2  
+
LV  
(6)  
GND  
(3)  
CLOSED WHEN  
+
V
> 3.0V  
(N) = Pin Number  
Doc. No. 5000, Rev. U  
7
CAT660  
CAPACITOR SELECTION  
Output voltage ripple is determined by the value of C2  
and the load current. C2 is charged and discharged at a  
current roughly equal to the load current. The internal  
switching frequency is one-half the oscillator frequency.  
Low ESR capacitors are necessary to minimize voltage  
losses, especially at high load currents. The exact  
values of C1 and C2 are not critical but low ESR  
capacitors are necessary.  
VRIPPLE = IOUT/(FOSC x C2) + IOUT x ESRC2  
The ESR of capacitor C1, the pump capacitor, can have  
a pronounced effect on the output. C1 currents are  
approximately twice the output current and losses occur  
on both the charge and discharge cycle. The ESR  
effectsarethusmultipliedbyfour. A0.5ESRforC1will  
havethesameeffectasa2increaseinCAT660output  
impedance.  
For example, with a 10kHz oscillator frequency (5kHz  
switchingfrequency),a150µFC2capacitorwithanESR  
of0.2anda100mAloadpeak-to-peakripplevoltageis  
87mV.  
VRIPPLE vs. FOSC  
VRIPPLE (mV) IOUT (mA)  
FOSC (kHz)  
C2 (µF)  
150  
C2 ESR ()  
87  
28  
100  
100  
10  
80  
0.2  
0.2  
150  
Figure 5. Oscillator  
Figure 6. External Clocking  
+
V
+
V
7.0 I  
I
REQUIRED FOR TTL LOGIC  
BOOST/FC  
(1)  
1
2
3
4
8
7
6
5
100k  
BOOST/FC  
V+  
NC  
OSC INPUT  
CAP+CAT660 OSC  
GND  
+
LV  
C1  
OSC  
(7)  
+
CAP-  
OUT  
-V  
C2  
~18pF  
+
7.0 I  
I
LV  
(6)  
Doc. No. 5000, Rev. U  
8
CAT660  
CAPACITOR SUPPLIERS  
The following manufacturers supply low-ESR capacitors:  
Manufacturer Capacitor Type Phone  
AVX/Kyocera TPS/TPS3  
Vishay/Sprague 595  
WEB  
Email  
Comments  
Tantalum  
843-448-9411 www.avxcorp.com  
402-563-6866 www.vishay.com  
619-661-6835 www.sanyo.com  
847-843-7500 www.nichicon-us.com  
avx@avxcorp.com  
Aluminum  
Sanyo  
MV-AX, UGX  
Svcsales@sanyo.com Aluminum  
Nichicon  
F55  
Tantalum  
Aluminum  
HC/HD  
Capacitor manufacturers continually introduce new series and offer different package styles. It is recommended  
that before a design is finalized capacitor manufacturers should be surveyed for their latest product offerings.  
CONTROLLING LOSS IN CAT660 APPLICATIONS  
There are three primary sources of voltage loss:  
The effective output impedance of a CAT660 circuit is  
approximately:  
1. Output resistance  
VLOSS= ILOAD x ROUT, where ROUT is  
the CAT660 output resistance and ILOAD is  
the load current.  
Rcircuit Rout 660 + (4 x ESRC1) + ESRC2  
2. Charge pump (C1) capacitor ESR:  
VLOSSC1 4 x ESRC1 x ILOAD, where  
ESRC1 is the ESR of capacitor C1.  
3. Output or reservoir (C2) capacitor ESR:  
VLOSSC2 = ESRC2 x ILOAD, where ESRC2  
is the ESR of capacitor C2.  
IncreasingthevalueofC2and/ordecreasingitsESRwill  
reduce noise and ripple.  
Doc. No. 5000, Rev. U  
9
CAT660  
TYPICAL APPLICATIONS  
VOLTAGE INVERSION POSITIVE-TO-NEGATIVE  
The CAT660 easily provides a negative supply voltage from a positive supply in the system. Figure 7 shows a typical  
circuit. The LV pin may be left floating for positive input voltages at or above 3.3V.  
V
1
2
3
4
8
7
6
5
IN  
1.5V to 5.5V  
BOOST/FC  
V+  
NC  
+
CAP+CAT660 OSC  
GND  
LV  
C1  
CAP-  
OUT  
V
= -V  
OUT  
IN  
C2  
+
Figure 7: Voltage Inverter  
POSITIVE VOLTAGE DOUBLER  
The voltage doubler circuit shown in figure 8 gives VOUT = 2 x VIN for input voltages from 2.5V to 5.5V.  
1N5817*  
1
2
3
4
8
7
6
5
V
= 2V  
IN  
BOOST/FC  
V+  
OUT  
+
CAP+ CAT660OSC  
+
GND  
LV  
V
IN  
2.5V to 5.5V  
CAP-  
OUT  
*SCHOTTKY DIODE IS FOR START-UP ONLY  
Figure 8: Voltage Doubler  
Doc. No. 5000, Rev. U  
10  
CAT660  
PRECISION VOLTAGE DIVIDER  
A precision voltage divider is shown in figure 9. With very light load currents under 100nA, the voltage at pin 2 will be  
within 0.002% of V+/2 . Output voltage accuracy decreases with increasing load.  
+
V
1
2
3
4
8
7
6
5
BOOST/FC  
CAP+  
V+  
OSC  
LV  
3V to 11V  
+
CAT660  
GND  
CAP-  
OUT  
+
2
V
+ 0.002%  
+
I < 100nA  
L
Figure 9: Precision Voltage Divider (Load 100nA)  
BATTERY VOLTAGE SPLITTER  
Positive and negative voltages that track each other can be obtained from a battery. Figure 10 shows how a 9V battery  
can provide symmetrical positive and negative voltages equal to one-half the battery voltage.  
V
BATTERY  
1
2
3
4
8
7
6
5
V
BAT  
2
BAT  
C1  
BOOST/FC  
CAP+  
V+  
OSC  
LV  
+
(4.5V)  
9V  
+
CAT660  
GND  
CAP-  
3V < V  
< 11V  
BAT  
V
150µF  
BAT  
2
OUT  
-
(-4.5V)  
C2  
150µF  
+
Figure 10: Battery Splitter  
Doc. No. 5000, Rev. U  
11  
CAT660  
CASCADE OPERATION FOR HIGHER NEGATIVE VOLTAGES  
The CAT660 can be cascaded as shown in figure 11 to generate more negative voltage levels. The output resistance  
is approximately the sum of the individual CAT660 output resistance.  
VOUT= -N x VIN, where N represents the number of cascaded devices.  
+V  
IN  
8
8
5
2
3
2
3
CAT660  
"1"  
CAT660  
"N"  
+
+
+
C1  
C1  
5
4
4
V
= -NV  
IN  
OUT  
C2  
+
C2  
Figure 11: Cascading to Increase Output Voltage  
PARALLEL OPERATION  
Paralleling CAT660 devices will lower output resistance. As shown in figure 12, each device requires its own pump  
capacitor, C2, but the output reservoir capacitor is shared with all devices. The value of C2 should be increased by  
a factor of N, where N is the number of devices.  
The output impedance of the combined CAT660's is:  
R
(Of the CAT660)  
OUT  
N (Number of devices)  
R
(Of "N" CAT660s)=  
OUT  
+V  
IN  
8
8
2
3
2
CAT660  
"1"  
CAT660  
+
+
3
C1  
"N"  
C1  
5
4
5
4
C2  
+
Figure 12: Paralleling Devices Reduce Output Resistance  
Doc. No. 5000, Rev. U  
12  
CAT660  
PACKAGE MECHANICAL DRAWINGS  
8-LEAD 150 WIDE SOIC (S, X)  
0.0099 (0.25)  
0.0196 (0.50)  
X 45  
˚
0.0075 (0.19)  
0.0098 (0.25)  
0.149 (3.80)  
0.1574 (4.00)  
0.2284 (5.80)  
0.2440 (6.20)  
0˚-8˚  
0.016 (0.40)  
0.050 (1.27)  
D
Dimension D  
Min  
0.0532 (1.35)  
0.0688 (1.75)  
Pkg  
Max  
8L  
0.1890(4.80)  
0.1968(5.00)  
0.050 (1.27) BSC  
0.0040 (0.10)  
0.0098 (0.25)  
0.013 (0.33)  
0.020 (0.51)  
8-LEAD 300 MIL WIDE PLASTIC DIP (P)  
0.300 (7.62)  
0.325 (8.26)  
0.245 (6.17)  
0.295 (7.49)  
D
0.310 (7.87)  
0.380 (9.65)  
0.120 (3.05)  
0.180 (4.57) MAX  
0.150 (3.81)  
Dimension D  
Pkg  
Min  
Max  
0.015 (0.38)  
0.110 (2.79)  
0.150 (3.81)  
8L  
0.355 (9.02)  
0.400 (10.16)  
0.100 (2.54)  
BSC  
0.045 (1.14)  
0.060 (1.52)  
0.014 (0.36)  
0.022 (0.56)  
Notes:  
1. Complies with JEDEC Publication 95 MS001 dimensions; however, some of the dimensions may be more stringent.  
2. All linear dimensions are in inches and parenthetically in millimeters.  
Doc. No. 5000, Rev. U  
13  
CAT660  
8-PAD TDFN (RD8, ZD8)  
0.75+0.05  
A
8
5
B
0.0-0.05  
1
4
4.00+0.10  
(S)  
PIN 1  
INDEX AREA  
0.20 REF.  
C
8
5
DAP SIZE 3.5 X 2.4  
0.10 MAX TYP.  
NOTE:  
0.15  
0.15  
0.20  
1. ALL DIMENSIONS ARE IN mm.  
ANGLES IN DEGREES.  
PIN 1 ID  
2. COPLANARITY APPLIES TO THE  
EXPOSED PAD AS WELL AS  
THE TERMINALS.  
0.20  
COPLANARITY SHALL NOT  
EXCEED 0.08mm.  
3. WARPAGE SHALL NOT  
EXCEED 0.10mm.  
0.50+0.10 (8x)  
0.80 TYP. (6x)  
0.30+0.05 (8x)  
4. PACKAGE LENGTH/PACKAGE  
WIDTH ARE CONSIDERED AS  
SPECIAL CHARACTERISTIC. (S)  
2.40 REF. (2x)  
Doc. No. 5000, Rev. U  
14  
CAT660  
REVISION HISTORY  
Date  
Rev.  
Reason  
10/6/2003  
10/7/2003  
R
S
Updated Typical Operating Characteristics data plots  
Updated Electrical Characteristics - Output Resistance  
and Supply Current  
Updated Typical Operating Characteristics data plots  
Updated Description - eliminated Commercial temp range  
Updated ordering information - eliminated Commercial temp range  
Updated operating ambient temperature ranges  
Changed ordering information for CAT660EXA to CAT660EVA  
10/15/2003  
1/20/2005  
T
U
Changed ordering information for CAT660EXA-TE13 to CAT660EVA-TE13  
Doc. No. 5000, Rev. U  
15  
Copyrights, Trademarks and Patents  
Trademarks and registered trademarks of Catalyst Semiconductor include each of the following:  
DPP ™  
AE2 ™  
Catalyst Semiconductor has been issued U.S. and foreign patents and has patent applications pending that protect its products. For a complete list of patents  
issued to Catalyst Semiconductor contact the Company’s corporate office at 408.542.1000.  
CATALYST SEMICONDUCTOR MAKES NO WARRANTY, REPRESENTATION OR GUARANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS  
PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE  
RIGHTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING  
OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES.  
Catalyst Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or  
other applications intended to support or sustain life, or for any other application in which the failure of the Catalyst Semiconductor product could create a  
situation where personal injury or death may occur.  
Catalyst Semiconductor reserves the right to make changes to or discontinue any product or service described herein without notice. Products with data sheets  
labeled "Advance Information" or "Preliminary" and other products described herein may not be in production or offered for sale.  
Catalyst Semiconductor advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate  
typical semiconductor applications and may not be complete.  
Catalyst Semiconductor, Inc.  
Corporate Headquarters  
1250 Borregas Avenue  
Sunnyvale, CA 94089  
Phone: 408.542.1000  
Publication #: 5000  
Revison:  
Issue date:  
Type:  
U
1/20/2005  
Preliminary  
Fax: 408.542.1200  
www.catalyst-semiconductor.com  
16  

相关型号:

CAT660EVA

100mA CMOS Charge Pump Inverter/Doubler
CATALYST

CAT660EVA

100mA CMOS Charge Pump Inverter/Doubler
ONSEMI

CAT660EVA-GT3

100 mA CMOS Charge Pump Inverter/Doubler
ONSEMI

CAT660EVA-T3

100mA CMOS Charge Pump Inverter/Doubler
CATALYST

CAT660EVA-T3

100mA CMOS Charge Pump Inverter/Doubler
ONSEMI

CAT660EVA-TE13

100mA CMOS Charge Pump Inverter/Doubler
CATALYST

CAT660EVA-TE13

SWITCHED CAPACITOR CONVERTER, PDSO8, 0.150 INCH, LEAD AND HALOGEN FREE, SOIC-8
ONSEMI

CAT660EXA

暂无描述
CATALYST

CAT660EXA

SWITCHED CAPACITOR CONVERTER, PDSO8, 0.150 INCH, SOIC-8
ONSEMI

CAT660EXA-TE13

Switched Capacitor Converter, 0.1A, CMOS, PDSO8, 0.150 INCH, SOIC-8
CATALYST

CAT660EXA-TE13

SWITCHED CAPACITOR CONVERTER, PDSO8, 0.150 INCH, SOIC-8
ONSEMI

CAT660EZD8

100mA CMOS Charge Pump Inverter/Doubler
CATALYST