LMV321 [CADEKA]
General Purpose, Rail-to-Rail Output Amplifi er Rail-to-Rail Amplifi ers; 通用，轨到轨输出功率放大器呃轨到轨器功率放大器
| 型号： | LMV321 |
| 厂家： | 
CADEKA MICROCIRCUITS LLC. |
| 描述： | General Purpose, Rail-to-Rail Output Amplifi er Rail-to-Rail Amplifi ers |
| 文件： | 总15页 (文件大小：1822K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet
LMV321
General Purpose, Rail-to-Rail Output Amplifier
Rail-to-Rail Amplifiers
F E A T U R E S
■
General Description
130μA supply current
The LMV321 is a single channel, low cost, voltage feedback amplifier. The
■
■
1MHz gain bandwidth
LMV321 consumes only 130μA of supply current and is designed to operate
from a supply range of 2.7V to 5.5V (±1.35 to ±2.75). The input voltage
range extends 200mV below the negative rail and 800mV below the positive
rail.
Input voltage range with 5V supply:
-0.2V to 4.2V
■
Output voltage range with 5V supply:
0.065V to 4.99V
■
■
■
■
>
1V/μs slew rate
The LMV321 is fabricated on a CMOS process. It offers 1MHz gain bandwidth
product and >1V/μs slew rate. The combination of low power, low supply
voltage operation, and rail-to-rail performance make the LMV321 well suited
for battery-powered systems. The LMV321 is packaged in the space saving
TSOT-5 package. TSOT-5 package is pin compatible with the SOT23-5
package.
No crossover distortion
Fully specified at 2.7V and 5V supplies
LMV321: Pb-free TSOT-5
A P P L I C A T I O N S
■
Portable/battery-powered applications
■
Mobile communications, cell phones,
pagers
■
ADC buffer
Typical Performance Examples
■
Active filters
Slew Rate vs. Supply Voltage
Vout vs. Vcm
■
Portable test instruments
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■
Medical Equipment
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Portable medical instrumentation
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Ordering Information
Part Number
Package
TSOT-5
Pb-Free
Yes
RoHS Compliant
Yes
Operating Temperature Range Packaging Method
-40°C to +85°C Reel
LMV321IST5X*
Moisture sensitivity level for all parts is MSL-1. *Advance Information, contact CADEKA for availability.
©2009-2012 CADEKA Microcircuits, LLC
www.cadeka.com
Data Sheet
LMV321 Pin Assignments1
LMV321 Pin Configuration
Pin No.
Pin Name
+IN
Description
1
2
3
4
5
Positive input
Negative supply
Negative input
Output
+IN
1
2
3
5
4
+V
S
-V
S
+
-
-IN
-V
S
OUT
OUT
+V
S
Positive supply
-IN
Notes:
1.Pin compatible to SOT23-5.
©2009-2012 CADEKA Microcircuits, LLC
www.cadeka.com
2
Data Sheet
Absolute Maximum Ratings
The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device
should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper de-
vice function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the
operating conditions noted on the tables and plots.
Parameter
Min
Max
7
Unit
Supply Voltage
V
V
Input Voltage Range
Continuous Output Current
-V -0.4V
S
+V
S
Output is protected against momentary short circuit
Reliability Information
Parameter
Min
-65
Typ
221
Max
Unit
Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering, 10s)
Package Thermal Resistance
5-Lead TSOT
150
150
260
°C
°C
°C
°C/W
Notes:
Package thermal resistance (θ ), JDEC standard, multi-layer test boards, still air.
JA
ESD Protection
Product
TSOT-5
Human Body Model (HBM)
2kV
2kV
Charged Device Model (CDM)
Recommended Operating Conditions
Parameter
Min
Typ
Max
Unit
Operating Temperature Range
Supply Voltage Range
-40
2.7
+85
5.5
°C
V
©2009-2012 CADEKA Microcircuits, LLC
www.cadeka.com
3
Data Sheet
Electrical Characteristics at +2.7V
TA = 25°C, VS = +2.7V, Rf = Rg =10 KΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DC Performance
VIO
Input Offset Voltage
1.7
5
7
mV
dVIO
Ib
Average Drift
µV/°C
nA
nA
dB
dB
V
Input Bias Current
<1
250
50
IOS
Input Offset Current
<1
CMRR
PSRR
CMIR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Common Mode Input Range
0V ≤ VCM ≤ 1.7V
2.7V ≤ V+ ≤ 5V, VO=1V, VCM=1V
50
50
0
63
60
For VCM ≤ 50 dB
-0.2
1.9
V+ -10
60
1.7
V
VOUT
Output Voltage Swing
Supply Current
RL = 10kΩ to VS / 2
V+ -100
mV
mV
μA
180
170
IS
110
AC Performance
GBWP
Φm
Gain Bandwidth Product
Phase Margin
CL=200 pF
f = 1kHz
1
MHz
°
60
10
46
Gm
Gain Margin
dB
en
Input Voltage Noise
nV/√Hz
Notes:
Min max specifications are guaranteed by testing, design, or characterization
©2009-2012 CADEKA Microcircuits, LLC
www.cadeka.com
4
Data Sheet
Electrical Characteristics at +5V
TA = 25°C, VS = +5V, Rf = Rg =10kΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted. Boldface limits apply at the
temperature extremes.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DC Performance
VIO
Input Offset Voltage
1.7
7
mV
9
dVIO
Ib
Average Drift
5
µV/°C
Input Bias Current
<1
250
nA
nA
500
IOS
Input Offset Current
<1
50
150
CMRR
PSRR
CMIR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Common Mode Input Range
0V ≤ VCM ≤ 4V
2.7V ≤ V+ ≤ 5V, VO=1V, VCM=1V
50
50
0
65
60
dB
dB
V
For VCM ≤ 50 dB
-0.2
4.2
4
V
AOL
Open-Loop Gain
RL = 2kΩ
15
100
V/mV
10
V+ -40
120
V+ -300
VOUT
Output Voltage Swing
RL = 2kΩ to VS / 2
mV
mV
mV
mV
V+ -400
300
400
V+ -10
65
V+ -100
RL = 10kΩ to VS / 2
V+ -200
180
280
ISC
Short Circuit Output Current
Supply Current
Sourcing VO=0V
Sinking VO=5V
5
60
mA
mA
10
160
130
IS
250
μA
350
AC Performance
SR
Slew Rate
>1
1
V/µs
MHz
°
GBWP
Φm
Gm
Gain Bandwidth Product
Phase Margin
CL=200 pF
f = 1kHz
60
10
39
Gain Margin
dB
en
Input Voltage Noise
nV/√Hz
Notes:
Min max specifications are guaranteed by testing, design, or characterization
©2009-2012 CADEKA Microcircuits, LLC
www.cadeka.com
5
Data Sheet
Typical Performance Characteristics at +5V - Continued
TA = 25°C, VS = +5V, Rf = Rg =10kΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted.
VIO vs. CMR +2.7V
VIO vs. CMR +5V
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Input Current vs. Temperature
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©2009-2012 CADEKA Microcircuits, LLC
www.cadeka.com
6
Data Sheet
Typical Performance Characteristics at +5V - Continued
TA = 25°C, VS = +5V, Rf = Rg =10kΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted.
Sinking Current vs. Output Voltage +2.7V
Sinking Current vs. Output Voltage +5V
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Sourcing Current vs. Output Voltage +5V
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Short Circuit Current vs. Temperature (Sourcing)
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©2009-2012 CADEKA Microcircuits, LLC
www.cadeka.com
7
Data Sheet
Typical Performance Characteristics at +5V - Continued
TA = 25°C, VS = +5V, Rf = Rg =10kΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted.
Output Voltage Swing vs. Supply Voltage
Slew Rate vs. Supply Voltage
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PSRR vs. Frequency
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©2009-2012 CADEKA Microcircuits, LLC
www.cadeka.com
8
Data Sheet
Typical Performance Characteristics at +5V - Continued
TA = 25°C, VS = +5V, Rf = Rg =10kΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted.
Open Loop Output Impedance vs. Frequency
Open Loop Frequency Response +2.7V
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Open Loop Frequency Response 5V
Open Loop Frequency Response vs. Temperature
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Gain and Phase vs. Capacitive Load RL=600Ω
Gain and Phase vs. Capacitive Load RL=100kΩ
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©2009-2012 CADEKA Microcircuits, LLC
www.cadeka.com
9
Data Sheet
Typical Performance Characteristics at +5V - Continued
TA = 25°C, VS = +5V, Rf = Rg =10kΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted.
Inverting Large Signal Pulse Response
Inverting Large Signal Pulse Response
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Inverting Small Signal Pulse Response
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©2009-2012 CADEKA Microcircuits, LLC
www.cadeka.com
10
Data Sheet
Typical Performance Characteristics at +5V - Continued
TA = 25°C, VS = +5V, Rf = Rg =10kΩ, RL = 10kΩ to VS/2, G = 2; unless otherwise noted.
Non-Inverting Large Signal Pulse Response
Non-Inverting Large Signal Pulse Response
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©2009-2012 CADEKA Microcircuits, LLC
www.cadeka.com
11
Data Sheet
Application Information
+Vs
6.8µF
0.1µF
General Description
The LMV321 is a single supply, general purpose, voltage-
feedback amplifier fabricated on a CMOS process. The
LMV321 offers 1MHz gain bandwidth product, >1V/μs slew
rate, and only 130μA supply current. It features a rail-to-rail
output stage and is unity gain stable.
Input
+
Output
-
RL
0.1µF
6.8µF
The common mode input range extends to 200mV below
ground and to 800mV below Vs. Exceeding these values
will not cause phase reversal. However, if the input voltage
exceeds the rails by more than 0.5V, the input ESD devices
will begin to conduct. The output will stay at the rail during
this overdrive condition.
G = 1
-Vs
Figure 3. Unity Gain Circuit
+Vs
The output stage is short circuit protected and offers “soft”
saturation protection that improves recovery time.Figures
1, 2, and 3 illustrate typical circuit configurations for non-
inverting, inverting, and unity gain topologies for dual supply
applications. They show the recommended bypass capacitor
values and overall closed loop gain equations. Figure 4
shows the typical non-inverting gain circuit for single supply
6.8µF
0.1µF
+
Input
Output
-
RL
applications
+Vs
Rf
6.8µF
Rg
0.1µF
Figure 4. Single Supply Non-Inverting Gain Circuit
Input
+
-
Output
RL
Power Dissipation
0.1µF
6.8µF
Rf
Power dissipation should not be a factor when operating
under the stated 2kΩ load condition. However, applications
with low impedance, DC coupled loads should be analyzed
to ensure that maximum allowed junction temperature
is not exceeded. Guidelines listed below can be used to
verify that the particular application will not cause the
device to operate beyond it’s intended operating range.
Rg
G = 1 + (Rf/Rg)
-Vs
Figure 1. Typical Non-Inverting Gain Circuit
+Vs
6.8µF
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction
temperature, the package thermal resistance value
ThetaJA (ӨJA) is used along with the total die power
dissipation.
R1
0.1µF
+
Output
Rg
Input
-
RL
0.1µF
6.8µF
Rf
TJunction = TAmbient + (ӨJA × PD)
G = - (Rf/Rg)
Where TAmbient is the temperature of the working environment.
For optimum input offset
voltage set R1 = Rf ||Rg
-Vs
In order to determine PD, the power dissipated in the load
needs to be subtracted from the total power delivered by
Figure 2. Typical Inverting Gain Circuit
©2009-2012 CADEKA Microcircuits, LLC
www.cadeka.com
12
Data Sheet
the supplies.
PD = Psupply - Pload
Supply power is calculated by the standard power
equation.
Psupply = Vsupply × IRMS supply
Vsupply = VS+ - VS-
Figure 5. Addition of RS for Driving Capacitive Loads
Power delivered to a purely resistive load is:
For a given load capacitance, adjust RS to optimize the
tradeoff between settling time and bandwidth. In general,
reducing RS will increase bandwidth at the expense of
additional overshoot and ringing.
2
Pload = ((VLOAD RMS
)
)/Rloadeff
The effective load resistor (Rloadeff) will need to include
the effect of the feedback network. For instance,
Rloadeff in Figure 3 would be calculated as:
RL || (Rf + Rg)
Overdrive Recovery
An overdrive condition is defined as the point when either
one of the inputs or the output exceed their specified
voltage range. Overdrive recovery is the time needed for
the amplifier to return to its normal or linear operating
point. The recovery time varies, based on whether the
input or output is overdriven and by how much the range
is exceeded. The LMV321 and will typically recover in less
than 5us from an overdrive condition. Figure 6 shows the
LMV321 in an overdriven condition.
These measurements are basic and are relatively easy to
perform with standard lab equipment. For design purposes
however, prior knowledge of actual signal levels and load
impedance is needed to determine the dissipated power.
Here, PD can be found from
PD = PQuiescent + PDynamic - PLoad
Quiescent power can be derived from the specified IS
values along with known supply voltage, VSupply. Load
power can be calculated as above with the desired signal
amplitudes using:
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ꢂ
ꢃ
(VLOAD RMS
)
= VPEAK / √2
/ Rloadeff
'ꢎꢍꢊꢎꢍꢑꢖꢌ%$&ꢋ
#$ꢊꢎꢍꢑꢖꢌ%$&ꢋ
( ILOAD RMS = ( VLOAD RMS
)
)
ꢄ
The dynamic power is focused primarily within the output
stage driving the load. This value can be calculated as:
ꢀꢃ
ꢀꢂ
ꢀꢁ
PDYNAMIC = (VS+ - VLOAD RMS × ( ILOAD)RMS
)
Assuming the load is referenced in the middle of the
power rails or Vsupply/2.
ꢄ
ꢂꢄ
ꢅꢄ
ꢆꢄ
ꢇꢄ
ꢃꢄꢄ
The LMV321 is short circuit protected. However, this may
not guarantee that the maximum junction temperature
(+150°C) is not exceeded under all conditions.
ꢕꢌꢉꢐꢑꢒ-ꢀ_
Figure 6. Overdrive Recovery
Layout Considerations
Driving Capacitive Loads
General layout and supply bypassing play major roles
in high frequency performance. CADEKA has evaluation
boards to use as a guide for high frequency layout and as
an aid in device testing and characterization. Follow the
steps below as a basis for high frequency layout:
Increased phase delay at the output due to capacitive
loading can cause ringing, peaking in the frequency
response, and possible unstable behavior. Use a series
resistance, RS, between the amplifier and the load to
help improve stability and settling performance. Refer to
Figure 5.
Include 6.8µF and 0.1µF ceramic capacitors for power
▪
©2009-2012 CADEKA Microcircuits, LLC
www.cadeka.com
13
Data Sheet
supply decoupling
Place the 6.8µF capacitor within 0.75 inches of the power
pin
▪
Place the 0.1µF capacitor within 0.1 inches of thepower pin
▪
▪
Remove the ground plane under and around the part,
especially near the input and output pins to reduce
parasitic capacitance
Minimize all trace lengths to reduce series inductances
▪
Evaluation Board Schematics
Evaluation board schematics and layouts are shown in
Figures 7-9. These evaluation boards are built for dual
supply operation. Follow these steps to use the board
in a single-supply application:
Figure 8. CEB004 Top View
1. Short -Vs to ground.
2. Use C3 (6.8uF) and C4 (0.1uF), if the -VS pin of the
amplifier is not directly connected to the ground plane.
+Vs
6.8µF
5
Input
0.1µF
4
1
3
+
Output
RL
Rin
Rout
-
2
0.1µF
6.8µF
Rf
Figure 9. CEB004 Bottom View
Rg
-Vs
Figure 7. CEB004 Schematic
©2009-2012 CADEKA Microcircuits, LLC
www.cadeka.com
14
Data Sheet
Mechanical Dimensions
TSOT-5 Package
NOTE:
1. ALL DIMENSIONS ARE IN MILLIMETERS.
2. PACKAGE LENGTH DOES NOT INCLUDE INTERLEAD FALSH OR PROTRUSION
3. PACKAGE WIDTH DOES NOTINCLUDE INTERLEAD FALSH OR PROTRUSION.
4. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10
MILLIMETERS MAX.
5. DRAWING CONFROMS TO JEDEC MO-193, VARIATION AA.
6. DRAWING IS NOT TO SCALE.
For additional information regarding our products, please visit CADEKA at: cadeka.com
CADEKA Headquarters Loveland, Colorado
T: 970.663.5452
T: 877.663.5452 (toll free)
CADEKA, the CADEKA logo design, COMLINEAR, and the COMLINEAR logo design are trademarks or registered trademarks of CADEKA
Microcircuits LLC. All other brand and product names may be trademarks of their respective companies.
CADEKA reserves the right to make changes to any products and services herein at any time without notice. CADEKA does not assume any
responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in
writing by CADEKA; nor does the purchase, lease, or use of a product or service from CADEKA convey a license under any patent rights,
copyrights, trademark rights, or any other of the intellectual property rights of CADEKA or of third parties.
Copyright ©2009-2012 CADEKA Microcircuits, LLC. All rights reserved.
相关型号：
LMV321A-Q1
LMV321A-Q1, LMV358A-Q1, LMV324A-Q1 Automotive Low-Voltage Rail-to-Rail Output Operational Amplifiers
TI
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