TISP7400H3SL [BOURNS]
TRIPLE ELEMENT BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS; TRIPLE元的双向晶闸管过电压保护
| 型号： | TISP7400H3SL |
| 厂家： | 
BOURNS ELECTRONIC SOLUTIONS |
| 描述： | TRIPLE ELEMENT BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS |
| 文件： | 总13页 (文件大小：391K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TISP7070H3SL THRU TISP7095H3SL,
TISP7125H3SL THRU TISP7220H3SL,
TISP7250H3SL THRU TISP7400H3SL
VERSIONS
*RoHS COMPLIANT
AVAILABLE
TRIPLE ELEMENT BIDIRECTIONAL THYRISTOR
OVERVOLTAGE PROTECTORS
TISP7xxxH3SL Overvoltage Protector Series
TISP7xxxH3SL Overview
®
This TISP device series protects central office, access and customer premise equipment against overvoltages on the telecom line. The
TISP7xxxH3SL has the same symmetrical bidirectional protection on any terminal pair; R-T, R-G and T-G. In addition, the device is rated for
simultaneous R-G and T-G impulse conditions. The TISP7xxxH3SL is available in a wide range of voltages and has a high current capability,
allowing minimal series resistance to be used. These protectors have been specified mindful of the following standards and recommendations:
GR-1089-CORE, FCC Part 68, UL1950, EN 60950, IEC 60950, ITU-T K.20, K.21 and K.45. The TISP7350H3SL meets the FCC Part 68 “B”
ringer voltage requirement and survives both Type A and B impulse tests. These devices are housed in a through-hole 3-pin single-in-line
(SL) plastic package.
Summary Electrical Characteristics
V
V
V @ I
T
I
I
I
I
H
C @ -2 V
o
Functionally
Replaces
DRM
V
(BO)
V
T
DRM
µA
(BO)
T
Part #
V
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
mA
600
600
600
600
600
600
600
600
600
600
600
600
600
600
600
600
A
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
mA
150
150
150
150
150
150
150
150
150
150
150
150
150
150
150
150
pF
140
140
140
74
TISP7070H3
TISP7080H3
TISP7095H3
TISP7125H3
TISP7135H3
TISP7145H3
TISP7165H3
TISP7180H3
TISP7200H3
TISP7210H3
TISP7220H3
TISP7250H3
TISP7290H3
TISP7300H3
TISP7350H3
TISP7400H3
58
65
75
70
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
80
95
100
110
120
130
145
150
160
170
200
230
230
275
300
125
135
145
165
180
200
210
220
250
290
300
350
400
74
74
74
P1553AC†
P1803AC†
74
74
74
74
P2103AC†
P2353AC†
P2703AC†
62
62
62
62
P3203AC
P3403AC
62
† Bourns' part has an improved protection voltage
Summary Current Ratings
Parameter
I
I
di/dt
A/µs
TSP
A
TSM
A
Waveshape
Value
2/10
500
1.2/50, 8/20
350
10/160
250
5/320
200
10/560
130
10/1000
100
1 cycle 60 Hz 2/10 Wavefront
60 400
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex
MARCH 1999 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP7xxxH3SL Overvoltage Protector Series
ITU-T K.20/21 Rating . . . . . . . . 8 kV 10/700, 200 A 5/310
SL Package (Top View)
Ion-Implanted Breakdown Region
Precise and Stable Voltage
Low Voltage Overshoot under Surge
1
2
3
T
G
R
V
V
DRM
V
(BO)
V
Device
‘7070
‘7080
‘7095
‘7125
‘7135
‘7145
‘7165
‘7180
‘7200
‘7210
‘7220
‘7250
‘7290
‘7350
‘7400
58
65
75
70
MDXXAGA
80
95
Device Symbol
100
110
120
130
145
150
160
170
200
230
275
300
125
135
145
165
180
200
210
220
250
290
350
400
R
T
SD7XAB
G
Terminals T, R and G correspond to the
alternative line designators of A, B and C
Rated for International Surge Wave Shapes
- Single and Simultaneous Impulses
I
3-Pin Through-Hole Packaging
- Compatible with TO-220AB pin-out
TSP
Waveshape
Standard
A
2/10 µs
8/20 µs
GR-1089-CORE
IEC 61000-4-5
FCC Part 68
500
350
250
-Low Height .................................................................... 8.3 mm
Low Differential Capacitance ....................................... < 72 pF
10/160 µs
FCC Part 68
10/700 µs
200
.............................................. UL Recognized Component
ITU-T K.20/21
FCC Part 68
10/560 µs
130
100
10/1000 µs
GR-1089-CORE
Description
The TISP7xxxH3SL limits overvoltages between the telephone line Ring and Tip conductors and Ground. Overvoltages are normally caused by
a.c. power system or lightning flash disturbances which are induced or conducted on to the telephone line.
Each terminal pair, T-G, R-G and T-R, has a symmetrical voltage-triggered bidirectional thyristor protection characteristic. Overvoltages are
initially clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on
state. This low-voltage on state causes the current resulting from the overvoltage to be safely diverted through the device. The high crowbar
holding current prevents d.c. latchup as the diverted current subsides.
How To Order
For Standard
For Lead Free
Termination Finish Termination Finish
Device
Package
Carrier
Order As
Order As
TISP7xxxH3
SL (Single-in-Line)
Tube
TISP7xxxH3SL
TISP7xxxH3SL-S
Insert xxx value corresponding to protection voltages of 070, 080, 095, 125 etc.
MARCH 1999 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP7xxxH3SL Overvoltage Protector Series
Description (continued)
This TISP7xxxH3SL range consists of fifteen voltage variants to meet various maximum system voltage levels (58 V to 300 V). They are
guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. These high current protection devices are in
a 3-pin single-in-line (SL) plastic package and are supplied in tube pack. For alternative impulse rating, voltage and holding current values in
SL packaged protectors, consult the factory. For lower rated impulse currents in the SL package, the 45 A 10/1000 TISP7xxxF3SL series is
available.
These monolithic protection devices are fabricated in ion-implanted planar structures to ensure precise and matched breakover control and are
virtually transparent to the system in normal operation.
Absolute Maximum Ratings, T = 25 °C (Unless Otherwise Noted)
A
Rating
Symbol
Value
± 58
± 65
Unit
‘7070
‘7080
‘7095
‘7125
‘7135
‘7145
‘7165
‘7180
‘7200
‘7210
‘7220
‘7250
‘7290
‘7350
‘7400
± 75
±100
±110
±120
±130
±145
±150
±160
±170
±200
±230
±275
±300
Repetitive peak off-state voltage, (see Note 1)
V
V
DRM
Non-repetitive peak on-state pulse current (see Notes 2, and 3)
2/10 (Telcordia GR-1089-CORE, 2/10 voltage wave shape)
500
350
250
225
200
200
200
130
100
8/20 µs (IEC 61000-4-5, 1.2/50 µs voltage, 8/20 current combination wave generator)
10/160 µs (FCC Part 68, 10/160 µs voltage wave shape)
4/250 (ITU-T K.20/21, 10/700 voltage wave shape, dual)
0.2/310 (CNET I 31-24, 0.5/700 voltage wave shape)
5/310 (ITU-T K.20/21, 10/700 voltage wave shape, single)
5/320 µs (FCC Part 68, 9/720 µs voltage wave shape)
10/560 µs (FCC Part 68, 10/560 µs voltage wave shape)
10/1000 (Telcordia GR-1089-CORE, 10/1000 voltage wave shape)
Non-repetitive peak on-state current (see Notes 2, 3 and 4)
20 ms (50 Hz) full sine wave
I
A
TSP
55
60
I
A
16.7 ms (60 Hz) full sine wave
TSM
0.9
1000 s 50 Hz/60 Hz a.c.
Initial rate of rise of on-state current, Exponential current ramp, Maximum ramp value < 200 A
Junction temperature
di /dt
400
A/µs
°C
T
T
-40 to +150
-65 to +150
J
Storage temperature range
T
°C
stg
NOTES: 1. Derate value at -0.13%/°C for temperatures below 25 °C.
2. Initially the TISP7xxxH3 must be in thermal equilibrium.
3. These non-repetitive rated currents are peak values of either polarity. The rated current values may be applied to any terminal
pair. Additionally, both R and T terminals may have their rated current values applied simultaneously (in this case the G terminal
return current will be the sum of the currents applied to the R and T terminals). The surge may be repeated after the
TISP7xxxH3 returns to its initial conditions.
4. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. Derate current values at -0.61 %/°C for ambient temperatures above 25 °C.
MARCH 1999 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP7xxxH3SL Overvoltage Protector Series
Electrical Characteristics for any Terminal Pair, T = 25 °C (Unless Otherwise Noted)
A
Parameter
Test Conditions
Min
Typ
Max
±5
±10
Unit
Repetitive peak off-
state current
T = 25 °C
A
I
V
= V
DRM
µA
DRM
D
T = 85 °C
A
‘7070
‘7080
‘7095
‘7125
‘7135
‘7145
‘7165
‘7180
‘7200
‘7210
‘7220
‘7250
‘7290
‘7350
‘7400
‘7070
‘7080
‘7095
‘7125
‘7135
‘7145
‘7165
‘7180
‘7200
‘7210
‘7220
‘7250
‘7290
‘7350
‘7400
±70
±80
±95
±125
±135
±145
±165
±180
±200
±210
±220
±250
±290
±350
±400
±78
V
Breakover voltage
dv/dt = ±750 V/ms,
R
= 300 Ω
V
(BO)
SOURCE
±88
±103
±134
±144
±154
±174
±189
±210
±220
±231
±261
±302
±362
±414
±0.8
±5
dv/dt ≤ ±1000V/µs, Linear voltage ramp,
Maximum ramp value = ±500 V
di/dt = ±20 A/µs, Linear current ramp,
Maximum ramp value = ±10 A
Impulse breakover
voltage
V
V
(BO)
I
Breakover current
On-state voltage
Holding current
dv/dt = ±750 V/ms,
R
= 300 Ω
±0.1
A
V
A
(BO)
SOURCE
V
I = ±5 A, t = 100 µs
T
T
W
I
I = ±5 A, di/dt = - /+30 mA/ms
±0.15
±5
±0.6
H
T
Critical rate of rise of
off-state voltage
Off-state current
dv/dt
Linear voltage ramp, Maximum ramp value < 0.85V
kV/µs
µA
DRM
I
V
= ±50 V
T = 85 °C
±10
D
D
A
MARCH 1999 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP7xxxH3SL Overvoltage Protector Series
Electrical Characteristics for any Terminal Pair, T = 25 °C (Unless Otherwise Noted)
A
A
Parameter
Test Conditions
f = 1 MHz, V = 1 V rms, V = 0,
Min
Typ
Max
170
90
84
150
79
67
140
74
62
73
Unit
‘7070 thru ‘7095
‘7125 thru ‘7220
‘7250 thru ‘7400
‘7070 thru ‘7095
‘7125 thru ‘7220
‘7250 thru ‘7400
‘7070 thru ‘7095
‘7125 thru ‘7220
‘7250 thru ‘7400
‘7070 thru ‘7095
‘7125 thru ‘7220
‘7250 thru ‘7400
‘7125 thru ‘7220
‘7250 thru ‘7400
d
D
f = 1 MHz, V = 1 V rms, V = -1 V
d
D
f = 1 MHz, V = 1 V rms, V = -2 V
d
D
C
Off-state capacitance
pF
off
f = 1 MHz, V = 1 V rms, V = -50 V
d
D
35
28
33
26
f = 1 MHz, V = 1 V rms, V = -100 V
d
D
(see Note 5)
NOTE 5: To avoid possible voltage clipping, the ‘7125 is tested with V = -98 V.
D
Thermal Characteristics
Parameter
Test Conditions
EIA/JESD51-3 PCB, I = I
Min
Typ
Max
Unit
,
TSM(1000)
T
R
Junction to free air thermal resistance
50
°C/W
θJA
T = 25 °C, (see Note 6)
A
NOTE 6: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
MARCH 1999 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP7xxxH3SL Overvoltage Protector Series
Parameter Measurement Information
+i
Quadrant I
Switching
ITSP
Characteristic
ITSM
IT
V(BO)
VT
I(BO)
IH
IDRM
ID
VDRM
VD
-v
+v
ID
VD
VDRM
IDRM
IH
I(BO)
VT
V(BO)
IT
ITSM
Quadrant III
ITSP
VD = ±50 V and ID = ±10 µA
used for reliability release
Switching
Characteristic
-i
PM4XAAC
Figure 1. Voltage-current Characteristic for Terminal Pairs
MARCH 1999 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP7xxxH3SL Overvoltage Protector Series
Typical Characteristics
OFF-STATE CURRENT
vs
NORMALIZED BREAKOVER VOLTAGE
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
TC7AAA
TC7AABA
1.10
1.05
1.00
0.95
10
1
'7125 THRU '7220
VD = +50 V
'7250 THRU '7400
VD = -50 V
0·1
'7070 THRU '7095
'7250 THRU '7400
0·01
0·001
0·0001
-25
0
25
50
75
100
125
150
0
25
50
75
100
125
150
TJ - Junction Temperature - °C
TJ - Junction Temperature - °C
Figure 2.
Figure 3.
NORMALIZED HOLDING CURRENT
vs
NORMALIZED BREAKOVER CURRENT
vs
JUNCTION TEMPERATURE
TC7AAC
TC7AADA
JUNCTION TEMPERATURE
2.0
1.5
4.0
+ I(BO), - I(BO) '7070 THRU '7220
3.0
2.0
1.5
1.0
0.9
0.8
0.7
1.0
0.9
0.8
0.7
0.6
0.5
+ I(BO), - I(BO) '7250 THRU '7400
0.6
0.5
0.4
0.4
-25
25
75
-25
0
25
50
75
100
125
150
0
50
100 125 150
T - Junction Temperature - °C
J
TJ - Junction Temperature - °C
Figure 4.
Figure 5.
MARCH 1999 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP7xxxH3SL Overvoltage Protector Series
Typical Characteristics
NORMALIZED CAPACITANCE
vs
DIFFERENTIAL OFF-STATE CAPACITANCE
vs
OFF-STATE VOLTAGE
RATED REPETIVE PEAK OFF-STATE VOLTAGE
TC7AAIA
80
75
70
65
60
55
50
45
40
35
30
1
0.9
TJ = 25°C
Vd = 1 Vrms
0.8
0.7
0.6
0.5
∆C = Coff(-2 V) - Coff(-50 V)
'7070 THRU '7095
0.4
0.3
'7125 THRU '7220
'7250 THRU '7400
0.2
50 60 70 80 100
150
200 250 300
400
1
2
3
5
10
20 30 50
100 150
VDRM - Repetitive Peak Off-State Voltage - V
VD - Off-state Voltage - V
Figure 6.
Figure 7.
MARCH 1999 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP7xxxH3SL Overvoltage Protector Series
Rating and Thermal Information
NON-REPETITIVE PEAK ON-STATE CURRENT
vs
CURRENT DURATION
TI7AB
30
VGEN = 600 V rms, 50/60 Hz
RGEN = 1.4*VGEN/ITSM(t)
20
15
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB, TA = 25 °C
SIMULTANEOUS OPERATION
OF R AND T TERMINALS. G
TERMINAL CURRENT = 2xITSM(t)
10
9
8
7
6
5
4
3
2
1.5
1
0.9
0.8
0·1
1
10
100
1000
t - Current Duration - s
Figure 8.
V
DERATING FACTOR
vs
IMPULSE RATING
DRM
vs
MINIMUM AMBIENT TEMPERATURE
AMBIENT TEMPERATURE
TI7AACA
TC7HAA
1.00
0.99
0.98
0.97
0.96
0.95
0.94
0.93
700
600
TELCORDIA 2/10
IEC 1.2/50, 8/20
500
400
300
250
FCC 10/160
ITU-T 10/700
'7070 THRU '7095
200
150
120
FCC 10/560
TELCORDIA 10/1000
'7125 THRU '7220
100
90
80
'7250 THRU '7400
-40 -35 -30 -25 -20 -15 -10 -5
70
0
5
10 15 20 25
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80
TAMIN - Minimum Ambient Temperature - °C
TA - Ambient Temperature - °C
Figure 9.
Figure 10.
MARCH 1999 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP7xxxH3SL Overvoltage Protector Series
APPLICATIONS INFORMATION
Deployment
These devices are three terminal overvoltage protectors. They limit the voltage between three points in the circuit. Typically, this would be the
two line conductors and protective ground (Figure 11).
Th3
Th1
Th2
Figure 11. MULTI-POINT PROTECTION
In Figure 11, protectors Th2 and Th3 limit the maximum voltage between each conductor and ground to the ±V
(BO)
of the individual protector.
Protector Th1 limits the maximum voltage between the two conductors to its ±V
value.
(BO)
Manufacturers are being increasingly required to design in protection coordination. This means that each protector is operated at its design
level and currents are diverted through the appropriate protector, e.g. the primary level current through the primary protector and lower levels
of current may be diverted through the secondary or inherent equipment protection. Without coordination, primary level currents could pass
through the equipment only designed to pass secondary level currents. To ensure coordination happens with fixed voltage protectors, some
resistance is normally used between the primary and secondary protection. The values given in this data sheet apply to a 400 V (d.c.
sparkover) gas discharge tube primary protector and the appropriate test voltage when the equipment is tested with a primary protector.
Impulse Testing
To verify the withstand capability and safety of the equipment, standards require that the equipment is tested with various impulse wave forms.
The table below shows some common values.
Voltage
Peak Voltage
Peak Current
Current
Waveform
µs
TISP7xxxH3
25 °C Rating
A
Series
Resistance
Ω
Coordination
Resistance
(Min.)
Standard
Setting
V
Value
A
Waveform
µs
2500
1000
1500
800
2/10
500
100
2/10
10/1000
10/160
10/560
5/320 †
5/320 †
4/250
500
100
GR-1089-CORE
0
NA
10/1000
10/160
10/560
9/720 †
(SINGLE)
(DUAL)
0.5/700
10/700
(SINGLE)
(SINGLE)
(DUAL)
200
250
100
130
FCC Part 68
(March 1998)
0
NA
1000
1500
1500
1500
1000
1500
4000
4000
25
200
200
2 x 225
200
37.5
2 x 27
37.5
25
37.5
100
I 31-24
0.2/310
5/310
5/310
5/310
4/250
0
0
NA
NA
NA
4.5
6.0
200
200
200
2 x 225
ITU-T K.20/K.21
2 x 72
† FCC Part 68 terminology for the waveforms produced by the ITU-T recommendation K.21 10/700 impulse generator
NA = Not Applicable, primary protection removed or not specified.
If the impulse generator current exceeds the protector’s current rating, then a series resistance can be used to reduce the current to the
protector’s rated value to prevent possible failure. The required value of series resistance for a given waveform is given by the following
calculations. First, the minimum total circuit impedance is found by dividing the impulse generator’s peak voltage by the protector’s rated
current. The impulse generator’s fictive impedance (generator’s peak voltage divided by peak short circuit current) is then subtracted from the
minimum total circuit impedance to give the required value of series resistance. In some cases, the equipment will require verification over a
temperature range. By using the rated waveform values from Figure 10, the appropriate series resistor value can be calculated for ambient
temperatures in the range of -40 °C to 85 °C.
MARCH 1999 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP7xxxH3SL Overvoltage Protector Series
APPLICATIONS INFORMATION
AC Power Testing
The protector can withstand the G return currents applied for times not exceeding those shown in Figure 8. Currents that exceed these times
must be terminated or reduced to avoid protector failure. Fuses, PTC (Positive Temperature Coefficient) resistors and fusible resistors are
overcurrent protection devices which can be used to reduce the current flow. Protective fuses may range from a few hundred milliamperes to
one ampere. In some cases, it may be necessary to add some extra series resistance to prevent the fuse opening during impulse testing. The
current versus time characteristic of the overcurrent protector must be below the line shown in Figure 8. In some cases there may be a further
time limit imposed by the test standard (e.g. UL 1459 wiring simulator failure).
Capacitance
The protector characteristic off-state capacitance values are given for d.c. bias voltage, V , values of 0, -1 V, -2 V and -50 V. Where possible,
D
values are also given for -100 V. Values for other voltages may be calculated by multiplying the V = 0 capacitance value by the factor given in
D
Figure 6. Up to 10 MHz, the capacitance is essentially independent of frequency. Above 10 MHz, the effective capacitance is strongly
dependent on connection inductance. For example, a printed wiring (PW) trace of 10 cm could create a circuit resonance with the device
capacitance in the region of 50 MHz. In many applications, the typical conductor bias voltages will be about -2 V and -50 V. Figure 7 shows the
differential (line unbalance) capacitance caused by biasing one protector at -2 V and the other at -50 V.
Normal System Voltage Levels
The protector should not clip or limit the voltages that occur in normal system operation. For unusual conditions, such as ringing without the
line connected, some degree of clipping is permissible. Under this condition, about 10 V of clipping is normally possible without activating the
ring trip circuit.
Figure 9 allows the calculation of the protector V
value at temperatures below 25 °C. The calculated value should not be less than the
maximum normal system voltages. The TISP7290H3, with a V of 230 V, can be used for the protection of ring generators producing
DRM
DRM
105 V rms of ring on a battery voltage of -58 V. The peak ring voltage will be 58 + 1.414*105 = 206.5 V. However, this is the open circuit voltage
and the connection of the line and its equipment will reduce the peak voltage.
For the extreme case of an unconnected line, the temperature at which clipping begins can be calculated using the data from Figure 9. To
possibly clip, the V
value has to be 206.5 V. This is a reduction of the 230 V 25 °C V
value by a factor of 206.5/230 = 0.90. Figure 9
DRM
DRM
shows that a 0.90 reduction will occur below an ambient temperature of -40 °C. For this example, the TISP7290H3 will allow normal equipment
operation, even on an open-circuit line, down to below -40 °C.
JESD51 Thermal Measurement Method
To standardize thermal measurements, the EIA (Electronic Industries Alliance) has created the JESD51 standard. Part 2 of the standard
3
3
(JESD51-2, 1995) describes the test environment. This is a 0.0283 m (1 ft ) cube which contains the test PCB (Printed Circuit Board)
horizontally mounted at the center. Part 3 of the standard (JESD51-3, 1996) defines two test PCBs for surface mount components; one for
packages smaller than 27 mm (1.06 ’’) on a side and the other for packages up to 48 mm (189 ’’). The thermal measurements used the smaller
76.2 mm x 114.3 mm (3.0 ’’ x 4.5 ’’) PCB. The JESD51-3 PCBs are designed to have low effective thermal conductivity (high thermal resis-
tance) and represent a worse case condition. The PCBs used in the majority of applications will achieve lower values of thermal resistance and
so can dissipate higher power levels than indicated by the JESD51 values.
MARCH 1999 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP7xxxH3SL Overvoltage Protector Series
Typical Circuits
TIP
WIRE
F1a
F1b
R1a
R1b
Th3
Th1
PROTECTED
EQUIPMENT
E.G. LINE CARD
Th2
AI7XBK
RING
WIRE
TISP7xxxH3
Figure 12. Protection Module
R1a
R1b
Th3
SIGNAL
Th1
Th2
AI7XBL
TISP7150H3
D.C.
Figure 13. ISDN Protection
OVER-
CURRENT
PROTECTION
SLIC
PROTECTION
RING/TEST
PROTECTION
TEST
RELAY
RING
RELAY
SLIC
RELAY
TIP
WIRE
S3a
R1a
Th4
Th5
Th3
S1a
S2a
COORDI-
NATION
RESISTANCE
Th1
Th2
SLIC
R1b
RING
WIRE
S3b
TISP7xxxH3
TISP6xxxx,
TISPPBLx,
1/2TISP6NTP2
S1b
S2b
VBAT
C1
220 nF
TEST
EQUIP-
MENT
RING
GENERATOR
AI7XBJ
Figure 14. Line Card Ring/Test Protection
MARCH 1999 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP7xxxH3SL Overvoltage Protector Series
MECHANICAL DATA
SL003 3-pin Plastic Single-in-line Package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will
withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high
humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly.
METRIC
(INCHES)
DIMENSIONS ARE:
SL003
3.20 - 3.40
(0.126 - 0.134)
9.25 - 9.75
(0.364 - 0.384)
6.10 - 6.60
(0.240- 0.260)
Index
Notch
8.31
(0.327)
MAX.
12.9
(0.492)
MAX.
4.267
(0.168)
MIN.
2
1
3
2.54
(0.100)
Typical
0.203 - 0.356
(0.008- 0.014)
(See Note A)
2 Places
1.854
(0.073)
MAX.
0.559 - 0.711
(0.022 - 0.028)
3
Places
MDXXCE
NOTES: A. Each pin centerline is located within 0.25 (0.010) of its true longitudinal position.
B. Body molding flash of up to 0.15 (0.006) may occur in the package lead plane.
“TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office.
“Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries.
MARCH 1999 - REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
相关型号：
TISP7400H3SL-STISP7400H3SL-S
Silicon Surge Protector, 400V V(BO) Max, 60A, ROHS COMPLIANT, PLASTIC PACKAGE-3
BOURNS
TISP7XXXF3
MEDIUM & HIGH-VOLTAGE TRIPLE ELEMENT BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
BOURNS
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