CAY16-1003F8LF [BOURNS]
Chip Resistor Arrays; 芯片电阻阵列
| 型号： | CAY16-1003F8LF |
| 厂家： | 
BOURNS ELECTRONIC SOLUTIONS |
| 描述： | Chip Resistor Arrays |
| 文件： | 总4页 (文件大小：316K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
■ Lead free version available (see How to Order “Termination” options)
■ Lead free versions are RoHS compliant*
■ Convex and concave terminals
■ 2, 4 or 8 isolated elements available
■ Resistance tolerance 1 ꢀ and 5 ꢀ
■ Resistance range: 10 ohms to 1 megohm
CAT/CAY 16 Series - Chip Resistor Arrays
Specifications
Requirement
Characteristics
Test Method
Short Time Overload
Soldering Heat
±± ꢀ ꢁ±( ꢀ %or ꢂꢃT±6-F8, -J8 & ꢂꢃY±6-J8)
Rated Voltage X (.5, 5 seconds
(60 °ꢂ ±5 °ꢂ, ±0 seconds ±± second
±± ꢀ
±± ꢀ
Temperature ꢂycling ꢁ5)
±(5 °ꢂ ꢁ30 minutes) - normal ꢁ±5 minutes)
-30 °ꢂ ꢁ30 minutes) - normal ꢁ±5 minutes)
Moisture Load Li%e
Load Li%e
±( ꢀ ꢁ±3 ꢀ %or ꢂꢃT±6-F8, -J8 & ꢂꢃY±6-J8)
±( ꢀ ꢁ±3 ꢀ %or ꢂꢃT±6-F8, -J8 & ꢂꢃY±6-J8)
±000 hours
±000 hours
How To Order
Characteristics
CA Y 16 - 103 J 4 __
ꢂhip ꢃrrays
Characteristics
CAT16/CAY16
( ꢁJ(), 4 ꢁF4, J4), 8 ꢁF8, J8)
6( mW ꢁ3± mW %or ꢂꢃY±6-J8)
±± ꢀ, ±5 ꢀ
Number o% Elements
Power Rating Per Resistor
Resistance Tolerance
Type
• T = ꢂoncave
• Y = ꢂonvex
Models
• J( = 0606 Package Size
• F4, J4 = ±(06 Package Size
• F8 = (406 Package Size %or ꢂꢃT±6
• J8 = (406 Package Size %or ꢂꢃT±6;
±506 Package Size %or ꢂꢃY±6
Resistance Range: E(4 ꢁJ), E96 + E(4 ꢁF)
Zero-Ohm Jumper < 0.05 ohm
±0 ohms - ± megohm
Max. Working Voltage
Operating Temp. Range
50 V ꢁ(5 V %or ꢂꢃY±6-J8)
-55 °ꢂ - ±(5 °ꢂ
Resistance ꢂode
• ±03 = ±0 K ohms
• ±003 = ±00 K ohms ꢁ± ꢀ tolerance)
• 000 = Zero-ohm
Resistance Tolerance
• J = ±5 ꢀ ꢁꢄse ꢅJꢆ %or zero-ohm jumper)
• F = ±± ꢀ ꢁ4 resistor package and ꢂꢃT±6-F8)
Soldering Profile for Lead Free Chip Resistors and Arrays
Resistors
275
<1>
• ( = ( Isolated Resistors
• 4 = 4 Isolated Resistors
• 8 = 8 Isolated Resistors
Maximum of 20 seconds between
+255 °C and +260 °C
260 °C peak
<1>
255 °C
Terminations*
225
175
125
75
• LF = Tin-plated ꢁlead %ree)
• Blank = Solder-plated
220 °C
190 °C
60 - 90
seconds
*Model ꢂꢃY±6-J8 is available only with tin-plated
terminations.
Ramp Down
3 °C/second
150 °C
For Standard Values ꢄsed in ꢂapacitors,
Inductors, and Resistors, click here.
60 - 120 seconds
10 seconds minimum
Ramp Up
3 °C/second maximum
Schematics
CAT16-J2
CAY16-J2
CAT16-F4, -J4
CAY16-F4, -J4
25
0
50
100
150
Time (seconds)
200
250
300
R
1
R
2
R
3
R
4
R
R
2
1
CAT16-F8, -J8
CAY16-J8
R
R
R
R
4
R
5
R
6
R
7
R
8
1
2
3
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
CAT/CAY 16 Series - Chip Resistor Arrays
Derating Curve
100
80
60
40
20
0
-55
0
70
125
Ambient Temperature (˚C)
Dimensions
Model
A
A
B
C
D
E
F
0.40 0.15
(.016 .006)
3.20 0.20
(.126 .008)
0.80 0.05
(.032 .002)
1.60 0.20
(.063 .008)
0.50 0.10
(.020 .004)
0.30 0.15
(.012 .006)
—
CAT16-F4, -J4
CAY16-F4, -J4
CAT16-J2
0.50 0.15
(.002 .006)
0.70 0.10
(.027 .008)
3.20 0.20
(.126 .008)
0.80 0.05
(.032 .002)
1.60 0.20
(.063 .008)
0.50 0.10
(.020 .004)
0.30 0.20
(.012 .008)
0.40 0.15
(.016 .006)
1.60 0.15
(.063 .006)
0.80 0.05
(.032 .002)
1.60 0.15
(.063 .006)
0.60 0.15
(.024 .006)
0.30 0.20
(.012 .008)
—
0.60 0.15
(.024 .006)
1.60 0.15
(.063 .006)
0.76 0.10
(.030 .004)
1.60 0.15
(.063 .006)
0.45 0.10
(.018 .004)
0.30 0.20
(.012 .008)
CAY16-J2
—
0.40 0.15
(.016 .006)
6.40 0.20
(.252 .008)
0.80 0.15
(.032 .006)
1.60 0.20
(.063 .008)
0.60 0.15
(.024 .006)
0.30 0.20
(.012 .008)
CAT16-F8, -J8
CAY16-J8
—
0.30 0.15
(.012 .006)
0.30 0.15
(.012 .006)
3.80 0.20
(.15 .008)
0.50 0.05
(.02 .002)
1.60 0.20
(.063 .008)
0.50 0.10
(.02 .004)
0.30 0.15
(.012 .006)
MM
(INCHES)
DIMENSIONS ARE:
Configurations
CAT16-F4, -J4
CAT16-J2
CAY16-J2
CAY16-F4, -J4
A'
A
A
A'
A
F
F
F
F
D
C
C
C
B
C
B
F
E
B
B
CAT16-F8, -J8
CAY16-J8
A'
A
A
F
F
D
C
C
F
E
B
B
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
CAT/CAY 16 Series - Chip Resistor Arrays
Land Patterns
CAT16-F4, -J4, -F8, -J8
CAY16-F4, -J4, -J8
CAT16-J2
CAY16-J2
p
p
Solder
resist
Solder
resist
Solder
resist
Solder
resist
Land
Land
Land
Land
f
f
f
f
Chip
resistor
array
Chip
resistor
array
Chip
resistor
array
Chip
resistor
array
a
a
a
a
b
p
b
p
b
b
Model
a
b
p
f
0.7 to 0.9
(.028 to .035)
0.4 to 0.45
(.016 to .0178)
0.80
(.032)
2.0 to 2.2
(.079 to .087)
CAT16-F4, -J4, -F8, -J8
0.7 to 0.9
(.028 to .035)
0.4 to 0.45
(.016 to .0178)
0.80
(.032)
2.4 to 2.8
(.094 to .11)
CAY16-F4, -J4
CAY16-J8
0.7 to 0.9
(.028 to .035)
0.3 to 0.35
(.012 to .014)
0.50
(.020)
2.0 to 2.2
(.079 to .087)
0.7 to 0.9
(.028 to .035)
0.4 to 0.45
(.016 to .0178)
0.80
(.032)
2.2 to 2.6
(.087 to .102)
CAT16-J2
0.7 to 0.9
(.028 to .035)
0.4 to 0.5
(.016 to .020)
0.80
(.032)
2.0 to 2.6
(.079 to .102)
CAY16-J2
Packaging Dimensions
2.0 ± 0.5
(.079 ± .020)
4.0 ± 0.1
(.158 ± .004)
1.0
(.039)
1.5 + 0.1 - 0
(.059 + .004 - 0)
MAX.
13.0 ± 0.5
(.511 ± .020)
60
(2.362)
b
c
a
21.0 ± 0.8
(.827 ± .031)
2.0 + 0.1/-0.2
(.08 + .004/-.008)
MM
(INCHES)
d
e
180
(7.087)
DIMENSIONS ARE:
4.0 ± 0.1
(.157 ± .004)
Model
a
b
c
d
e
3.40 0.10
(.134 .004)
3.50 .005
(.138 .004)
8.0 0.3
(.315 .012)
9.0 0.3
(.354 .012)
11.4 1.0
(.449 .040)
CAT16-F4, -J4 & CAY16-F4, J4
CAT16-J2 & CAY16-J2
CAT16-F8, -J8
1.80 0.10
(.070 .004)
3.50 .005
(.138 .004)
8.0 0.3
(.315 .012)
9.0 0.3
(.354 .012)
11.4 1.0
(.449 .040)
6.90 0.20
(.272 .008)
5.50 0.10
(.217 .004)
12.0 0.2
(.472 .008)
13.0 0.2
(.512 .008)
15.4 1.0
(.606 .040)
4.10 0.15
(.161 .012)
3.50 0.05
(.138 .002)
8.0 0.3
(.315 .012)
9.0 0.3
(.354 .012)
11.4 1.0
(.449 .040)
CAY16-J8
• 5,000 pcs. per reel ꢁJ(, J4, ꢂꢃY±6-J8)
4,000 pcs. per reel ꢁꢂꢃT±6-F8, -J8)
• Paper tape
REV. 07/06
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
Chip Resistor Arrays - Application Note
Component Placement
a. Reduce the mechanical stress to a minimum during and a%ter placing o% the unit in order not to damage the terminals and
protective coating.
b. Misplacement o% components may cause solder bridges.
Soldering
a. Re%low soldering: Recommendation is shown in the %ollowing chart.
b. Wave soldering: Recommendation according to IEꢂ standards.
c. Hand soldering: Don’t touch the protective coating o% the part. Solder within 3 seconds when the temperature is over (80 ºꢂ.
Soldering
Preheating
Gradual Cooling
250
200
150
100
50
0
10-30 sec.
60 sec. min.
120 sec. min.
Cleaning
ꢃ recommended cleaning method is shown in the %ollowing table.
Cleaning Condition
Solvents
Dipping
Ultrasonic Wave Washing
± minute maximum
Power: (0 W/L
Isopropyl alcohol
5 minutes maximum
Frequency: ±0 to ±00 kHz
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
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