AZ100E111 [AZM]
ECL/PECL 1:9 Differential Clock Driver; ECL / PECL 1 ： 9差分时钟驱动器
| 型号： | AZ100E111 |
| 厂家： | 
ARIZONA MICROTEK, INC |
| 描述： | ECL/PECL 1:9 Differential Clock Driver |
| 文件： | 总6页 (文件大小：92K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ARIZONA MICROTEK, INC.
AZ10E111
AZ100E111
ECL/PECL 1:9 Differential Clock Driver
FEATURES
PACKAGE AVAILABILITY
•
•
•
•
•
•
•
Low Skew
Differential Design
Clock Enable
VBB Output
Operating Range of 4.2V to 5.46V
75kΩ Internal Input Pulldown Resistors
Direct Replacement for ON Semi
MC10E111 & MC100E111
PACKAGE
PART NUMBER
MARKING
NOTES
AZM10E111
<Date Code>
AZM100E111
<Date Code>
PLCC 28
AZ10E111FN
1,2
PLCC 28
AZ100E111FN
1,2
1
2
Add R2 at end of part number for 13 inch (2.5K parts) Tape & Reel.
Date code format: “YY” for year followed by “WW” for week.
DESCRIPTION
The AZ10/100E111 is a low skew 1-to-9 differential driver, designed with clock distribution in mind. The IN
signal is fanned-out to nine identical differential outputs. An Enable input is also provided. A HIGH disables the
device by forcing all Q outputs LOW and all Q¯ outputs HIGH.
The AZ100E111 provides a VBB output for single-ended use or a DC bias reference for AC coupling to the
device. For single–ended input applications, the VBB reference should be connected to one side of the IN/I¯N¯
differential input pair. The input signal is then fed to the other IN/I¯N¯ input. The VBB pin should be used only as a
bias for the E111 as its sink/source capability is limited. When used, the VBB pin should be bypassed to ground via a
0.01μF capacitor.
The device is specifically designed, modeled and produced with low skew as the key goal. Optimal design and
layout serve to minimize gate-to-gate skew within-device, and empirical modeling is used to determine process
control limits that ensure consistent tpd distributions from lot-to-lot. The net result is a dependable, low skew device.
To ensure that the tight skew specification is met, both sides of the differential output must be terminated into
50Ω, even if only one side is used. In most applications all nine differential pairs will be used and therefore
terminated. In the case where fewer than nine pairs are used, it is necessary to terminate at least the output pairs on
the same package side (i.e. sharing the same VCCO) as the pair(s) being used on that side, in order to maintain
minimum skew. Failure to do this will result in small degradations of propagation delay (on the order of 10-20ps) of
the output(s) being used that, while not being catastrophic to most designs, will mean a loss of skew margin.
NOTE: Specifications in the ECL/PECL tables are valid when thermal equilibrium is established.
1630 S. STAPLEY DR., SUITE 127 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541
www.azmicrotek.com
AZ10E111
AZ100E111
VCCO
Q0
25
Q0
24
Q1
23
Q1
21
Q2
20
Q2
19
LOGIC SYMBOL
22
V
Q3
Q3
26
EE
18
Q0
Q0
EN
27
28
1
17
16
15
Q1
Q1
IN
Q4
Pinout: 28-Lead PLCC
(Top View)
VCCO
VCC
Q2
Q2
14
Q4
2
IN
IN
IN
VBB
3
13
12
Q3
Q3
Q5
Q5
4
NC
Q4
Q4
EN
5
6
7
8
9
10
11
Q5
Q5
VCCO
Q7
Q6
Q8
Q8
Q7
Q6
Q6
Q6
PIN DESCRIPTION
FUNCTION
Differential Input Pair
Enable
Q0, Q¯¯0 - Q8, Q¯¯8 Differential Outputs
PIN
Q7
Q7
IN, I¯N¯
E¯N¯
Q8
Q8
V
BB
VBB
VBB Output
VCC , VCCO
VEE
Positive Supply
Negative Supply
Absolute Maximum Ratings are those values beyond which device life may be impaired.
Symbol
Characteristic
Rating
Unit
VCC
VI
VEE
VI
PECL Power Supply (VEE = 0V)
0 to +8.0
0 to +6.0
-8.0 to 0
-6.0 to 0
50
Vdc
Vdc
Vdc
Vdc
PECL Input Voltage
ECL Power Supply
ECL Input Voltage
Output Current
(VEE = 0V)
(VCC = 0V)
(VCC = 0V)
--- Continuous
--- Surge
IOUT
mA
100
TA
TSTG
Operating Temperature Range
Storage Temperature Range
-40 to +85
-65 to +150
°C
°C
10K ECL DC Characteristics (VEE = -4.94V to -5.46V, VCC = VCCO = GND)
-40°C
Typ
0°C
Typ
25°C
Typ
85°C
Typ
Symbol
Characteristic
Unit
Min
Max
Min
Max
Min
Max
Min
Max
VOH
Output HIGH Voltage1
Output LOW Voltage1
Input HIGH Voltage
Input LOW Voltage
Reference Voltage
Input HIGH Current
Input LOW Current
Power Supply Current
-1080
-1950
-1230
-1950
-1430
-890
-1650 -1950
-890 -1170
-1500 -1950
-1300 -1380
150
0.5
60
-1020
-840
-1630 -1950
-840 -1130
-1480 -1950
-1270 -1350
150
0.5
60
-980
-810
-1630 -1950
-810 -1060
-1480 -1950
-1250 -1310
150
0.5
60
-910
-720
-1595
-720
-1445
-1190
150
mV
mV
mV
mV
mV
μA
VOL
VIH
VIL
VBB
IIH
0.5
IIL
IEE
μA
mA
48
48
48
48
60
1.
Each output is terminated through a 50Ω resistor to VCC – 2V.
November 2006 * REV - 3
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2
AZ10E111
AZ100E111
10K PECL DC Characteristics (VEE = GND, VCC = VCCO = +5.0V)
-40°C
Typ
0°C
Typ
25°C
Typ
85°C
Typ
Symbol
Characteristic
Unit
Min
3920
3050
3770
3050
3570
Max
4110
3350
4110
3500
3700
150
Min
3980
3050
3830
3050
3620
Max
4160
3370
4160
3520
3730
150
Min
4020
3050
3870
3050
3650
Max
4190
3370
4190
3520
3750
150
Min
4090
3050
3940
3050
3690
Max
4280
3405
4280
3555
3810
150
VOH
VOL
VIH
VIL
VBB
IIH
Output HIGH Voltage1,2
Output LOW Voltage1,2
Input HIGH Voltage1
Input LOW Voltage1
Reference Voltage1
Input HIGH Current
Input LOW Current
Power Supply Current
mV
mV
mV
mV
mV
μA
0.5
0.5
0.5
0.5
IIL
IEE
μA
mA
48
60
48
60
48
60
48
60
1.
2.
For supply voltages other that 5.0V, use the ECL table values and ADD supply voltage value.
Each output is terminated through a 50Ω resistor to VCC – 2V.
100K ECL DC Characteristics (VEE = -4.2V to -5.46V, VCC = VCCO = GND)
-40°C
Typ
-1085 -1005
0°C
Typ
-955
25°C
Typ
-955
85°C
Typ
-955
Symbol
Characteristic
Unit
Min
Max
-880
Min
-1025
Max
-880
Min
-1025
Max
-880
Min
-1025
Max
-880
VOH
Output HIGH Voltage1
Output LOW Voltage1
Input HIGH Voltage
Input LOW Voltage
Reference Voltage
Input HIGH Current
Input LOW Current
Power Supply Current
mV
mV
mV
mV
mV
μA
VOL
VIH
VIL
VBB
IIH
-1830 -1695 -1555 -1810 -1705 -1620 -1810 -1705 -1620 -1810 -1705 -1620
-1165
-1810
-1380
-880
-1475 -1810
-1260 -1380
150
0.5
60
-1165
-880
-1475 -1810
-1260 -1380
150
0.5
60
-1165
-880
-1475 -1810
-1260 -1380
150
0.5
60
-1165
-880
-1475
-1260
150
0.5
IIL
IEE
μA
mA
48
48
48
55
69
1.
Each output is terminated through a 50Ω resistor to VCC – 2V.
100K PECL DC Characteristics (VEE = GND, VCC = VCCO = +5.0V)
-40°C
Typ
3995
3305
0°C
Typ
4045
3295
25°C
Typ
4045
3295
85°C
Typ
4045
3295
Symbol
Characteristic
Unit
Min
3915
3170
3835
3190
3620
Max
4120
3445
4120
3525
3740
150
Min
3975
3190
3835
3190
3620
Max
4120
3380
4120
3525
3740
150
Min
3975
3190
3835
3190
3620
Max
4120
3380
4120
3525
3740
150
Min
3975
3190
3835
3190
3620
Max
4120
3380
4120
3525
3740
150
VOH
VOL
VIH
VIL
VBB
IIH
Output HIGH Voltage1,2
Output LOW Voltage1,2
Input HIGH Voltage1
Input LOW Voltage1
Reference Voltage1
Input HIGH Current
Input LOW Current
Power Supply Current
mV
mV
mV
mV
mV
μA
0.5
0.5
0.5
0.5
IIL
IEE
μA
mA
48
60
48
60
48
60
55
69
1.
2.
For supply voltages other that 5.0V, use the ECL table values and ADD supply voltage value.
Each output is terminated through a 50Ω resistor to VCC – 2V.
November 2006 * REV - 3
www.azmicrotek.com
3
AZ10E111
AZ100E111
AC Characteristics (VEE =10E(-4.94V to -5.46V), 100E(-4.2V to -5.46V); VCC =VCCO =GND or VEE =GND;
VCC =VCCO = 10E(+4.94V to +5.46V), 100E(+4.2V to +5.46V) )
-40°C
Typ
0°C
Typ
25°C
Typ
85°C
Typ
Symbol
Characteristic
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Propagation Delay
to Output
IN (Diff)1
380
280
400
400
250
50
680
780
900
900
460
410
450
450
200
0
560
610
850
850
480
430
450
450
200
0
580
630
850
850
510
460
450
450
200
0
610
660
850
850
tPLH / tPHL
IN (SE)2
Enable3
Disable3
ps
tS
tH
tR
tSKEW
Setup Time E¯N¯ to IN5
0
0
0
0
ps
ps
ps
ps
mV
Hold Time
IN to E¯N¯ 6
-200
100
25
-200
100
25
-200
100
25
-200
100
25
Release Time E¯N¯ to IN7
Within-Device Skew4
350
300
300
300
75
50
50
50
VPP (AC) Minimum Input Swing8
250
250
250
250
VCC
1.6
-
VCC
0.4
-
VCC
1.6
-
VCC
0.4
-
VCC
1.6
-
VCC
0.4
-
VCC
1.6
-
VCC
0.4
-
VCMR
Common Mode Range9
V
tr / tf
1.
Rise/Fall Time
250
650
275
600
275
600
275
600
ps
The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the
differential output signals.
2.
3.
The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal.
Enable is defined as the propagation delay from the 50% point of a negative transition on E¯N¯ to the 50% point of a positive transition on Q (or a
negative transition on Q¯). Disable is defined as the propagation delay from the 50% point of a positive transition on E¯N¯ to the 50% point of a
negative transition on Q (or a positive transition on Q¯).
4.
5.
The within-device skew is defined as the worst-case difference between any two similar delay paths within a single device.
The setup time is the minimum time that E¯N¯ must be asserted prior to the next transition of IN/ I¯N¯ to prevent an output response greater than
±75mV to that IN/ I¯N¯ transition (see Figure 1).
6.
7.
8.
9.
The hold time is the minimum time that E¯N¯ must remain asserted after a negative going IN or a positive going I¯N¯ to prevent an output response
greater than ±75 mV to that IN/ I¯N¯ transition (see Figure 2).
The release time is the minimum time that E¯N¯ must be de-asserted prior to the next IN/ I¯N¯ transition to ensure an output response that meets the
specified IN to Q propagation delay and output transition times (see Figure 3).
VPP(min) is defined as the minimum peak-to-peak input differential voltage which will cause no increase in the propagation delay. The VPP(min)
is AC limited for the E111, because differential input as low as 50 mV will still produce full ECL levels at the output.
VCMR is defined as the range within which the VIH level may vary, with the device still meeting the propagation delay specification. The VIL level
must be such that the peak-to-peak voltage is less than 1.0V and greater than or equal to VPP(min).
IN
IN
IN
IN
IN
IN
H
EN
EN
EN
November 2006 * REV - 3
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4
AZ10E111
AZ100E111
PACKAGE DIAGRAM
PLCC 28
NOTES:
MILLIMETERS
INCHES
1.
DATUMS –L-, -M-, AND –N- DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS
PLASTIC BODY AT MOLD PARTING LINE.
DIMENSION G1, TRUE POSITION TO BE
MEASURED AT DATUM –T-, SEATING PLANE.
DIMENSIONS R AND U DO NOT INCLUDE
MOLD FLASH. ALOWABLE MOLD FLASH IS
0.010mm (0.250in.) PER SIDE.
DIM
A
B
C
E
MIN
12.32
12.32
4.20
MAX
12.57
12.57
4.57
MIN
0.485
0.485
0.165
0.090
0.013
MAX
0.495
0.495
0.180
0.110
0.019
2.
3.
2.29
2.79
F
0.33
0.48
4.
DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
G
H
J
K
R
U
V
W
X
T
1.27 BSC
0.050 BSC
0.66
0.51
0.64
11.43
11.43
1.07
1.07
1.07
0.81
0.026
0.020
0.025
0.450
0.450
0.042
0.042
0.042
0.032
5.
6.
CONTROLLING DIMENSION: INCH.
THE PACKAGE TOP MAY BE SMALLER THAN
THE PACKGE BOTTOM BY UP TO 0.012mm
(0.300in.). DIMENSIONS R AND U ARE
DETERMINED AT THE OUTERMOST
EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, THE BAR
BURRS, GATE BURRS AND INTERLEAD FLASH,
BUT INCLUDING ANY MISMATCH BETWEEN
THE TOP AND BOTTOM OF THE PLASTIC
BODY.
11.58
11.58
1.21
1.21
1.42
0.50
10O
0.456
0.456
0.048
0.048
0.056
0.020
10O
7.
DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE SMALLER THAN 0.025mm
(0.635in.).
Z
G1
K1
2O
2O
10.42
1.02
10.92
0.410
0.040
0.430
November 2006 * REV - 3
www.azmicrotek.com
5
AZ10E111
AZ100E111
Arizona Microtek, Inc. reserves the right to change circuitry and specifications at any time without prior notice. Arizona Microtek, Inc.
makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Arizona
Microtek, Inc. assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. Arizona Microtek, Inc. does not convey any license
rights nor the rights of others. Arizona Microtek, Inc. products are not designed, intended or authorized for use as components in systems
intended to support or sustain life, or for any other application in which the failure of the Arizona Microtek, Inc. product could create a
situation where personal injury or death may occur. Should Buyer purchase or use Arizona Microtek, Inc. products for any such
unintended or unauthorized application, Buyer shall indemnify and hold Arizona Microtek, Inc. and its officers, employees, subsidiaries,
affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly
or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Arizona Microtek, Inc. was negligent regarding the design or manufacture of the part.
November 2006 * REV - 3
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6
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