ACPL-P484 [AVAGO]
Short Maximum Propagation Delays;
| 型号： | ACPL-P484 |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | Short Maximum Propagation Delays |
| 文件： | 总12页 (文件大小：499K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ACPL-M484/P484/W484
Positive Logic High CMR Intelligent Power Module
and Gate Drive Interface Optocoupler
Data Sheet
Description
Features
The ACPL-M484/P484/W484 fast speed optocoupler con-
tainsaAlGaAsLEDandphotodetectorwithbuilt-inSchmitt
trigger to provide logic-compatible waveforms, elimi-
nating the need for additional wave shaping. The totem
pole output eliminates the need for a pull up resistor and
allows for direct drive Intelligent Power Module or gate
drive. Minimized propagation delay difference between
devices makes these optocouplers excellent solutions for
improving inverter efficiency through reduced switching
dead time.
•ꢀ Positive output type (totem pole output)
•ꢀ Truth Table Guaranteed: Vcc from 4.5 V to 30 V
•ꢀ Performance Specified for Common IPM Applications
Over Industrial Temperature Range.
•ꢀ Short Maximum Propagation Delays
•ꢀ Minimized Pulse Width Distortion (PWD)
•ꢀ Very High Common Mode Rejection (CMR)
•ꢀ Hysteresis
•ꢀ Available in SO-5 (ACPL-M484) and Stretched SO-6
Applications
package (ACPCL-P484/W484).
•ꢀ IPM Interface Isolation
•ꢀ Package Clearance/Creepage at 8 mm (ACPL-W484)
•ꢀ Safety Approval:
•ꢀ Isolated IGBT/MOSFET Gate Drive
•ꢀ AC and Brushless DC Motor Drives
•ꢀ Industrial Inverters
– UL Recognized with 5000 V
1 minute per UL1577.
(ACPL-W484) for
rms
– CSA Approved.
•ꢀ General Digital Isolation
– IEC/EN/DIN EN 60747-5-5 Approved with V
=
for
IORM
Functional Diagram
567 V
ACPL-P484 and V
for ACPL-M484 and V
= 891 V
for ACPL-W484,
peak
IORM
peak
peak
= 1140 V
IORM
ACPL-M484
under option 060.
Anode
1
3
6
5
4
VCC
Note: A 0.1 µF bypass
capacitor must be con-
nected between pins
Vcc and Ground.
Specifications
VO
Cathode
Ground
SHIELD
•ꢀ Wide operating temperature range: -40° C to 105° C
•ꢀ Maximum propagation delay t / t = 150/120 ns
PHL PLH
Truth Table
(Positive Logic)
•ꢀ Maximum Pulse Width Distortion (PWD) = 90 ns
ACPL-P484 & ACPL-W484
•ꢀ Propagation Delay Difference Min/Max = -130/130 ns
Anode
N.C.
1
2
3
6
5
4
VCC
LED
ON
V
O
HIGH
•ꢀ Wide Operating V Range: 4.5 to 30 Volts
CC
VO
•ꢀ 30 kV/µs minimum common mode rejection (CMR) at
OFF
LOW
Cathode
Ground
SHIELD
V
= 1000 V
CM
Truth Table Guaranteed:
Vcc from 4.5 V to 30 V
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
Ordering Information
ACPL-M484/P484/W484 is UL recognized with 3750/3750/5000 Vrms/1 minute rating per UL 1577.
Option
IEC/EN/DIN
Part number
RoHS Compliant
-000E
Package
Surface Mount
Tape & Reel
EN 60747-5-5
Quantity
ACPL-M484
SO-5
X
X
X
X
X
X
X
X
100 per tube
1500 per reel
100 per tube
1500 per reel
100 per tube
1000 per reel
100 per tube
1000 per reel
-500E
X
X
X
X
-060E
X
X
-560E
ACPL-P484
ACPL-W484
-000E
Stretched
SO-6
-500E
-060E
X
X
-560E
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry.
Example 1:
ACPL-P484-560E to order product of Stretched SO-6 Surface Mount package in Tape and Reel packaging with IEC/EN/
DIN EN 60747-5-5 Safety Approval in RoHS compliant.
Example 2:
ACPL-P484-000E to order product of Stretched SO-6 Surface Mount package in Tube packaging and RoHS compliant.
Example 3:
ACPL-M484-000E to order product of SO-5 Surface Mount package in Tube packaging and RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
2
Package Outline Drawings
ACPL-M484 SO-5 Package, 5 mm Creepage & Clearance
VCC
6
5
4
ANODE
1
3
MXXX
XXX
7.0 0.ꢀ
VOUT
4.4 0.1
(0.ꢀ76 0.00ꢁ8
(0.173 0.0048
CATHODE
GND
TYPE NUMBER (LAST 3 DIGITS8
DATE CODE
0.4 0.05
(0.016 0.00ꢀ8
3.6 0.1ꢂ
(0.14ꢀ 0.0048
0.10ꢀ 0.10ꢀ
0.15 0.0ꢀ5
(0.006 0.0018
ꢀ.5 0.1
(0.004 0.0048
(0.09ꢁ 0.0048
7° MAX.
0.71
MIN
1.ꢀ7
BSC
(0.0ꢀꢁ8
(0.0508
MAX. LEAD COPLANARITY
= 0.10ꢀ (0.0048
Dimensions in millimeters (inches).
* Maximum Mold ꢀash on each side is 0.15 mm (0.006).
Note: Foating Lead Protrusion is 0.15 mm (6 mils) max.
Land Pattern Recommendation
4.4
(0.17)
1.3
(0.05)
2.5
(0.10)
2.0
(0.080)
0.64
(0.025)
8.27
(0.325)
Dimension in millimeters (inches)
3
ACPL-P484 Stretched SO-6 Package, 7 mm clearance
Land Pattern Recommendation
4.580 + 0.ꢀ54
0
1.ꢀ7 (0.050ꢁ BSG
0.381 0.1ꢀ7
(0.015 0.005ꢁ
0.180 + 0.010
10.7 (0.4ꢀ1ꢁ
(
)
0.76 (0.030ꢁ
0.000
1.ꢀ7 (0.050ꢁ
ꢀ.16 (0.085ꢁ
7.6ꢀ (0.300ꢁ
6.81 (0.ꢀ68ꢁ
1.590 0.1ꢀ7
(0.063 0.005ꢁ
3.180 0.1ꢀ7
(0.1ꢀ5 0.005ꢁ
0.45 (0.018ꢁ
45°
7°
7°
7°
0.ꢀ54 0.050
(0.010 0.00ꢀꢁ
0.ꢀ0 0.10
(0.008 0.004ꢁ
7°
1
0.ꢀ50
5° NOM.
Floating Lead Protusions max. 0.25 (0.01)
Dimensions in Millimeters (Inches)
(0.040 0.010ꢁ
9.7 0.ꢀ50
(0.38ꢀ 0.010ꢁ
Lead Coplanarity = 0.1 mm (0.004 Inches)
ACPL-W484 Stretched SO-6 Package, 8 mm clearance
Land Pattern Recommendation (W-type)
4.580 + 0.254
0
0.180 + 0.010
(
)
1.27 (0.050ꢀ BSG
0.381 0.127
0.000
12.650 (0.498ꢀ
0.760 (0.030ꢀ
(0.015 0.005ꢀ
1
2
3
6
5
4
7.62 (0.300ꢀ
6.807 + 0.127
1.905 (0.075ꢀ
1.270 (0.050ꢀ
0
0.268 + 0.005
(
)
0.000
1.590 0.127
(0.063 0.005ꢀ
3.180 0.127
(0.125 0.005ꢀ
45°
0.45 (0.018ꢀ
0.20 0.10
7°
(0.008 0.004ꢀ
7°
0.254 0.050
(0.010 0.002ꢀ
0.750 0.250
(0.0295 0.010ꢀ
35° NOM.
Floating Lead Protusions max. 0.25 (0.01)
Dimensions in Millimeters (Inches)
11.500 0.25
(0.453 0.010ꢀ
Lead Coplanarity = 0.1 mm (0.004 Inches)
4
Recommended Pb-Free IR Profile
Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision). Non-Halide Flux should be used.
Regulatory Information
The ACPL-M484/P484/W484 is approved by the following organizations:
IEC/EN/DIN EN 60747-5-5 (Option 060 only)
Approved with Maximum Working Insulation Voltage V
= 567 V
for ACPL-M484, V
= 891 V
for ACPL-P484
IORM
peak
IORM
peak
and V
= 1140 V
for ACPL-W484
IORM
peak
UL
Approval under UL 1577, component recognition program up to V = 3750 V
File E55361 for ACPL-M484 & ACPL-
ISO
RMS
P484;
Approval under UL 1577, component recognition program up to V = 5000 V
File E55361 for ACPL-W484;
ISO
RMS
CSA
Approval under CSA Component Acceptance Notice #5, File CA 88324.
Table 1. IEC/EN/DIN EN 60747-5-5 Insulation Characteristics* (ACPL-M484/P484/W484 Option 060)
Description
Symbol
ACPL-M484
ACPL-P484
ACPL-W484
Unit
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 150 Vrms
I – IV
I – III
I – II
I – IV
I – III
I – II
I – IV
I – III
I – II
for rated mains voltage ≤ 300 Vrms
for rated mains voltage ≤ 600 Vrms
Climatic Classification
55/105/21
55/105/21
55/105/21
2
Pollution Degree (DIN VDE 0110/1.89)
Maximum Working Insulation Voltage
2
2
VIORM
VPR
567
1063
891
1670
1140
2137
Vpeak
Vpeak
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec,
Partial discharge < 5 pC
Input to Output Test Voltage, Method a*
VIORM x 1.6 = VPR, Type and Sample Test, tm = 10 sec,
Partial discharge < 5 pC
VPR
907
1426
6000
1824
8000
Vpeak
Highest Allowable Overvoltage
VIOTM
6000
Vpeak
(Transient Overvoltage tini = 60 sec)
Safety-limiting values – maximum values allowed in
the event of a failure.
TS
IS, INPUT
PS, OUTPUT 600
175
230
175
230
600
175
230
600
°C
mA
mW
Case Temperature
Input Current
Output Power
Insulation Resistance at TS, VIO = 500 V
RS
>109
>109
>109
Ω
*
Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog, under Product Safety Regulations section, (IEC/EN/
DIN EN 60747-5-2) for a detailed description of Method a and Method b partial discharge test profiles.
5
Table 2. Insulation and Safety Related Specifications
Parameter
Symbol
ACPL-M484 ACPL-P484 ACPL-W484 Units
Conditions
Minimum External Air Gap
(External Clearance)
L(101)
5.0
7.0
8.0
mm
mm
mm
Measured from input terminals to
output terminals, shortest distance
through air.
Minimum External Tracking
(External Creepage)
L(102)
5.0
8.0
8.0
Measured from input terminals to
output terminals, shortest distance
path along body.
Minimum Internal Plastic Gap
(Internal Clearance)
0.08
0.08
0.08
Through insulation distance conductor
to conductor, usually the straight line
distance thickness between the
emitter and detector.
Tracking Resistance
(Comparative Tracking Index)
CTI
>175
IIIa
>175
IIIa
>175
IIIa
V
DIN IEC 112/VDE 0303 Part 1
Isolation Group
Material Group (DIN VDE 0110, 1/89,
Table 1)
Table 3. Absolute Maximum Ratings
Parameter
Symbol
Min.
Max.
125
105
10
Units
°C
Note
Storage Temperature
Operating Temperature
Average Input Current
TS
-55
-40
TA
°C
IF(avg)
IF(tran)
mA
Peak Transient Input Current
(<1 µs pulse width, 300 pps)
(<200 µs pulse width, < 1% duty cycle)
1.0
40
A
mA
Reverse Input Voltage
Average Output Current
Supply Voltage
VR
IO
5
V
50
35
35
145
210
mA
VCC
VO
PT
0
Output Voltage
-0.5
Total Package Power Dissipation (ACPL-M484)
Total Package Power Dissipation
mW
mW
1
1
PT
Solder Reflow Temperature Profile
See Reflow Thermal Profile.
Table 4. Recommended Operating Conditions
Parameter
Symbol
VCC
Min.
4.5
4
Max.
30
Units
V
Note
Power Supply Voltage (1)
Forward Input Current (ON)
Forward Input Voltage (OFF)
Operating Temperature
2
IF(ON)
VF(OFF)
TA
7
mA
V
–
0.8
105
-40
°C
Note:
1. Truth Table guaranteed: 4.5 V to 30 V
6
Table 5. Electrical Specifications
Over recommended operating conditions T = -40° C to 105° C, V = +4.5 V to 30 V, I
= 4 mA to 7 mA, V = 0 V to
F(ON) F(OFF)
A
CC
0.8 V, unless otherwise specified. All typical values at T = 25° C.
A
Parameter
Logic Low Output Voltage
Symbol
Min.
Typ.
Max.
0.3
Units Test Conditions
Fig.
1, 3
Note
V
V
I
I
I
I
= 3.5 mA
OL
OL
OL
OH
OH
0.5
= 6.5 mA
Logic High Output Voltage
Logic Low Supply Current
Logic High Supply Current
V
V
-0.3
V
V
-0.04
-0.07
V
= -3.5 mA
= -6.5 mA
2, 3, 7
OH
CC
CC
CC
Vcc -0.5
I
I
I
1.5
1.7
1.5
1.7
0.8
3.0
3.0
3.0
3.0
2.2
mA
mA
mA
mA
mA
V
V
V
V
= 5.5 V, V = 0 V, I = 0 mA
F o
CCL
CCH
FLH
CC
CC
CC
CC
= 20 V, V = 0 V, I = 0 mA
F
o
= 5.5 V, I = 7 mA, I = 0 mA
F
o
= 30 V, I = 7 mA, I = 0 mA
F
o
Threshold Input Current
Low to High
Threshold Input Voltage
High to Low
V
0.8
V
I = 4 mA
F
FHL
OSL
Logic Low Short Circuit
Output Current
I
I
125
125
200
200
mA
mA
mA
mA
V
V
V
V
V
= V = 5.5 V, V = 0 V
3
3
O
CC
F
= V = 30 V, V = 0 V
O
CC
F
Logic High Short Circuit
Output Current
-200
-200
1.5
-125
-125
1.7
= 5.5 V, I = 7 mA, V = GND
F O
OSH
CC
CC
= 20 V, I = 7 mA, V = GND
F
O
Input Forward Voltage
V
1.3
5
T
A
= 25° C, I = 4 mA
4
F
F
1.85
V
I = 4 mA
F
Input Reverse Breakdown
Voltage
BV
V
I
= 10 µA
R
R
Input Diode Temperature
Coefficient
∆V /∆T
1.7
60
mV/°C
pF
I
= 4 mA
F
A
F
Input Capacitance
C
IN
f = 1 MHz, V = 0 V
4
F
7
Table 6. Switching Specifications
Over recommended operating conditions T = -40° C to 105° C, V = +4.5 V to 30 V, I
= 4 mA to 7 mA, V
= 0 V
A
CC
F(ON)
F(OFF)
to 0.8 V, unless otherwise specified. All typicals at T = 25° C.
A
Parameter
Symbol
Min. Typ.
Max. Units Test Conditions
Fig.
Note
Propagation Delay Time
to Logic Low Output Level
tPHL
95
150
150
120
120
90
ns
ns
ns
ns
CL = 100 pF, IF(ON) = 4 mA →ꢀVF = 0 V
Loaded as per Fig. 5
5, 6, 8
6
Propagation Delay Time
to Logic High Output Level
tPLH
85
CL = 100 pF, VF = 0 V → IF(ON) = 4 mA
Loaded as per Fig. 5
5, 6, 8
6
Pulse Width Distortion
|tPHL - tPLH
= PWD
|
CL = 100 pF
9
90
Loaded as per Fig. 5
Propagation Delay
Difference Between
Any 2 Parts
PDD
-130
-130
130
CL = 100 pF
10
130
Loaded as per Fig. 5
Output Rise Time (10-90%)
Output Fall Time (90-10%)
tr
tf
6
ns
ns
5
5
9
6
Logic High Common Mode |CMH|
Transient Immunity
30
kV/µs |VCM| = 1000 V, IF = 4.0 mA,
7
7
VCC = 5 V, TA = 25° C
Logic Low Common Mode
Transient Immunity
|CML|
30
kV/µs |VCM| = 1000 V, VF = 0 V,
9
VCC = 5 V, TA = 25° C
Table 7. Package Characteristics
Parameter
Symbol
Min.
Typ.
Max. Units
Test Conditions
Fig. Note
Input-Output Momentary
Withstand Voltage*
VISO
3750 (ACPL-M484/P484)
5000 (ACPL-W484)
Vrms
RH < 50%, t = 1 min.
TA = 25° C
5, 8
Input-Output Resistance
Input-Output Capacitance
RI-O
CI-O
1012
0.6
Ohm
pF
VI-O = 500 Vdc
5
5
f = 1 MHz, VI-O = 0 Vdc
*
The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
voltage rating. For the continuous voltage rating, refer to the IEC/EN/DIN EN 60747-5-5 Insulation Characteristics Table (if applicable).
UVLO
Figure 10a & b show typical output waveforms during Power-up and Power-down processes.
Notes:
1. Derate total package power dissipation, P , linearly above 70° C free-air temperature at a rate of 4.5mW/°C(ACPL-P484/W484) and linearly above
T
85° C free-air temperature at a rate of 0.75mW/°C(ACPL-M484).
2. Detector requires a Vcc of 4.5 V or higher for stable operation as output might be unstable if Vcc is lower than 4.5 V. Be sure to check the power
ON/OFF operation other than the supply current.
3. Duration of output short circuit time should not exceed 500 µs.
4. Input capacitance is measured between pin 1 and pin 3.
5. Device considered a two-terminal device: pins 1, 2 and 3 shorted together and pins 4, 5 and 6 shorted together.
6. The t
propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.3 V point on the leading edge of the
PLH
output pulse. The t
propagation delay is measured from the 50% point on the trailing edge of the input pulse to the 1.3 V point on the trailing
PHL
edge of the output pulse.
7. CM is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic high state, V > 2.0 V.
H
O
CM is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic low state, V < 0.8 V. Note:
L
O
Equal value split resistors (Rin/2) must be used at both ends of the LED.
8. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500V
for one second (leakage detection
RMS
current limit, I < = 5 µA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN
I-O
60747-5-5 Insulation Characteristics Table, if applicable.
9. Pulse Width Distortion (PWD) is defined as |t
- t
| for any given device.
PHL PLH
10. The difference of t
and t
between any two devices under the same test condition.
PLH
PHL
11. Use of a 0.1 µF bypass capacitor connected between pins Vcc and Ground is recommended.
8
0.1
0.08
0.06
0.04
0.02
0.045
0.04
IF = 4 mA
VCC = 4.5 V
VF = 0 V
IO = -6.5 mA
0.035
0.03
IO = 6.5 mA
0.025
0.02
IO = -3.5 mA
IO = 3.5 mA
0.015
0.01
-40
-10
20
50
80
110
-40
-10
20
50
80
110
TA - TEMPERATURE - °C
TA - TEMPERATURE - °C
Figure 1. Typical Logic Low Output Voltage vs. Temperature
Figure 2. Typical Logic High Output Current vs. Temperature
100.00000
5
4
3
2
1
0
TA = 25° C
10.00000
VCC = 4.5 V
TA = 25° C
1.00000
0.10000
0.01000
0.00100
0.00010
0.00001
0
0.5
1
1.5
2
2.5
3
1.1
1.2
1.3
1.4
1.5
1.6
IF - INPUT CURRENT - mA
VF - FORWARD VOLTAGE - V
Figure 3. Typical Output Voltage vs. Forward Input Current
Figure 4. Typical Input Diode Forward Characteristic
PULSE GEN.
tr = tf = 5 ns
f = 100 kHz
1% DUTY
CYCLE
THE PROBE AND JIG CAPACITANCES ARE
INCLUDED IN C1.
VCC
Vo = 5 V
R1
1000 Ω
560 Ω
5 V
Zo = 50
IF(ON)
4 mA
7 mA
OUTPUT Vo
MONITORING
NODE
1
2
6
5
4
ALL DIODES ARE EITHER 1N916 OR 1N3064
619 Ω
*
IF(ON)
D1
50% IF(ON)
INPUT IF
0 mA
D2
D3
D4
INPUT
MONITORING
tPLH
tPHL
3
SHIELD
NODE
C1 =
15 pF
5 kΩ
R1
VOH
1.3 V
VOL (0 V)
OUTPUT V
*0.1 µF BYPASS – SEE NOTE 11
Figure 5. Circuit for tPLH, tPHL, tr, tf
9
35
120
100
80
IF = 4 mA
30 TA = 25° C
VCC = 4.5 V
TPHL (IF = 4 mA)
25
20
15
10
5
T
PHL (IF = 7 mA)
TPLH (IF = 4 mA)
TPLH (IF = 7 mA)
60
0
-40
-10
20
50
80
110
0
5
10
15
20
25
30
35
TA - Temperature - °C
VCC - Supply Voltage - V
Figure 6. Typical Propagation Delays vs. Temperature
Figure 7. Typical Logic High Output Voltage vs. Supply Voltage
120
TA = 25° C
TPHL (IF = 4 mA)
100
TPHL (IF = 7 mA)
TPLH (IF = 4 mA)
80
60
TPLH (IF = 7 mA)
10
0
5
15
20
25
30
35
VCC - Supply Voltage - V
Figure 8. Typical Propagation Delay vs. Supply Voltage
VCC
CMH
CML
RIN/2
A
1
6
5
4
VCM
|VCM
|
B
(PEAK)
0.1 µF
+
ꢀ
0 V
VOH
VOL
VFF
2
OUTPUT Vo
MONITORING
NODE
SWITCH AT A: IF = 4 mA
Vo (MIN.)*
3
SHIELD
RIN/2
OUTPUT Vo
VCM
ꢀ
SWITCH AT B: VF = 0 V
+
Vo (MAX.)*
* SEE NOTE 7
Figure 9. Test Circuit for Common Mode Transient Immunity and Typical Waveforms
10
10 V
Vcc = 2~4 V
Vcc = 2~4 V
Vcc
Vcc = 1.8 V (typ)
Vcc = 1.8 V (typ)
0 V
Output
High
Impedance
state
High
Impedance
state
1 ms
i. LED is ON
Discharge delay,
depending on the
power supply slew rate
Figure 10a. Vcc Ramp when LED is ON
10V
Vcc = 2~4 V
Vcc = 2~4 V
Vcc
Vcc = 1.8 V (typ)
Vcc = 1.8 V (typ)
0 V
High
Impedance
state
High
Impedance
state
Output
1 ms
ii. LED is OFF
Discharge delay,
depending on the
power supply slew rate
Figure 10b. Vcc Ramp when LED is OFF
11
Thermal Model for ACPL-M484
SO5 Package Optocoupler
Thermal Model for ACPL-P484/W484
SO6 Package Optocoupler
Definitions
Definitions
R
11
R
12
R
21
R
22
:
:
:
:
Junction to Ambient Thermal Resistance of LED due
to heating of LED
R
11
R
12
R
21
R
22
:
:
:
:
Junction to Ambient Thermal Resistance of LED due
to heating of LED
Junction to Ambient Thermal Resistance of LED due
to heating of Detector (Output IC)
Junction to Ambient Thermal Resistance of LED due
to heating of Detector (Output IC)
Junction to Ambient Thermal Resistance of Detector
(Output IC) due to heating of LED.
Junction to Ambient Thermal Resistance of Detector
(Output IC) due to heating of LED.
Junction to Ambient Thermal Resistance of Detector
(Output IC) due to heating of Detector (Output IC).
Junction to Ambient Thermal Resistance of Detector
(Output IC) due to heating of Detector (Output IC).
P : Power dissipation of LED (W).
1
P : Power dissipation of LED (W).
1
P : Power dissipation of Detector / Output IC (W).
2
P : Power dissipation of Detector / Output IC (W).
2
T : Junction temperature of LED (˚C).
1
T : Junction temperature of LED (˚C).
1
T : Junction temperature of Detector (˚C).
2
T : Junction temperature of Detector (˚C).
2
T : Ambient temperature.
a
T : Ambient temperature.
a
∆T : Temperature difference between LED junction and
∆T : Temperature difference between LED junction and
1
1
ambient (˚C).
ambient (˚C).
∆T : Temperature deference between Detector junction ∆T : Temperature deference between Detector junction
2
2
and ambient.
and ambient.
Ambient Temperature: Junction to Ambient Thermal Re- Ambient Temperature: Junction to Ambient Thermal Re-
sistances were measured approximately 1.25cm above sistances were measured approximately 1.25cm above
optocoupler at ~23˚C in still air
optocoupler at ~23˚C in still air
Description
Description
This thermal model assumes that an 5-pin single-channel
This thermal model assumes that an 6-pin single-channel
plastic package optocoupler is soldered into a 7.62 cm x plastic package optocoupler is soldered into a 7.62 cm x
7.62 cm printed circuit board (PCB). The temperature at
the LED and Detector junctions of the optocoupler can be
calculated using the equations below.
7.62 cm printed circuit board (PCB). The temperature at
the LED and Detector junctions of the optocoupler can be
calculated using the equations below.
T = (R * P + R * P ) + T -- (1)
T = (R * P + R * P ) + T -- (1)
1 11 1 12 2 a
1
11
1
12
2
a
T = (R * P + R * P ) + T -- (2)
T = (R * P + R * P ) + T -- (2)
2
21
1
22
2
a
2
21
1
22
2
a
Jedec Specifications
R
11
R , R
12 21
R
22
Jedec Specifications
R
11
R , R
12 21
R
22
191
126
77, 91
26, 35
99
51
167
117
64, 81
31, 39
89
54
low K board
low K board
high K board
Notes:
high K board
Notes:
1. Maximum junction temperature for above parts: 125 °C.
1. Maximum junction temperature for above parts: 125 °C.
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved.
AV02-2947EN - September 23, 2013
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