ACNW3130-500 [AVAGO]
1 CHANNEL LOGIC OUTPUT OPTOCOUPLER;
| 型号： | ACNW3130-500 |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER 输出元件 光电 |
| 文件： | 总20页 (文件大小：449K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ACPL-3130/J313 ACNW3130
Very High CMR 2.5 Amp Output Current
IGBT Gate Driver Optocoupler
Data Sheet
Description
Features
•ꢀ Highꢀspeedꢀresponse.
J313ꢀandꢀtheꢀANCW3130ꢀcontainꢀanꢀAlGaAsꢀLED.ꢀTheꢀLEDꢀ •ꢀ VeryꢀhighꢀCMR.
Theꢀ ACPL-3130ꢀ containsꢀ aꢀ GaAsPꢀ LEDꢀ whileꢀ theꢀ ACPL-
isꢀopticallyꢀcoupledꢀtoꢀanꢀintegratedꢀcircuitꢀwithꢀaꢀpowerꢀ
outputꢀ stage.ꢀ Theseꢀ optocouplersꢀ areꢀ ideallyꢀ suitedꢀ forꢀ
drivingꢀpowerꢀIGBTsꢀandꢀMOSFETsꢀusedꢀinꢀmotorꢀcontrolꢀ
inverterꢀ applications.ꢀTheꢀ highꢀ operatingꢀ voltageꢀ rangeꢀ
ofꢀtheꢀoutputꢀstageꢀprovidesꢀtheꢀdriveꢀvoltagesꢀrequiredꢀ
byꢀ gateꢀ controlledꢀ devices.ꢀ Theꢀ voltageꢀ andꢀ currentꢀ
suppliedꢀbyꢀtheseꢀoptocouplersꢀmakeꢀthemꢀideallyꢀsuitedꢀ
forꢀdirectlyꢀdrivingꢀIGBTsꢀwithꢀratingsꢀupꢀtoꢀ1200ꢀV/100ꢀA.ꢀ
ForꢀIGBTsꢀwithꢀhigherꢀratings,ꢀtheꢀACPL-3130ꢀseriesꢀcanꢀbeꢀ
usedꢀtoꢀdriveꢀaꢀdiscreteꢀpowerꢀstageꢀwhichꢀdrivesꢀtheꢀIGBTꢀ
gate.ꢀTheꢀANCW3130ꢀhasꢀtheꢀhighestꢀinsulationꢀvoltageꢀofꢀ
•ꢀ Bootstrappableꢀsupplyꢀcurrent.
•ꢀ SafetyꢀApprovalꢀ(pending):
ULꢀRecognizedꢀ
-ꢀ3750ꢀV ꢀforꢀ1ꢀmin.ꢀforꢀACPL-3130/J313.ꢀ
rms
-ꢀ5000ꢀV ꢀforꢀ1ꢀmin.ꢀForꢀACNW3130
rms
CSAꢀApproval
IEC/EN/DINꢀENꢀ60747-5-2ꢀApprovedꢀ
-ꢀV
-ꢀV
-ꢀV
ꢀ=ꢀ630ꢀV
ꢀ=ꢀ891ꢀV
ꢀforꢀACPL-3130ꢀ(Optionꢀ060)ꢀ
ꢀforꢀACPL-J313ꢀ
peak
IORM
IORM
IORM
peak
peak
ꢀ=ꢀ1414ꢀV
ꢀforꢀACNW3130
V
ꢀ=ꢀ1414ꢀV
ꢀinꢀtheꢀIEC/EN/DINꢀENꢀ60747-5-2.ꢀTheꢀ
IORM
peak
Specifications
ꢀ
peak
ACPL-J313ꢀhasꢀanꢀinsulationꢀvoltageꢀofꢀV
andꢀtheꢀV
ꢀ=ꢀ891ꢀV
IORM
ꢀ=ꢀ630ꢀV
ꢀisꢀalsoꢀavailableꢀwithꢀtheꢀACPL-
IORM
peak
•ꢀ 2.5ꢀAꢀmaximumꢀpeakꢀoutputꢀcurrent.
•ꢀ 2.0ꢀAꢀminimumꢀpeakꢀoutputꢀcurrent.
3130ꢀ(Optionꢀ060).
•ꢀ 40ꢀkV/µsꢀminimumꢀCommonꢀModeꢀRejectionꢀ(CMR)ꢀatꢀ
Functional Diagram
V
ꢀ=ꢀ1500ꢀV
CM
•ꢀ 0.5
Vꢀmaximumꢀlowꢀlevelꢀoutputꢀvoltageꢀ(V )ꢀeliminatesꢀ
OL
N/C
ANODE
CATHODE
N/C
1
8
V
V
V
V
CC
O
needꢀforꢀnegativeꢀgateꢀdrive
•ꢀ I ꢀ=ꢀ5ꢀmAꢀmaximumꢀsupplyꢀcurrent
CC
2
3
4
7
6
5
•ꢀ Underꢀ Voltageꢀ Lock-Outꢀ protectionꢀ (UVLO)ꢀ withꢀ
hysteresis
•ꢀ WideꢀoperatingꢀV ꢀrange:ꢀ15ꢀtoꢀ30ꢀVolts
O
CC
•ꢀ 500ꢀnsꢀmaximumꢀswitchingꢀspeeds
EE
SHIELD
•ꢀ Industrialꢀtemperatureꢀrange:ꢀ-40°Cꢀtoꢀ100°C
ACPL-3130 and ACPL-J313
Applications
•ꢀ IGBT/MOSFETꢀgateꢀdrive
•ꢀ AC/BrushlessꢀDCꢀmotorꢀdrives
•ꢀ Industrialꢀinverters
N/C
1
8
V
V
CC
O
2
3
4
7
6
5
ANODE
CATHODE
N/C
•ꢀ SwitchingꢀPowerꢀSuppliesꢀ(SPS)
N/C
V
EE
SHIELD
ACNW3130
Note:ꢀAꢀ0.1ꢀµFꢀbypassꢀcapacitorꢀmustꢀbeꢀconnectedꢀbetweenꢀpinsꢀV ꢀandꢀV
.
EE
CC
CAUTION:ꢀItꢀisꢀadvisedꢀthatꢀnormalꢀstaticꢀprecautionsꢀbeꢀtakenꢀinꢀhandlingꢀandꢀassemblyꢀ
ofꢀthisꢀcomponentꢀtoꢀpreventꢀdamageꢀand/orꢀdegradationꢀwhichꢀmayꢀbeꢀinducedꢀbyꢀESD.
ꢀ
Truth Table
V
– V
V – V
CC EE
CC
EE
“POSITIVE GOING” “NEGATIVE GOING”
LED
OFF
ON
(i.e., TURN-ON)
(i.e., TURN-OFF)
VO
LOW
0 - 30 V
0 - 30 V
0 - ꢀꢀ V
0 - 9.5 V
LOW
ON
ꢀꢀ - ꢀ3.5 V
ꢀ3.5 - 30 V
9.5 - ꢀ2 V
ꢀ2 - 30 V
TRANSITION
HIGH
ON
Ordering Information
Specifyꢀpartꢀnumberꢀfollowedꢀbyꢀoptionꢀnumberꢀ(ifꢀdesired).
Example:
ACPL-3130-XXXE
060ꢀ=ꢀIEC/EN/DINꢀENꢀ60747-5-2,ꢀVIORMꢀ=ꢀ630VPEAKꢀ(ACPL-3130ꢀonly)
300ꢀ=ꢀGullꢀWingꢀSurfaceꢀMountꢀOption
500ꢀ=ꢀTapeꢀandꢀReelꢀPackagingꢀOption
XXXEꢀ=ꢀLeadꢀFreeꢀOption.
Optionꢀ500ꢀcontainsꢀ1000ꢀunitsꢀ(ACPL-3130/J313),ꢀ750ꢀunitsꢀ(ACNW3130)ꢀperꢀreel.
Otherꢀoptionsꢀcontainꢀ50ꢀunitsꢀ(ACPL-3130/J313),ꢀ42ꢀunitsꢀ(ACNW3130)ꢀperꢀtube
Optionꢀdataꢀsheetsꢀavailable.ꢀContactꢀAvagoꢀTechnologiesꢀsalesꢀrepresentative,ꢀauthorizedꢀdistributor,ꢀorꢀvisitꢀourꢀWEBꢀ
siteꢀatꢀhttp://www.avagotech.com/optocouplers.
Package Outline Drawings
ACPL-3130 Outline Drawing (Standard DIP Package)
7.62 ± 0.25
(0.300 ± 0.010)
9.65 ± 0.25
(0.380 ± 0.010)
8
1
7
6
5
6.35 ± 0.25
(0.250 ± 0.010)
TYPE NUMBER
OPTION CODE*
DATE CODE
A XXXXZ
YYWW
2
3
4
1.78 (0.070) MAX.
1.19 (0.047) MAX.
+ 0.076
- 0.051
0.254
5 TYP.
+ 0.003)
- 0.002)
3.56 ± 0.13
(0.140 ± 0.005)
(0.010
4.70 (0.185) MAX.
0.51 (0.020) MIN.
2.92 (0.115) MIN.
DIMENSIONS IN MILLIMETERS AND (INCHES).
* MARKING CODE LETTER FOR OPTION NUMBERS.
"V" = OPTION 060
1.080 ± 0.320
(0.043 ± 0.013)
0.65 (0.025) MAX.
OPTION NUMBERS 300 AND 500 NOT MARKED.
2.54 ± 0.25
(0.100 ± 0.010)
NOTE: FLOATING LEAD PROTRUSION IS 0.5 mm (20 mils) MAX.
2
ACPL-3130 Gull Wing Surface Mount Option 300 Outline Drawing
LAND PATTERN RECOMMENDATION
9.65 0.ꢀ5
(0.380 0.0ꢁ0ꢂ
ꢁ.0ꢁ6 (0.040ꢂ
6
5
8
ꢁ
7
6.350 0.ꢀ5
(0.ꢀ50 0.0ꢁ0ꢂ
ꢁ0.9 (0.430ꢂ
ꢀ.0 (0.080ꢂ
ꢀ
3
4
ꢁ.ꢀ7 (0.050ꢂ
9.65 0.ꢀ5
(0.380 0.0ꢁ0ꢂ
ꢁ.780
(0.070ꢂ
MAX.
ꢁ.ꢁ9
(0.047ꢂ
MAX.
7.6ꢀ 0.ꢀ5
(0.300 0.0ꢁ0ꢂ
+ 0.076
- 0.05ꢁ
0.ꢀ54
3.56 0.ꢁ3
(0.ꢁ40 0.005ꢂ
+ 0.003ꢂ
- 0.00ꢀꢂ
(0.0ꢁ0
ꢁ.080 0.3ꢀ0
(0.043 0.0ꢁ3ꢂ
0.635 0.ꢀ5
(0.0ꢀ5 0.0ꢁ0ꢂ
ꢁꢀ ˚ NOM.
0.635 0.ꢁ30
(0.0ꢀ5 0.005ꢂ
ꢀ.54
(0.ꢁ00ꢂ
BSC
DIMENSIONS IN MILLIMETERS (INCHESꢂ.
LEAD COPLANARITY = 0.ꢁ0 mm (0.004 INCHESꢂ.
NOTE: FLOATING LEAD PROTRUSION IS 0.ꢀ5 mm (ꢁ0 milsꢂ MAX.
ACPL-J313 Outline Drawing
7.62 ± 0.25
(0.300 ± 0.010)
9.80 ± 0.25
(0.386 ± 0.010)
8
1
7
6
5
6.35 ± 0.25
(0.250 ± 0.010)
TYPE NUMBER
DATE CODE
A XXXX
YYWW
2
3
4
1.78 (0.070) MAX.
1.19 (0.047) MAX.
+ 0.076
- 0.051
0.254
5 TYP.
+ 0.003)
- 0.002)
3.56 ± 0.13
(0.140 ± 0.005)
(0.010
4.70 (0.185) MAX.
0.51 (0.020) MIN.
2.92 (0.115) MIN.
DIMENSIONS IN MILLIMETERS AND (INCHES).
OPTION NUMBERS 300 AND 500 NOT MARKED.
1.080 ± 0.320
0.65 (0.025) MAX.
(0.043 ± 0.013)
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
2.54 ± 0.25
(0.100 ± 0.010)
3
ACPL-J313 Gull Wing Surface Mount Option 300 Outline Drawing
LAND PATTERN RECOMMENDATION
9.80 0.ꢀ5
(0.386 0.0ꢁ0ꢂ
ꢁ.0ꢁ6 (0.040ꢂ
6
5
8
ꢁ
7
6.350 0.ꢀ5
(0.ꢀ50 0.0ꢁ0ꢂ
ꢁ0.9 (0.430ꢂ
ꢀ.0 (0.080ꢂ
ꢀ
3
4
ꢁ.ꢀ7 (0.050ꢂ
9.65 0.ꢀ5
(0.380 0.0ꢁ0ꢂ
ꢁ.780
(0.070ꢂ
MAX.
ꢁ.ꢁ9
(0.047ꢂ
MAX.
7.6ꢀ 0.ꢀ5
(0.300 0.0ꢁ0ꢂ
+ 0.076
- 0.05ꢁ
0.ꢀ54
3.56 0.ꢁ3
(0.ꢁ40 0.005ꢂ
+ 0.003ꢂ
- 0.00ꢀꢂ
(0.0ꢁ0
ꢁ.080 0.3ꢀ0
(0.043 0.0ꢁ3ꢂ
0.635 0.ꢀ5
(0.0ꢀ5 0.0ꢁ0ꢂ
ꢁꢀ ˚ NOM.
0.635 0.ꢁ30
(0.0ꢀ5 0.005ꢂ
ꢀ.54
(0.ꢁ00ꢂ
BSC
DIMENSIONS IN MILLIMETERS (INCHESꢂ.
LEAD COPLANARITY = 0.ꢁ0 mm (0.004 INCHESꢂ.
NOTE: FLOATING LEAD PROTRUSION IS 0.5 mm (ꢀ0 milsꢂ MAX.
ACNW3130 Outline Drawing (8-Pin Wide Body Package)
11.00
(0.433)
11.15 ± 0.15
(0.442 ± 0.006)
MAX.
9.00 ± 0.15
(0.354 ± 0.006)
7
6
5
8
TYPE NUMBER
DATE CODE
A
ACNWXXXX
YYWW
1
3
2
4
10.16 (0.400)
TYP.
1.55
(0.061)
MAX.
7 TYP.
+ 0.076
- 0.0051
0.254
+ 0.003)
- 0.002)
(0.010
5.10
(0.201)
MAX.
3.10 (0.122)
3.90 (0.154)
0.51 (0.021) MIN.
2.54 (0.100)
TYP.
DIMENSIONS IN MILLIMETERS (INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
1.78 ± 0.15
(0.070 ± 0.006)
0.40 (0.016)
0.56 (0.022)
ꢁ
ACNW3130 Gull Wing Surface Mount Option 300 Outline Drawing
11.15 ± 0.15
(0.442 ± 0.006)
LAND PATTERN RECOMMENDATION
6
7
5
8
9.00 ± 0.15
(0.354 ± 0.006)
13.56
(0.534)
1
3
2
4
2.29
(0.09)
1.3
(0.051)
12.30 ± 0.30
1.55
(0.061)
MAX.
(0.484 ± 0.012)
11.00
MAX.
(0.433)
4.00
(0.158)
MAX.
1.78 ± 0.15
(0.070 ± 0.006)
1.00 ± 0.15
(0.039 ± 0.006)
0.75 ± 0.25
(0.030 ± 0.010)
+ 0.076
- 0.0051
2.54
(0.100)
BSC
0.254
+ 0.003)
- 0.002)
(0.010
DIMENSIONS IN MILLIMETERS (INCHES).
7 NOM.
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
Recommended Solder Reflow Temperature Profile
300
PREHEATING RATE 3 °C + 1 C/–0.5 °C/SEC.
REFLOW HEATING RATE 2.5 °C ± 0.5 C/SEC.
PEAK
TEMP.
245 °C
PEAK
TEMP.
240 °C
PEAK
TEMP.
230 °C
200
2.5 °C ± 0.5 °C/SEC.
SOLDERING
TIME
200 °C
30
160 °C
150 °C
140 °C
SEC.
30
SEC.
3 °C + 1 °C/–0.5 °C
100
PREHEATING TIME
150 °C, 90 + 30 SEC.
50 SEC.
TIGHT
TYPICAL
LOOSE
ROOM
TEMPERATURE
0
0
50
100
150
200
250
TIME (SECONDS)
Note:ꢀUseꢀofꢀnonꢀchlorine-activatedꢀfluxesꢀisꢀhighlyꢀrecommended.
5
Recommended Pb-Free IR Profile
TIME WITHIN 5 °C of ACTUAL
PEAK TEMPERATURE
t
p
15 SEC.
260 +0/-5 °C
T
p
217 °C
T
L
RAMP-UP
3 °C/SEC. MAX.
RAMP-DOWN
6 °C/SEC. MAX.
150 - 200 °C
T
smax
T
smin
25
t
s
t
L
60 to 150 SEC.
PREHEAT
60to180SEC.
t 25 C to PEAK
TIME
NOTES:
THE TIME FROM 25 °C to PEAK TEMPERATURE = 8 MINUTES MAX.
= 200 °C, T = 150 °C
T
smax
smin
Note:ꢀUseꢀofꢀnonꢀchlorine-activatedꢀfluxesꢀisꢀhighlyꢀrecommended.
Regulatory Information
TheꢀACPL-3130/J313ꢀandꢀACNW3130ꢀareꢀpendingꢀapprovalꢀbyꢀtheꢀfollowingꢀorganizations:
IEC/EN/DIN EN 60747-5-2 (ACPL-3130 Option 060 only, ACPL-J313 and ACNW3130)ꢀ
Approvalꢀunder:ꢀ
IECꢀ60747-5-2ꢀ:1997ꢀ+ꢀA1:2002ꢀ
ENꢀ60747-5-2:2001ꢀ+ꢀA1:2002ꢀ
DINꢀENꢀ60747-5-2ꢀ(VDEꢀ0884ꢀTeilꢀ2):2003-01
ULꢀ
ApprovalꢀunderꢀULꢀ1577,ꢀcomponentꢀrecognitionꢀprogram,ꢀFileꢀE55361.
CSAꢀ
ApprovalꢀunderꢀCSAꢀComponentꢀAcceptanceꢀNoticeꢀ#5,ꢀFileꢀCAꢀ88324.
ꢂ
Table 1. IEC/EN/DIN EN 60747-5-2 Insulation Characteristics*
Description
Symbol
ACPL-3130 Option 060 ACPL-J313
ACNW3130 Unit
Installation classification per DIN VDE 0ꢀꢀ0/ꢀ.89, Table ꢀ
for rated mains voltage ≤ ꢀ50 V
for rated mains voltage ≤ 300 V
for rated mains voltage ≤ ꢁ50 V
for rated mains voltage ≤ ꢂ00 V
I – IV
I – IV
I – III
I – IV
I – IV
I – III
I – III
I – IV
I – IV
I – IV
I – IV
I – III
55/ꢀ00/2ꢀ
2
rms
rms
rms
rms
for rated mains voltage ≤ ꢀ000 V
rms
Climatic Classification
55/ꢀ00/2ꢀ
55/ꢀ00/2ꢀ
Pollution Degree (DIN VDE 0ꢀꢀ0/ꢀ.89)
Maximum Working Insulation Voltage
2
2
V
V
ꢂ30
ꢀꢀ8ꢀ
89ꢀ
ꢀꢂꢃ0
ꢀꢁꢀꢁ
2ꢂ52
V
peak
IORM
Input to Output Test Voltage, Method b* V x ꢀ.8ꢃ5=V ,
V
peak
IORM
PR
PR
ꢀ00% Production Test with t =ꢀ sec, Partial discharge < 5 pC
m
Input to Output Test Voltage, Method a* V x ꢀ.5=V ,
V
V
9ꢁ5
ꢀ33ꢂ
ꢂ000
2ꢀ2ꢀ
8000
V
peak
IORM
PR
PR
Type and Sample Test, t =ꢂ0 sec, Partial discharge < 5 pC
m
Highest Allowable Overvoltage
(Transient Overvoltage tini = ꢀ0 sec)
ꢂ000
V
peak
IOTM
Safety-limiting values – maximum values allowed in the event of a failure, also see Figure ꢁꢀ and ꢁ2.
Case Temperature
Input Current
T
ꢀꢃ5
230
ꢂ00
>ꢀ0
ꢀꢃ5
ꢁ00
ꢂ00
ꢀ50
ꢁ00
ꢃ00
°C
S
I
mA
mW
W
S, INPUT
Output Power
P
R
S, OUTPUT
9
9
9
Insulation Resistance at T , V = 500 V
>ꢀ0
>ꢀ0
S
IO
S
*ꢀReferꢀtoꢀtheꢀoptocouplerꢀsectionꢀofꢀtheꢀIsolationꢀandꢀControlꢀComponentsꢀDesigner’sꢀCatalog,ꢀunderꢀProductꢀSafetyꢀRegulationsꢀsection,ꢀ(IEC/EN/DINꢀ
ENꢀ60747-5-2)ꢀforꢀaꢀdetailedꢀdescriptionꢀofꢀMethodꢀaꢀandꢀMethodꢀbꢀpartialꢀdischargeꢀtestꢀprofiles.
Note:ꢀTheseꢀoptocouplersꢀareꢀsuitableꢀforꢀ“safeꢀelectricalꢀisolation”ꢀonlyꢀwithinꢀtheꢀsafetyꢀlimitꢀdata.ꢀMaintenanceꢀofꢀtheꢀsafetyꢀdataꢀshallꢀbeꢀensuredꢀbyꢀ
meansꢀofꢀprotectiveꢀcircuits.ꢀSurfaceꢀmountꢀclassificationꢀisꢀClassꢀAꢀinꢀaccordanceꢀwithꢀCECCꢀ00802.
Table 2. Insulation and Safety Related Specifications
Parameter
Symbol ACPL-3130 ACPL-J313 ACNW3130 Units
Conditions
Minimum External Air Gap L(ꢀ0ꢀ)
(Clearance)
ꢃ.ꢀ
ꢃ.ꢁ
8.0
0.5
9.ꢂ
mm
mm
mm
Measured from input terminals to output terminals,
shortest distance through air.
Minimum External Tracking L(ꢀ02)
(Creepage)
ꢃ.ꢁ
ꢀ0.0
ꢀ.0
Measured from input terminals to output terminals,
shortest distance path along body.
Minimum Internal Plastic
Gap (Internal Clearance)
0.08
Through insulation distance conductor to conductor,
usually the straight line distance thickness between
the emitter and detector.
Tracking Resistance (Com- CTI
parative Tracking Index)
> ꢀꢃ5
IIIa
> ꢀꢃ5
IIIa
> 200
IIIa
V
DIN IEC ꢀꢀ2/VDE 0303 Part ꢀ
Isolation Group
Material Group (DIN VDE 0ꢀꢀ0, ꢀ/89, Table ꢀ)
AllꢀAvagoꢀdataꢀsheetsꢀreportꢀtheꢀcreepageꢀandꢀclearanceꢀinherentꢀtoꢀtheꢀoptocouplerꢀcomponentꢀitself.ꢀTheseꢀdimensionsꢀareꢀneededꢀasꢀaꢀstartingꢀ
pointꢀforꢀtheꢀequipmentꢀdesignerꢀwhenꢀdeterminingꢀtheꢀcircuitꢀinsulationꢀrequirements.ꢀHowever,ꢀonceꢀmountedꢀonꢀaꢀprintedꢀcircuitꢀboard,ꢀminimumꢀ
creepageꢀandꢀclearanceꢀrequirementsꢀmustꢀbeꢀmetꢀasꢀspecifiedꢀforꢀindividualꢀequipmentꢀstandards.ꢀForꢀcreepage,ꢀtheꢀshortestꢀdistanceꢀpathꢀalongꢀ
theꢀsurfaceꢀofꢀaꢀprintedꢀcircuitꢀboardꢀbetweenꢀtheꢀsolderꢀfilletsꢀofꢀtheꢀinputꢀandꢀoutputꢀleadsꢀmustꢀbeꢀconsidered.ꢀThereꢀareꢀrecommendedꢀtechniquesꢀ
suchꢀasꢀgroovesꢀandꢀribsꢀwhichꢀmayꢀbeꢀusedꢀonꢀaꢀprintedꢀcircuitꢀboardꢀtoꢀachieveꢀdesiredꢀcreepageꢀandꢀclearances.ꢀCreepageꢀandꢀclearanceꢀdistancesꢀ
willꢀalsoꢀchangeꢀdependingꢀonꢀfactorsꢀsuchꢀasꢀpollutionꢀdegreeꢀandꢀinsulationꢀlevel.
ꢃ
Table 3. Absolute Maximum Ratings
Parameter
Symbol
Min.
-55
Max.
ꢀ25
ꢀ00
25
Units
°C
Note
Storage Temperature
Operating Temperature
Average Input Current
T
S
T
A
-ꢁ0
°C
I
I
mA
A
ꢀ
F(AVG)
F(TRAN)
Peak Transient Input Current
(<ꢀ µs pulse width, 300pps)
ꢀ.0
Reverse Input Voltage
ACPL-3ꢀ30
V
R
5
V
ACPL-J3ꢀ3
ACNW3ꢀ30
3
V
3
V
“High”Peak Output Current
“Low”Peak Output Current
Supply Voltage
I
I
2.5
2.5
35
500
A
2
2
OH(PEAK)
A
OL(PEAK)
V – V
0
0
V
CC EE
Input Current (Rise/Fall Time)
Output Voltage
t
/t
ns
V
r(IN) f(IN)
V
V
CC
O(PEAK)
Output Power Dissipation
Total Power Dissipation
Lead Solder Temperature
P
P
250
295
mW
mW
3
ꢁ
O
T
ACPL-3ꢀ30
ACPL-J3ꢀ3
ACNW3ꢀ30
2ꢂ0°C for ꢀ0 sec., ꢀ.ꢂ mm below seating plane
2ꢂ0°C for ꢀ0 sec., up to seating plane
See Package Outline Drawings section
Solder Reflow Temperature Profile
Table 4. Recommended Operating Conditions
Parameter
Symbol
V - V
Min.
ꢀ5
Max.
30
Units
V
Note
Power Supply
CC EE
Input Current (ON)
ACPL-3ꢀ30
ACPL-J3ꢀ3
ACNW3ꢀ30
I
ꢃ
ꢀꢂ
mA
F(ON)
ꢀ0
ꢀ0
mA
V
Input Voltage (OFF)
V
- 3.0
- ꢁ0
0.8
ꢀ00
F(OFF)
Operating Temperature
T
°C
A
8
Table 5. Electrical Specifications (DC)
Overꢀrecommendedꢀoperatingꢀconditionsꢀ(T ꢀ=ꢀ-40ꢀtoꢀ100°C,ꢀI
EE
ꢀ=ꢀ7ꢀtoꢀ16ꢀmA,ꢀV
ꢀ=ꢀ-3.0ꢀtoꢀ0.8ꢀV,ꢀV ꢀ=ꢀ15ꢀtoꢀ30ꢀV,ꢀ
A
F(ON)
A
F(OFF) CC
EE
V ꢀ=ꢀGround)ꢀunlessꢀotherwiseꢀspecified.ꢀAllꢀtypicalꢀvaluesꢀatꢀT ꢀ=ꢀ25°CꢀandꢀV ꢀ-ꢀV ꢀ=ꢀ30ꢀV,ꢀunlessꢀotherwiseꢀnoted.
CC
Parameter
Symbol Device
Min.
0.5
Typ.
Max.
Units
Test Conditions
Fig.
Note
High Level Output Current
I
OH
ꢀ.5
A
V = V – ꢁ
2, 3, 2ꢀ
5
O
CC
2.0
A
V = V – ꢀ5
2
O
CC
Low Level Output Current
I
OL
0.5
2.0
A
V = V + 2.5
5, ꢂ, 22
5
O
EE
2.0
A
V = V + ꢀ5
2
O
EE
High Level Output Voltage
Low Level Output Voltage
High Level Supply Current
V
V
V -ꢁ
V -3
V
I = -ꢀ00 mA
ꢀ, 3, 23
ꢁ, ꢂ, 2ꢁ
ꢃ, 8
ꢂ, ꢃ
OH
CC
CC
O
0.ꢀ
2.5
0.5
5.0
V
I = ꢀ00 mA
O
OL
I
I
I
mA
Output open,
CCH
I = ꢃ to ꢀꢂ mA
F
Low Level Supply Current
2.5
5.0
mA
Output open,
CCL
FLH
V = -3.0 to +0.8 V
F
Threshold Input Current
Low to High
ACPL-3ꢀ30
ACPL-J3ꢀ3
ACNW3ꢀ30
2.3
ꢀ.0
2.3
5.0
5.0
8.0
mA
mA
mA
V
I = 0 mA, V > 5 V
9, ꢀꢃ, 25
ꢀ0, ꢀ8, 25
ꢀꢀ, ꢀꢃ, 25
O
O
I = 0 mA, V > 5 V
O
O
I = 0 mA, V > 5 V
O
O
Threshold Input Voltage
High to Low
V
V
0.8
I = 0 mA, V > 5 V
O O
FHL
Input Forward Voltage
ACPL-3ꢀ30 ꢀ.2
ACPL-J3ꢀ3 ꢀ.2
ACNW3ꢀ30 ꢀ.2
ꢀ.5
ꢀ.8
V
I = ꢀ0 mA
F
ꢀ9
20
20
F
ꢀ.ꢂ
ꢀ.95
ꢀ.95
V
I = ꢀ0 mA
F
ꢀ.ꢂ
V
I = ꢀ0 mA
F
Temperature Coefficient of
Input Forward Voltage
DV /DT ACPL-3ꢀ30
-ꢀ.ꢂ
-ꢀ.3
-ꢀ.3
mV/°C
I = ꢀ0 mA
F
F
A
ACPL-J3ꢀ3
ACNW3ꢀ30
ACPL-3ꢀ30
ACPL-J3ꢀ3
ACNW3ꢀ30
ACPL-3ꢀ30
ACPL-J3ꢀ3
ACNW3ꢀ30
mV/°C
I = ꢀ0 mA
F
mV/°C
I = ꢀ0 mA
F
Input Reverse Breakdown Voltage BV
5
3
3
V
I = ꢀ0 µA
R
R
V
I = ꢀ00 µA
R
V
I = ꢀ00 µA
R
Input Capacitance
C
ꢂ0
pF
pF
pF
V
f = ꢀ MHz, V = 0 V
F
IN
ꢃ0
f = ꢀ MHz, V = 0 V
F
ꢃ0
f = ꢀ MHz, V = 0 V
F
UVLO Threshold
UVLO Hysteresis
V
V
ꢀꢀ.0
9.5
ꢀ2.3
ꢀ0.ꢃ
ꢀ.ꢂ
ꢀ3.5
ꢀ2.0
I = ꢀ0 mA, V > 5 V
F
2ꢂ, 38
2ꢂ, 38
2ꢂ, 38
UVLO+
O
V
I = ꢀ0 mA, V > 5 V
F O
UVLO–
UVLO
V
I = ꢀ0 mA, V > 5 V
F O
HYS
9
Table 6. Switching Specifications (AC)
Overꢀrecommendedꢀoperatingꢀconditionsꢀ(T ꢀ=ꢀ-40ꢀtoꢀ100°C,ꢀI
EE
ꢀ=ꢀ7ꢀtoꢀ16ꢀmA,ꢀV
ꢀ=ꢀ-3.0ꢀtoꢀ0.8ꢀV,ꢀV ꢀ=ꢀ15ꢀtoꢀ30ꢀV,ꢀ
A
F(ON)
A
F(OFF) CC
EE
V ꢀ=ꢀGround)ꢀunlessꢀotherwiseꢀspecified.ꢀAllꢀtypicalꢀvaluesꢀatꢀT ꢀ=ꢀ25°CꢀandꢀV ꢀ-ꢀV ꢀ=ꢀ30ꢀV,ꢀunlessꢀotherwiseꢀnoted.
CC
Parameter
Symbol
Min.
0.ꢀ0
0.ꢀ0
Typ.
0.30
0.30
Max. Units Test Conditions
Fig.
Note
Propagation Delay Time to High Output Level
Propagation Delay Time to Low Output Level
t
0.50 µs
0.50 µs
Rg = ꢀ0 W,
ꢀ2,ꢀ3, ꢀꢂ
ꢀꢁ, ꢀ5,
ꢀꢂ, 2ꢃ
PLH
PHL
Cg = ꢀ0 nF,
t
f = ꢀ0 kHz,
Duty Cycle = 50%
Pulse Width Distortion
PWD
0.3
µs
ꢀꢃ
Propagation Delay Difference Between Any Two Parts PDD
or Channels
(t – t
PHL PLH
)
-0.35
0.35 µs
39, ꢁ0 ꢀ2
2ꢃ
Rise Time
t
t
t
t
0.ꢀ
0.ꢀ
0.8
0.ꢂ
50
µs
µs
µs
µs
R
Fall Time
F
UVLO Turn On Delay
UVLO Turn Off Delay
I = ꢀ0 mA, V > 5 V
2ꢂ
2ꢂ
UVLO ON
UVLO OFF
F
O
I = ꢀ0 mA, V > 5 V
F
O
Output High Level Common Mode Transient Immunity |CM |
ꢁ0
ꢁ0
kV/µs T = 25°C,
2ꢃ
ꢀ3, ꢀꢁ
H
A
I = ꢀ0 to ꢀꢂ mA,
F
V = ꢀ500 V
CM
V = 30 V
CC
Output Low Level Common Mode Transient Immunity |CM |
50
kV/µs T = 25°C, V = 0 V,
2ꢃ
ꢀ3, ꢀ5
L
A
F
V = ꢀ500 V
CM
V = 30 V
CC
Table 7. Package Characteristics
Overꢀrecommendedꢀtemperatureꢀ(T ꢀ=ꢀ-40ꢀtoꢀ100°C)ꢀunlessꢀotherwiseꢀspecified.ꢀAllꢀtypicalsꢀatꢀT ꢀ=ꢀ25°C.
A
A
Parameter
Symbol Device
Min.
3ꢃ50
3ꢃ50
Typ.
Max. Units
Test Conditions
Fig.
Note
8, ꢀꢀ
9, ꢀꢀ
ꢀ0, ꢀꢀ
ꢀꢀ
Input-Output Momentary Withstand
Voltage**
V
ISO
ACPL-3ꢀ30
ACPL-J3ꢀ3
V
rms
RH < 50%,
t = ꢀ min.,
T = 25°C
A
V
rms
ACNW3ꢀ30 5000
ACPL-3ꢀ30
V
rms
ꢀ2
W
W
W
Resistance Input-Output)
R
ꢀ0
V = 500 V
I-O
I-O
ꢀ2
ACPL-J3ꢀ3
ꢀ0
V = 500 V
I-O
ꢀ2
ꢀ3
ACNW3ꢀ30 ꢀ0
ꢀ0
V = 500 V,
I-O
T = 25°C
A
ꢀꢀ
W
ꢀ0
V = 500 V,
I-O
A
T = ꢀ00°C
Capacitance Input-Output)
C
ACPL-3ꢀ30
ACPL-J3ꢀ3
ACNW3ꢀ30
0.ꢂ
0.8
0.5
ꢁꢂꢃ
ꢁꢁ2
ꢀ2ꢂ
pF
Freq=ꢀ MHz
Freq=ꢀ MHz
Freq=ꢀ MHz
I-O
pF
0.ꢂ
pF
LED-to-Case Thermal Resistance
LED-to-Detector Thermal Resistance
Detector-to-Case Thermal Resistance
q
q
q
°C/W
°C/W
°C/W
Thermocouple
located at center
underside of package
32
32
32
LC
LD
DC
** The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For
the continuous voltage rating refer to your equipment level safety specification or Avago Application Note ꢀ0ꢃꢁ entitled “Optocoupler Input-Output Endurance
Voltage.”
ꢀ0
Notes:
1.ꢀ Derateꢀlinearlyꢀaboveꢀ70°ꢀCꢀfree-airꢀtemperatureꢀatꢀaꢀrateꢀofꢀ0.3ꢀmA/°C.
2.ꢀ Maximumꢀpulseꢀwidthꢀ=ꢀ10ꢀµs,ꢀmaximumꢀdutyꢀcycleꢀ=ꢀ0.2%.ꢀThisꢀvalueꢀisꢀintendedꢀtoꢀallowꢀforꢀcomponentꢀtolerancesꢀforꢀdesignsꢀwithꢀI
Oꢀpeakꢀ
minimumꢀ=ꢀ2.0ꢀA.ꢀSeeꢀApplicationsꢀsectionꢀforꢀadditionalꢀdetailsꢀonꢀlimitingꢀI ꢀpeak.
OH
3.ꢀ Derateꢀlinearlyꢀaboveꢀ70°ꢀCꢀfree-airꢀtemperatureꢀatꢀaꢀrateꢀofꢀ4.8ꢀmW/°C.
4.ꢀ Derateꢀlinearlyꢀaboveꢀ70°ꢀCꢀfree-airꢀtemperatureꢀatꢀaꢀrateꢀofꢀ5.4ꢀmW/°C.ꢀTheꢀmaximumꢀLEDꢀjunctionꢀtemperatureꢀshouldꢀnotꢀexceedꢀ125°C.
5.ꢀ Maximumꢀpulseꢀwidthꢀ=ꢀ50ꢀµs,ꢀmaximumꢀdutyꢀcycleꢀ=ꢀ0.5%.
6.ꢀ InꢀthisꢀtestꢀV ꢀisꢀmeasuredꢀwithꢀaꢀdcꢀloadꢀcurrent.ꢀWhenꢀdrivingꢀcapacitiveꢀloadsꢀV ꢀwillꢀapproachꢀV ꢀasꢀI ꢀapproachesꢀzeroꢀamps.
OH
OH
CC
OH
7.ꢀ Maximumꢀpulseꢀwidthꢀ=ꢀ1ꢀms,ꢀmaximumꢀdutyꢀcycleꢀ=ꢀ20%.
8.ꢀ InꢀaccordanceꢀwithꢀUL1577,ꢀeachꢀoptocouplerꢀisꢀproofꢀtestedꢀbyꢀapplyingꢀanꢀinsulationꢀtestꢀvoltageꢀꢀ4500ꢀV ꢀforꢀ1ꢀsecondꢀ(leakageꢀdetectionꢀ
rms
currentꢀlimit,ꢀI ꢀ≤ꢀ5ꢀµA).
I-O
9.ꢀ InꢀaccordanceꢀwithꢀUL1577,ꢀeachꢀoptocouplerꢀisꢀproofꢀtestedꢀbyꢀapplyingꢀanꢀinsulationꢀtestꢀvoltageꢀꢀ4500ꢀV ꢀforꢀ1ꢀsecondꢀ(leakageꢀdetectionꢀ
rms
currentꢀlimit,ꢀI ꢀ≤ꢀ5ꢀµA).
I-O
10.ꢀInꢀaccordanceꢀwithꢀUL1577,ꢀeachꢀoptocouplerꢀisꢀproofꢀtestedꢀbyꢀapplyingꢀanꢀinsulationꢀtestꢀvoltageꢀꢀ6000ꢀV ꢀforꢀ1ꢀsecondꢀ(leakageꢀdetectionꢀ
rms
currentꢀlimit,ꢀI ꢀꢀ≤ꢀ5ꢀµA).
I-O
11.ꢀDeviceꢀconsideredꢀaꢀtwo-terminalꢀdevice:ꢀpinsꢀ1,ꢀ2,ꢀ3,ꢀandꢀ4ꢀshortedꢀtogetherꢀandꢀpinsꢀ5,ꢀ6,ꢀ7,ꢀandꢀ8ꢀshortedꢀtogether.
12.ꢀTheꢀdifferenceꢀbetweenꢀt ꢀandꢀt ꢀbetweenꢀanyꢀtwoꢀACPL-3130,ꢀACPL-J313ꢀorꢀACNW3130ꢀpartsꢀunderꢀtheꢀsameꢀtestꢀcondition.
PHL
PLH
13.ꢀPinsꢀ1ꢀandꢀ4ꢀneedꢀtoꢀbeꢀconnectedꢀtoꢀLEDꢀcommon.
14.ꢀCommonꢀmodeꢀtransientꢀimmunityꢀinꢀtheꢀhighꢀstateꢀisꢀtheꢀmaximumꢀtolerableꢀdV /dtꢀofꢀtheꢀcommonꢀmodeꢀpulse,ꢀV ,ꢀtoꢀassureꢀthatꢀtheꢀoutputꢀ
CM
CM
willꢀremainꢀinꢀtheꢀhighꢀstateꢀ(i.e.,ꢀV ꢀ>ꢀ15.0ꢀV).
O
15.ꢀCommonꢀmodeꢀtransientꢀimmunityꢀinꢀaꢀlowꢀstateꢀisꢀtheꢀmaximumꢀtolerableꢀdV /dtꢀofꢀtheꢀcommonꢀmodeꢀpulse,ꢀV ,ꢀtoꢀassureꢀthatꢀtheꢀoutputꢀ
CM
CM
willꢀremainꢀinꢀaꢀlowꢀstateꢀ(i.e.,ꢀV ꢀ<ꢀ1.0ꢀV).
O
16.ꢀThisꢀloadꢀconditionꢀapproximatesꢀtheꢀgateꢀloadꢀofꢀaꢀ1200ꢀV/75AꢀIGBT.
17.ꢀPulseꢀWidthꢀDistortionꢀ(PWD)ꢀisꢀdefinedꢀasꢀ|t ꢀ-ꢀt |ꢀforꢀanyꢀgivenꢀdevice.
PHL PLH
-1
-2
-3
-4
0
-1
-2
2.0
1.8
1.6
1.4
I
I
V
V
= 7 to 16 mA
I = 7 to 16 mA
F
F
= -100 mA
= 15 to 30 V
= 0 V
V
V
V
= (V
- 4 V)
OUT
CC
EE
OUT
CC
100
25
-40 °C
°C
C
= 15 to 30 V
CC
°
= 0 V
EE
I
V
V
= 7 to 16 mA
= 15 to 30 V
F
CC
-3
-4
-5
-6
1.2
1.0
= 0 V
EE
0
0.5
1.0
1.5
2.0
2.5
-40 -20
0
2 0
40
60
80 100
-40 -20
0
2 0
40
60
80 100
I
- OUTPUT HIGH CURRENT - A
T
- TEMPERATURE - °C
T
- TEMPERATURE - °C
A
OH
A
Figure 1. V vs. Temperature.
Figure 2. I vs. Temperature.
Figure 3. V vs. I .
OH
OH
OH
OH
0.25
4
4
V
V
V
= -3.0 to 0.8 V
= 15 to 30 V
= 0 V
F(OFF)
CC
EE
V
(OFF) = -3.0 TO 0.8 V
V
V
V
V
(OFF) = -3.0 TO 0.8 V
F
F
I
= 100 mA
= 15 TO 30 V
= 0 V
= 2.5 V
= 15 TO 30 V
OUT
OUT
CC
0.20
0.15
0.10
0.05
V
V
3
CC
EE
3
2
= 0 V
EE
2
1
0
1
0
100
25
°C
C
°
-40 °C
0
-40 -20
0
2 0
40
60
80 100
-40 -20
0
2 0
40
60
80 100
0
0.5
1.0
1.5
2.0
2.5
T
- TEMPERATURE - °C
T
- TEMPERATURE - °C
I
- OUTPUT LOW CURRENT - A
OL
A
A
Figure 4. V vs. Temperature.
Figure 5. I vs. Temperature.
Figure 6. V vs. I .
OL OL
OL
OL
ꢀꢀ
3.5
3.0
2.5
3.5
3.0
2.5
5
4
3
2
V
V
= 15 TO 30 V
= 0 V
I
I
I
I
CC
EE
CCH
CCL
CCH
CCL
OUTPUT = OPEN
V
V
= 30 V
= 0 V
= 10 mA for I
CC
EE
I
I
T
V
= 10 mA for I
CCH
F
F
2.0
1.5
2.0
1.5
= 0 mA for I
CCL
1
0
I
I
F
F
CCH
CCL
= 25 °C
A
EE
= 0 mA for I
= 0 V
-40 -20
0
2 0
40
60
80 100
15
20
25
30
-40 -20
0
2 0
40
60
80 100
T
- TEMPERATURE - °C
V
CC
- SUPPLY VOLTAGE - V
T
- TEMPERATURE - °C
A
A
Figure 7. I vs. Temperature.
Figure 8. I vs. V .
Figure 9. I vs. Temperature. (ACPL-3130)
CC
CC
CC
FLH
5
5
4
3
500
I
T
= 10 mA
F
V
V
= 15 TO 30 V
= 0 V
T
T
V
V
= 15 TO 30 V
= 0 V
CC
EE
PLH
PHL
CC
EE
= 25 °C
A
4
3
Rg = 10 �
OUTPUT = OPEN
OUTPUT = OPEN
400
300
Cg = 10 nF
DUTY CYCLE = 50%
f = 10 kHz
2
1
0
2
1
0
200
100
-40 -20
0
2 0
40
60
80 100
-40 -20
0
2 0
40
60
80 100
15
20
25
30
T
- TEMPERATURE - °C
T
- TEMPERATURE - ° C
A
V
- SUPPLY VOLTAGE - V
CC
A
Figure 10. I vs. Temperature. (ACPL-J313)
Figure 11. I vs. Temperature. (ACNW3130)
Figure 12. Propagation Delay vs. V .
FLH
FLH
CC
500
500
500
I
= 10 mA
V
T
I
= 30 V, V
= 0 V
EE
V
= 30 V, V
= 0 V
EE
F
CC
= 25 °C
CC
Rg = 10 Ω, Cg = 10 nF
= 25 °C
VCC = 30 V, V EE = 0 V
Rg = 10Ω , Cg = 10 nF
DUTY CYCLE = 50%
f = 10 kHz
A
= 10 mA
T
F
A
400
300
400
300
400
300
Cg = 10 nF
DUTY CYCLE = 50%
f = 10 kHz
DUTY CYCLE = 50%
f = 10 kHz
200
100
200
100
200
100
T
T
T
T
TPLH
TPHL
PLH
PHL
PLH
PHL
6
8
10
12
14
16
0
10
20
30
40
50
-40 -20
0
2 0
40
60
80 100
I
- FORWARD LED CURRENT - mA
Rg - SERIES LOAD RESISTANCE - Ω
T
- TEMPERATURE - °C
F
A
Figure 13. Propagation Delay vs. I .
Figure 14. Propagation Delay vs. Temperature.
Figure 15. Propagation Delay vs. Rg.
F
ꢀ2
35
30
500
400
300
V
T
= 30 V, V
= 0 V
EE
CC
= 25 °C
A
30
25
20
15
10
5
25
20
15
10
I
= 10 mA
F
Rg = 10
�
DUTY CYCLE = 50%
f = 10 kHz
200
100
5
0
T
T
PLH
PHL
0
0
1
2
3
4
5
0
1
2
3
4
5
0
20
40
60
80
100
I
- FORWARD LED CURRENT - mA
F
I
- FORWARD LED CURRENT - mA
Cg - LOAD CAPACITANCE - nF
F
Figure 16. Propagation Delay vs. Cg.
Figure 17. Transfer Characteristics (ACPL-3130 / Figure 18. Transfer Characteristics (ACPL-J313)
ACNW3130)
1000
1000
T
= 25°C
A
T
= 25°C
A
100
10
100
10
I
F
I
F
+
+
V
V
F
F
-
-
1.0
1.0
0.1
0.1
0.01
0.01
0.001
0.001
1.10
1.20
1.30
1.40
1.50
1.60
1.2
1.3
1.4
1.5
1.6
1.7
V
- FORWARD VOLTAGE - VOLTS
V
- FORWARD VOLTAGE - VOLTS
F
F
Figure 19. I vs. V . (ACPL-3130)
Figure 20. I vs. V . (ACPL-J313 / ACNW3130)
F
F
F
F
1
2
3
4
8
0.1 µF
+
4 V
7
6
5
−
I
= 7 to
F
V
= 15
+
CC
to 30 V
16 mA
−
I
OH
Figure 21. I Test Circuit.
OH
1
2
3
4
8
0.1 µF
I
OL
7
6
5
V
= 15
+
CC
to 30 V
-
2.5 V
+
-
Figure 22. I Test Circuit.
OL
ꢀ3
1
2
3
4
8
1
2
3
4
8
0.1 µF
0.1 µF
100 mA
V
OH
7
6
5
7
6
5
I
= 7 to
F
V
= 15
V
= 15
+
+
-
CC
to 30 V
CC
to 30 V
16 mA
Ð
V
OL
100 mA
Figure 24. V Test Circuit.
Figure 23. V Test Circuit.
OL
OH
1
2
8
1
2
8
0.1 µF
0.1 µF
7
7
6
5
V
= 15
+
-
+
CC
I
I
= 10 mA
F
V
F
CC
-
V
> 5 V
to 30 V
V
> 5 V
O
O
3
4
6
5
3
4
Figure 26. UVLO Test Circuit.
Figure 25. I Test Circuit.
FLH
1
8
7
6
5
I
0.1 µF
F
I
= 7 to 16 mA
F
V
= 15
CC
+
-
to 30 V
2
3
4
t
t
f
r
500
Ω
+
-
V
O
90%
10 KHz
50% DUTY
CYCLE
10
Ω
50%
10%
V
10 nF
OUT
t
t
PHL
PLH
Figure 27. t , t , t , and t Test Circuit and Waveforms.
PLH PHL
r
f
V
CM
∆V
∆ t
V
CM
1
2
3
4
8
7
6
5
=
� t
I
F
0.1 µF
A
B
0 V
∆ t
+
+
-
V
5 V
O
-
V
= 30 V
CC
V
OH
OL
V
O
SWITCH AT A: I = 10 mA
F
V
O
V
SWITCH AT B: I = 0 mA
F
+
V
= 1500 V
CM
Figure 28. CMR Test Circuit and Waveforms.
ꢀꢁ
Applications Information
Selecting the Gate Resistor (R ) to Minimize IGBT Switching
g
Losses. (Discussion applies to ACPL-3130, ACPL-J313 and
ACNW3130)
Eliminating Negative IGBT Gate Drive (Discussion applies to
ACPL-3130, ACPL-J313, and ACNW3130)
Step 1: Calculate Rg minimum from the I peak specification. The
OL
Toꢀ keepꢀ theꢀ IGBTꢀ firmlyꢀ off,ꢀ theꢀ ACPL-3130ꢀ hasꢀ aꢀ veryꢀ
lowꢀmaximumꢀVOLꢀspecificationꢀofꢀ0.5ꢀV.ꢀTheꢀACPL-3130ꢀ
IGBT and R in Figure 30 can be analyzed as a simple RC circuit
g
with a voltage supplied by the ACPL-3130.
realizesꢀ thisꢀ veryꢀ lowꢀ V ꢀ byꢀ usingꢀ aꢀ DMOSꢀ transistorꢀ
OL
withꢀ 1ꢀ Wꢀ (typical)ꢀ onꢀ resistanceꢀ inꢀ itsꢀ pullꢀ downꢀ circuit.ꢀ
VCC − VEE − VOL
Rg ≥
WhenꢀtheꢀACPL-3130ꢀisꢀinꢀtheꢀlowꢀstate,ꢀtheꢀIGBTꢀgateꢀisꢀ
IOLPEAK
shortedꢀ toꢀ theꢀ emitterꢀ byꢀ R ꢀ +ꢀ 1ꢀ W.ꢀ Minimizingꢀ R ꢀ andꢀ
g
g
theꢀleadꢀinductanceꢀfromꢀtheꢀACPL-3130ꢀtoꢀtheꢀIGBTꢀgateꢀ
andꢀ emitterꢀ (possiblyꢀ byꢀ mountingꢀ theꢀ ACPL-3130ꢀ onꢀ aꢀ
smallꢀPCꢀboardꢀdirectlyꢀaboveꢀtheꢀIGBT)ꢀcanꢀeliminateꢀtheꢀ
needꢀforꢀnegativeꢀIGBTꢀgateꢀdriveꢀinꢀmanyꢀapplicationsꢀasꢀ
shownꢀinꢀFigureꢀ29.ꢀCareꢀshouldꢀbeꢀtakenꢀwithꢀsuchꢀaꢀPCꢀ
boardꢀdesignꢀtoꢀavoidꢀroutingꢀtheꢀIGBTꢀcollectorꢀorꢀemitterꢀ
tracesꢀcloseꢀtoꢀtheꢀACPL-3130ꢀinputꢀasꢀthisꢀcanꢀresultꢀinꢀ
unwantedꢀ couplingꢀ ofꢀ transientꢀ signalsꢀ intoꢀ theꢀ ACPL-
3130ꢀandꢀdegradeꢀperformance.ꢀ(IfꢀtheꢀIGBTꢀdrainꢀmustꢀ
beꢀroutedꢀnearꢀtheꢀACPL-3130ꢀinput,ꢀthenꢀtheꢀLEDꢀshouldꢀ
beꢀ reverse-biasedꢀ whenꢀ inꢀ theꢀ offꢀ state,ꢀ toꢀ preventꢀ theꢀ
transientꢀsignalsꢀcoupledꢀfromꢀtheꢀIGBTꢀdrainꢀfromꢀturningꢀ
onꢀtheꢀACPL-3130.)
15 + 5 − 2
=
2.5
∼
= 7.2Ω = 8Ω
Theꢀ V ꢀ valueꢀ ofꢀ 2ꢀ Vꢀ inꢀ theꢀ previousꢀ equationꢀ isꢀ aꢀ
OL
conservativeꢀvalueꢀofꢀV ꢀatꢀtheꢀpeakꢀcurrentꢀofꢀ2.5Aꢀ(seeꢀ
OL
Figureꢀ6).ꢀAtꢀlowerꢀR ꢀvaluesꢀtheꢀvoltageꢀsuppliedꢀbyꢀtheꢀ
g
ACPL-3130ꢀ isꢀ notꢀ anꢀ idealꢀ voltageꢀ step.ꢀ Thisꢀ resultsꢀ inꢀ
lowerꢀpeakꢀcurrentsꢀ(moreꢀmargin)ꢀthanꢀpredictedꢀbyꢀthisꢀ
analysis.ꢀWhenꢀnegativeꢀgateꢀdriveꢀisꢀnotꢀusedꢀV ꢀinꢀtheꢀ
EE
previousꢀequationꢀisꢀequalꢀtoꢀzeroꢀvolts.
+5 V
1
2
3
4
8
V
= 18 V
CC
+ HVDC
270 �
0.1 µF
+
-
7
6
5
Rg
Q1
Q2
3-PHASE
AC
CONTROL
INPUT
74XXX
OPEN
COLLECTOR
- HVDC
Figure 29. Recommended LED Drive and Application Circuit.
+5 V
1
8
V
= 15 V
CC
+ HVDC
270 Ω
0.1 µF
+
-
2
7
Rg
Q1
Q2
3-PHASE
AC
CONTROL
3
6
5
INPUT
V
= -5 V
EE
+
-
74XXX
4
OPEN
COLLECTOR
- HVDC
Figure 30. ACPL-3130 Typical Application Circuit with Negative IGBT Gate Drive.
ꢀ5
Step 2: Check the ACPL-3130 Power Dissipation and Increase R if
g
Necessary. The ACPL-3130 total power dissipation (P ) is equal to
T
the sum of the emitter power (P ) and the output power (P ):
E
O
P = P +PO
T
E
P = I V
•
DutyCycle
•
E
F
F
PO = PO(BIAS) +PO(SWITCHING) = ICC V +E
Rg ;Qg
•
f
•
CC
SW
PE Parameter
Description
I
F
LED Current
V
F
LED On Voltage
Duty Cycle
Maximum LED Duty Cycle
Description
PO Parameter
I
CC
Supply Current
V
V
Positive Supply Voltage
Negative Supply Voltage
CC
EE
E
Energy Dissipated in the ACPL-3ꢀ30 for each IGBT
Switching Cycle (See Figure 3ꢀ)
SW(Rg,Qg)
f
Switching Frequency
ForꢀtheꢀcircuitꢀinꢀFigureꢀ30ꢀwithꢀI ꢀ(worstꢀcase)ꢀ=ꢀ16ꢀmA,ꢀR ꢀ
SinceꢀP ꢀforꢀthisꢀcaseꢀisꢀgreaterꢀthanꢀP
,ꢀR ꢀmustꢀbeꢀ
g
F
g
O
O(MAX)
=ꢀ8ꢀW,ꢀMaxꢀDutyꢀCycleꢀ=ꢀ80%,ꢀQ ꢀ=ꢀ500ꢀnC,ꢀfꢀ=ꢀ20ꢀkHzꢀandꢀ
increasedꢀtoꢀreduceꢀtheꢀACPL-3130ꢀpowerꢀdissipation.
g
T ꢀmaxꢀ=ꢀ85˚C:
A
ForꢀQ ꢀ=ꢀ500ꢀnC,ꢀfromꢀFigureꢀ31,ꢀaꢀvalueꢀofꢀE ꢀ=ꢀ4.65ꢀµWꢀ
g
SW
givesꢀaꢀR ꢀ=ꢀ10.3ꢀΩ.
P =16mA 1.8V 0.8 = 23mW
•
g
•
E
P = 4.25mA 20V + 5.2µJ•20kHz
•
14
12
10
O
Qg = 100 nC
Qg = 500 nC
Qg = 1000 nC
= 85mW +104mW
= 189mW
V
V
= 19 V
= -9 V
> 178mW(PO( @85°C = 250mW -15°C 4.8mW/°C
•
)
CC
EE
MAX
)
8
6
4
ꢀTheꢀvalueꢀofꢀ4.25ꢀmAꢀforꢀI ꢀinꢀtheꢀpreviousꢀequationꢀwasꢀ
CC
obtainedꢀbyꢀderatingꢀtheꢀI ꢀmaxꢀofꢀ5ꢀmAꢀ(whichꢀoccursꢀatꢀ
CC
-40°C)ꢀtoꢀI ꢀmaxꢀatꢀ85˚Cꢀ(seeꢀFigureꢀ7).
CC
2
0
PO
= PO
- PO
) (
(
SWITCHINGMAX
)
(
MAX
BIAS
)
-
= 178mW 85mW
= 93mW
0
10
20
30
40
50
Rg - GATE RESISTANCE - Ω
PO
Figure 31. Energy Dissipated in the ACPL-3130 for Each IGBT Switching
Cycle.
(
SWITCHINGMAX
)
ESW
=
)
(
MAX
f
93mW
20kHz
=
= 4.65µW
ꢀꢂ
Insertingꢀtheꢀvaluesꢀforꢀq ꢀandꢀq ꢀshownꢀinꢀFigureꢀ32ꢀ
Thermal Model
(Discussion applies to ACPL-3130, ACPL-J313 and ACNW3130)
LC
DC
gives:
T = P
(
256°C/W +θ
)
+ P
(
57°C/W +θCA
)
)
+ TA
+ TA
•
•
•
θ
�
JE
E
CA
D
= 442 °C/W
LD
T
T
JD
JE
T = P
(
57°C/W +θ
)
+ P
(
111°C/W +θCA
•
JD
E
CA
D
θ
= 467 °C/W
θ
= 126 °C/W
LC
DC
Forꢀexample,ꢀgivenꢀP ꢀ=ꢀ45ꢀmW,ꢀP ꢀ=ꢀ250ꢀmW,ꢀT ꢀ=ꢀ70°Cꢀ
andꢀq ꢀ=ꢀ83°C/W:
E
O
A
T
C
CA
θ
= 83 °C/W*
CA
T = P 339°C/W + P 140°C/W + T
•
•
D
JE
E
A
•
= 45mW 339°C/W + 250mW 140°C/W + 70°C = 120°C
•
T
A
T = P 140°C/W + P 194°C/W + T
•
•
JD
E
D
A
T ꢀ=ꢀLEDꢀjunctionꢀtemperature
JE
= 45mW•140°C/W + 250mW 194°C/W + 70°C
•
T ꢀ=ꢀdetectorꢀICꢀjunctionꢀtemperature
JD
T ꢀ andꢀ T ꢀ shouldꢀ beꢀ limitedꢀ toꢀ 125°Cꢀ basedꢀ onꢀ theꢀ
T ꢀ =ꢀ caseꢀ temperatureꢀ measuredꢀ atꢀ theꢀ centerꢀ ofꢀ theꢀ
JE
JD
C
boardꢀ layoutꢀ andꢀ partꢀ placementꢀ (q )ꢀ specificꢀ toꢀ theꢀ
packageꢀbottom
CA
application
q ꢀ=ꢀLED-to-caseꢀthermalꢀresistance
LC
q
q
q
ꢀ=ꢀLED-to-detectorꢀthermalꢀresistance
LD
DC
CA
ꢀ=ꢀdetector-to-caseꢀthermalꢀresistance
ꢀ=ꢀcase-to-ambientꢀthermalꢀresistance
*q ꢀwillꢀdependꢀonꢀtheꢀboardꢀdesignꢀandꢀtheꢀplacementꢀ
CA
ofꢀtheꢀpart.
Figure 32. Thermal Model.
Theꢀ steadyꢀ stateꢀ thermalꢀ modelꢀ forꢀ theꢀ ACPL-3130ꢀ isꢀ
shownꢀinꢀFigureꢀ32.ꢀTheꢀthermalꢀresistanceꢀvaluesꢀgivenꢀ
inꢀthisꢀmodelꢀcanꢀbeꢀusedꢀtoꢀcalculateꢀtheꢀtemperaturesꢀ
atꢀeachꢀnodeꢀforꢀaꢀgivenꢀoperatingꢀcondition.ꢀAsꢀshownꢀ
byꢀtheꢀmodel,ꢀallꢀheatꢀgeneratedꢀflowsꢀthroughꢀq ꢀwhichꢀ
CA
raisesꢀtheꢀcaseꢀtemperatureꢀT ꢀaccordingly.ꢀTheꢀvalueꢀofꢀ
C
q
ꢀdependsꢀonꢀtheꢀconditionsꢀofꢀtheꢀboardꢀdesignꢀandꢀis,ꢀ
therefore,ꢀdeterminedꢀbyꢀtheꢀdesigner.ꢀTheꢀvalueꢀofꢀq ꢀ=ꢀ
CA
CA
83°C/Wꢀwasꢀobtainedꢀfromꢀthermalꢀmeasurementsꢀusingꢀaꢀ
2.5ꢀxꢀ2.5ꢀinchꢀPCꢀboard,ꢀwithꢀsmallꢀtracesꢀ(noꢀgroundꢀplane),ꢀ
aꢀsingleꢀACPL-3130ꢀsolderedꢀintoꢀtheꢀcenterꢀofꢀtheꢀboardꢀ
andꢀ stillꢀ air.ꢀ Theꢀ absoluteꢀ maximumꢀ powerꢀ dissipationꢀ
deratingꢀspecificationsꢀassumeꢀaꢀq ꢀvalueꢀofꢀ83°C/W.
CA
FromꢀtheꢀthermalꢀmodeꢀinꢀFigureꢀ32ꢀtheꢀLEDꢀandꢀdetectorꢀ
ICꢀjunctionꢀtemperaturesꢀcanꢀbeꢀexpressedꢀas:
θLC
θ
•
DC
T = P
(
θ ||
(
θLD +θDC
)
+θCA
)
+ P
+ θCA + TA
•
•
•
JE
E
LC
D
(
)
θLC +θDC +θLD
θ
θ LC
θ +θ +θ
•
DC
T = P
+θCA + P θ || θ +θ +θCA + TA
(
) )
•
(
JD
E
D
DC
LD
LC
(
)
LC
DC
LD
ꢀꢃ
LED Drive Circuit Considerations for Ultra High CMR Per-
formance. (Discussion applies to ACPL-3130, ACPL-J313,
and ACNW3130)
CMR with the LED On (CMR )
H
AꢀhighꢀCMRꢀLEDꢀdriveꢀcircuitꢀmustꢀkeepꢀtheꢀLEDꢀonꢀduringꢀ
commonꢀmodeꢀtransients.ꢀThisꢀisꢀachievedꢀbyꢀoverdrivingꢀ
theꢀLEDꢀcurrentꢀbeyondꢀtheꢀinputꢀthresholdꢀsoꢀthatꢀitꢀisꢀnotꢀ
pulledꢀbelowꢀtheꢀthresholdꢀduringꢀaꢀtransient.ꢀAꢀminimumꢀ
LEDꢀcurrentꢀofꢀ10ꢀmAꢀprovidesꢀadequateꢀmarginꢀoverꢀtheꢀ
Withoutꢀ aꢀ detectorꢀ shield,ꢀ theꢀ dominantꢀ causeꢀ ofꢀ
optocouplerꢀCMRꢀfailureꢀisꢀcapacitiveꢀcouplingꢀfromꢀtheꢀ
inputꢀsideꢀofꢀtheꢀoptocoupler,ꢀthroughꢀtheꢀpackage,ꢀtoꢀtheꢀ
detectorꢀICꢀasꢀshownꢀinꢀFigureꢀ33.ꢀTheꢀACPL-3130ꢀimprovesꢀ
CMRꢀperformanceꢀbyꢀusingꢀaꢀdetectorꢀICꢀwithꢀanꢀopticallyꢀ
transparentꢀFaradayꢀshield,ꢀwhichꢀdivertsꢀtheꢀcapacitivelyꢀ
coupledꢀ currentꢀ awayꢀ fromꢀ theꢀ sensitiveꢀ ICꢀ circuitry.ꢀ
However,ꢀ thisꢀ shieldꢀ doesꢀ notꢀ eliminateꢀ theꢀ capacitiveꢀ
couplingꢀ betweenꢀ theꢀ LEDꢀ andꢀ optocouplerꢀ pinsꢀ 5-8ꢀ
asꢀ shownꢀ inꢀ Figureꢀ 34.ꢀ Thisꢀ capacitiveꢀ couplingꢀ causesꢀ
perturbationsꢀinꢀtheꢀLEDꢀcurrentꢀduringꢀcommonꢀmodeꢀ
transientsꢀandꢀbecomesꢀtheꢀmajorꢀsourceꢀofꢀCMRꢀfailuresꢀ
forꢀaꢀshieldedꢀoptocoupler.ꢀTheꢀmainꢀdesignꢀobjectiveꢀofꢀaꢀ
highꢀCMRꢀLEDꢀdriveꢀcircuitꢀbecomesꢀkeepingꢀtheꢀLEDꢀinꢀtheꢀ
properꢀstateꢀ(onꢀorꢀoff)ꢀduringꢀcommonꢀmodeꢀtransients.ꢀ
Forꢀ example,ꢀ theꢀ recommendedꢀ applicationꢀ circuitꢀ
(Figureꢀ29),ꢀcanꢀachieveꢀ40ꢀkV/µsꢀCMRꢀwhileꢀminimizingꢀ
componentꢀcomplexity.
maximumꢀI ꢀofꢀ5ꢀmAꢀtoꢀachieveꢀ40ꢀkV/μsꢀCMR.
FLH
CMR with the LED Off (CMR )
L
AꢀhighꢀCMRꢀLEDꢀdriveꢀcircuitꢀmustꢀkeepꢀtheꢀLEDꢀoffꢀ(V ꢀ
F
≤ꢀV
)ꢀduringꢀcommonꢀmodeꢀtransients.ꢀForꢀexample,ꢀ
F(OFF)
duringꢀ aꢀ -dV /dtꢀ transientꢀ inꢀ Figureꢀ 35,ꢀ theꢀ currentꢀ
cm
flowingꢀ throughꢀ C
ꢀ alsoꢀ flowsꢀ throughꢀ theꢀ R ꢀ andꢀ
SAT
LEDP
V
ꢀ ofꢀ theꢀ logicꢀ gate.ꢀ Asꢀ longꢀ asꢀ theꢀ lowꢀ stateꢀ voltageꢀ
SAT
developedꢀacrossꢀtheꢀlogicꢀgateꢀisꢀlessꢀthanꢀV
,ꢀtheꢀLEDꢀ
F(OFF)
willꢀremainꢀoffꢀandꢀnoꢀcommonꢀmodeꢀfailureꢀwillꢀoccur.
+5 V
1
2
3
4
8
7
6
5
0.1
µF
+
-
C
I
LEDP
V
= 18 V
CC
+
Techniques to keep the LED in the proper state are dis-
cussed in the next two sections.
LEDP
V
SAT
-
¥ ¥ ¥
¥ ¥ ¥
C
LEDN
Rg
1
2
3
4
8
7
6
5
SHIELD
C
C
LEDP
LEDN
* THE ARROWS INDICATE THE DIRECTION
OF CURRENT FLOW DURING - dV
/dt.
CM
+
-
V
CM
Figure 35. Equivalent Circuit for Figure 29 During Common Mode Tran-
sient.
Theꢀ openꢀ collectorꢀ driveꢀ circuit,ꢀ shownꢀ inꢀ Figureꢀ 36,ꢀ
cannotꢀkeepꢀtheꢀLEDꢀoffꢀduringꢀaꢀ+dV /dtꢀtransient,ꢀsinceꢀ
Figure 33. Optocoupler Input to Output Capacitance Model for Unshield-
ed Optocouplers.
cm
allꢀtheꢀcurrentꢀflowingꢀthroughꢀC
ꢀmustꢀbeꢀsuppliedꢀ
LEDN
byꢀtheꢀLED,ꢀandꢀitꢀisꢀnotꢀrecommendedꢀforꢀapplicationsꢀ
requiringꢀ ultraꢀ highꢀ CMR ꢀ performance.ꢀ Figureꢀ 37ꢀ isꢀ anꢀ
L
C
1
2
3
4
8
7
6
5
LEDO1
alternativeꢀ driveꢀ circuitꢀ which,ꢀ likeꢀ theꢀ recommendedꢀ
applicationꢀcircuitꢀ(Figureꢀ29),ꢀdoesꢀachieveꢀultraꢀhighꢀCMRꢀ
performanceꢀbyꢀshuntingꢀtheꢀLEDꢀinꢀtheꢀoffꢀstate.
C
C
LEDP
LEDN
C
LEDO2
1
2
3
4
8
7
6
5
+5 V
C
LEDP
SHIELD
C
I
Figure 34. Optocoupler Input to Output Capacitance Model for Shielded
Optocouplers.
LEDN
Q1
LEDN
SHIELD
Figure 36. Not Recommended Open Collector Drive Circuit.
ꢀ8
35.
isꢀequalꢀtoꢀtheꢀmaximumꢀvalueꢀofꢀtheꢀpropagationꢀdelayꢀ
differenceꢀspecification,ꢀPDD ,ꢀwhichꢀisꢀspecifiedꢀtoꢀbeꢀ
Theꢀamountꢀofꢀdelayꢀnecessaryꢀtoꢀachieveꢀthisꢀconditionꢀ
supplyꢀvoltageꢀrisesꢀaboveꢀtheꢀACPL-3130
V
Dead Time and Propagation Delay Specifications. (Discus-
sion applies to ACPL-3130, ACPL-J313, and ACNW3130)
1
2
3
4
8
7
6
5
+5 V
Theꢀ ACPL-3130ꢀ includesꢀ aꢀ Propagationꢀ Delayꢀ Differenceꢀ
(PDD)ꢀspecificationꢀintendedꢀtoꢀhelpꢀdesignersꢀminimizeꢀ
“deadꢀ time”ꢀ inꢀ theirꢀ powerꢀ inverterꢀ designs.ꢀ Deadꢀ timeꢀ
isꢀtheꢀtimeꢀperiodꢀduringꢀwhichꢀbothꢀtheꢀhighꢀandꢀlowꢀ
sideꢀ powerꢀ transistorsꢀ (Q1ꢀ andꢀ Q2ꢀ inꢀ Figureꢀ 29)ꢀ areꢀ off.ꢀ
AnyꢀoverlapꢀinꢀQ1ꢀandꢀQ2ꢀconductionꢀwillꢀresultꢀinꢀlargeꢀ
currentsꢀflowingꢀthroughꢀtheꢀpowerꢀdevicesꢀbetweenꢀtheꢀ
highꢀandꢀlowꢀvoltageꢀmotorꢀrails.ꢀ
C
C
LEDP
LEDN
SHIELD
I
Figure 37. Recommended LED Drive Circuit for Ultra-High CMR.
LED1
V
Under Voltage Lockout Feature. (Discussion applies to
ACPL-3130, ACPL-J313, and ACNW3130)
OUT1
Q1 ON
Q1 OFF
TheꢀACPL-3130ꢀcontainsꢀanꢀunderꢀvoltageꢀlockoutꢀ(UVLO)ꢀ
featureꢀthatꢀisꢀdesignedꢀtoꢀprotectꢀtheꢀIGBTꢀunderꢀfaultꢀ
conditionsꢀ whichꢀ causeꢀ theꢀ ACPL-3130ꢀ supplyꢀ voltageꢀ
(equivalentꢀ toꢀ theꢀ fully-chargedꢀ IGBTꢀ gateꢀ voltage)ꢀ toꢀ
dropꢀbelowꢀaꢀlevelꢀnecessaryꢀtoꢀkeepꢀtheꢀIGBTꢀinꢀaꢀlowꢀ
resistanceꢀstate.ꢀWhenꢀtheꢀACPL-3130ꢀoutputꢀisꢀinꢀtheꢀhighꢀ
stateꢀandꢀtheꢀsupplyꢀvoltageꢀdropsꢀbelowꢀtheꢀACPL-3130ꢀ
Q2 ON
Q2 OFF
V
OUT2
I
LED2
t
PHL MAX
t
PLH MIN
- t
PDD* MAX = (t
)
= t
- t
PHL MAX PLH MIN
PHL PLH MAX
V
–ꢀthresholdꢀ(9.5ꢀ<ꢀV
–ꢀ<ꢀ12.0)ꢀtheꢀoptocouplerꢀ
UVLO
UVLO
outputꢀwillꢀgoꢀintoꢀtheꢀlowꢀstateꢀwithꢀaꢀtypicalꢀdelay,ꢀUVLOꢀ
TurnꢀOffꢀDelay,ꢀofꢀ0.6ꢀµs.
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE: FOR PDD CALCULATIONS THE PROPAGATION DELAYS
ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
WhenꢀtheꢀACPL-3130ꢀoutputꢀisꢀinꢀtheꢀlowꢀstateꢀandꢀtheꢀ
Figure 39. Minimum LED Skew for Zero Dead Time.
+ꢀthresholdꢀ
UVLO
(11.0ꢀ<ꢀV
+ꢀ<ꢀ13.5)ꢀtheꢀoptocouplerꢀoutputꢀwillꢀgoꢀintoꢀ
UVLO
Toꢀminimizeꢀdeadꢀtimeꢀinꢀaꢀgivenꢀdesign,ꢀtheꢀturnꢀonꢀofꢀ
LED2ꢀshouldꢀbeꢀdelayedꢀ(relativeꢀtoꢀtheꢀturnꢀoffꢀofꢀLED1)ꢀ
soꢀthatꢀunderꢀworst-caseꢀconditions,ꢀtransistorꢀQ1ꢀhasꢀjustꢀ
turnedꢀoffꢀwhenꢀtransistorꢀQ2ꢀturnsꢀon,ꢀasꢀshownꢀinꢀFigureꢀ
theꢀhighꢀstateꢀ(assumesꢀLEDꢀisꢀ“ON”)ꢀwithꢀaꢀtypicalꢀdelay,ꢀ
UVLOꢀTurnꢀOnꢀDelayꢀofꢀ0.8ꢀµs.
14
12
(12.3, 10.8)
MAX
10
(10.7, 9.2)
350ꢀnsꢀoverꢀtheꢀoperatingꢀtemperatureꢀrangeꢀofꢀ-40°Cꢀtoꢀ
100°C.
8
6
4
2
Delayingꢀ theꢀ LEDꢀ signalꢀ byꢀ theꢀ maximumꢀ propagationꢀ
delayꢀdifferenceꢀensuresꢀthatꢀtheꢀminimumꢀdeadꢀtimeꢀisꢀ
zero,ꢀbutꢀitꢀdoesꢀnotꢀtellꢀaꢀdesignerꢀwhatꢀtheꢀmaximumꢀ
deadꢀtimeꢀwillꢀbe.ꢀTheꢀmaximumꢀdeadꢀtimeꢀisꢀequivalentꢀ
toꢀ theꢀ differenceꢀ betweenꢀ theꢀ maximumꢀ andꢀ minimumꢀ
propagationꢀ delayꢀ differenceꢀ specificationsꢀ asꢀ shownꢀ inꢀ
Figureꢀ40.ꢀTheꢀmaximumꢀdeadꢀtimeꢀforꢀtheꢀACPL-3130ꢀisꢀ
700ꢀnsꢀ(=ꢀ350ꢀnsꢀ-ꢀ(-350ꢀns))ꢀoverꢀanꢀoperatingꢀtemperatureꢀ
rangeꢀofꢀ-ꢀ40°Cꢀtoꢀ100°C.
(10.7, 0.1)
5
(12.3, 0.1)
15
0
0
10
20
(V
- V
) - SUPPLY VOLTAGE - V
EE
CC
Figure 38. Under Voltage Lock Out.
NoteꢀthatꢀtheꢀpropagationꢀdelaysꢀusedꢀtoꢀcalculateꢀPDDꢀ
andꢀdeadꢀtimeꢀareꢀtakenꢀatꢀequalꢀtemperaturesꢀandꢀtestꢀ
conditionsꢀ sinceꢀ theꢀ optocouplersꢀ underꢀ considerationꢀ
areꢀtypicallyꢀmountedꢀinꢀcloseꢀproximityꢀtoꢀeachꢀotherꢀandꢀ
areꢀswitchingꢀidenticalꢀIGBTs.
ꢀ9
800
700
600
500
400
300
I
LED1
P
(mW)
S
I
(mA) FOR ACPL-3130
S
OPTION 060
V
OUT1
Q1 ON
I
(mA) FOR ACPL-J313
S
Q1 OFF
Q2 ON
Q2 OFF
V
OUT2
200
100
I
LED2
t
PHL MIN
0
t
PHL MAX
0
25 50 75 100 125 150 175 200
- CASE TEMPERATURE - °C
t
PLH
MIN
T
S
t
PLH MAX
Figure 41. Thermal Derating Curve, Dependence of Safety Limiting Value
with Case Temperature per IEC/EN/DIN EN 60747-5-2 for ACPL-3130 (op-
tion 060) and ACPL-J313.
(t
t
)
PHL- PLH MAX
PDD* MAX
MAXIMUM DEAD TIME
(DUE TO OPTOCOUPLER)
1000
= (t
= (t
- t
) + (t
) - (t
- t
PLH MIN
)
)
PHL MAX PHL MIN
PLH MAX
P
I
(mW)
(mA)
- t
- t
S
S
PHL MAX PLH MIN
PHL MIN PLH MAX
900
800
700
600
500
400
300
200
100
= PDD* MAX - PDD* MIN
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE: FOR DEAD TIME AND PDD CALCULATIONS ALL PROPAGATION
DELAYS ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
Figure 40. Waveforms for Dead Time.
0
0
25
50
75 100 125 150 175
T
- CASE TEMPERATURE - °C
S
Figure 42. Thermal Derating Curve, Dependence of Safety Limiting Value
with Case Temperature per IEC/EN/DIN EN 60747-5-2 for ACNW3130.
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Data subject to change. Copyright © 200ꢂ Avago Technologies, Limited. All rights reserved. Obsoletes AV0ꢀ-0ꢁꢂꢀEN
AV0ꢀ-0ꢂ30EN - November ꢀ, 200ꢂ
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