SD42P1008 [AUK]
4Bit Single Chip Microcontroller; 4位单片机
| 型号： | SD42P1008 |
| 厂家： | 
AUK CORP |
| 描述： | 4Bit Single Chip Microcontroller |
| 文件： | 总20页 (文件大小：98K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SD42C/P1008
Semiconductor
4Bit Single Chip Microcontroller
Description
The SD42C1008 is a microcomputer of the 4-bit single chip microcomputer SD42xx series
which can match an 8-bit microcomputer in the data processing capability.
The SD42C1008 can handle 1-bit, 4-bit, and 8-bit data as well as operates at high speed
(minimum instruction execution time : 0.95us) it contains a LCD pannel controller/driver.
Ordering Information
Type NO.
Marking
Package Code
SD42C1008
SD42C1008
QFP-80
Pin Configuration
8
0
7
9
7
8
7
7
7
6
7
5
7
4
7
3
7
2
7
1
7
0
6
9
6
8
6
7
6
6
6
5
P 5 0 / k S 4
P 4 3 / k S 3
S E G 1 2
S E G 1 3
1
2
6 4
6 3
P 4 2 / k S 2
P 4 1 / k S 1
P 4 0 / k S 0
S E G 1 4
S E G 1 5
3
4
5
6
6 2
6 1
6 0
5 9
S E G 1 6
S E G 1 7
X 0
S E G 1 8
S E G 1 9
7
8
5 8
5 7
5 6
X I
T E S T
9
X T O
X T I
S E G 2 0
S E G 2 1
1 0
5 5
5 4
5 3
5 2
5 1
S E G 2 2
1 1
1 2
1 3
1 4
V D D
S E G 2 3
S E G 2 4
P 3 3
SD42C1008
P 3 2
P 3 1
S E G 2 5
S E G 2 6
S E G 2 7
1 5
1 6
5 0
P 3 0
P 1 3 / B U Z
4 9
4 8
4 7
S E G 2 8
P 1 2 / S O
P 1 1 / S I
1 7
1 8
1 9
2 0
S E G 2 9
S E G 3 0
S E G 3 1
4 6
4 5
4 4
4 3
P 1 0 / S C K
P 0 3 / I N T 3
P 0 2 / I N T 2
C O M 0
2 1
2 2
C O M 1
C O M 2
P 0 1 / I N T 1
P 0 0 / I N T 0 / T I 0
2 3
2 4
4 2
4 1
C O M 3
P 2 3
2
5
2
6
2
7
2
8
2
9
3
0
3
1
3
2
3
3
3
4
3
5
3
6
3
7
3
8
3
9
4
0
KSI-W029-000
1
SD42C/P1008
Features
Memory mapped I/O
8-bit serial communication interface
- External / Internal clock selection
- Mode : Transmit ·Receive
Receive only
Program memory : 8192 x 10bits
Data memory : 512 x 4bits
Clock continuous
Instructions
LCD controller/driver
- Various bit manipulation
- 8-bit data operation
- 7-bit relative branch
- 1 byte absolute call
- selectable number of segments ;
20/24/28/32 segment (4/8/12 lines can
be specified as bit ports)
- Display mode selection
·
·
·
·
·
Static
Instruction cycle times
- Main ( XI = 4.19MHz )
1/2 duty (1/2 bias)
1/3 duty (1/2 bias)
1/3 duty (1/3 bias)
1/4 duty (1/3 bias)
. 15.3 us ( XI/64 = 65.5KHz )
. 1.91 us ( XI/8 = 524.0KHz )
. 0.95 us ( XI/4 = 1.05MHz )
- Sub ( XTI = 32.768KHz )
. 122 us ( XTI/4 = 8.19KHz )
Key scan
- 4, 6, 8 Pins Selectable : Port 4, 5
- Falling edge operation
4 Register Bank
64 I/O Pins
General register : 8 x 4-bit respectively
- LCD driver output pins : 36
. Segment ouput pins : 20
. Segment CMOS output pins : 12
. Common ounput pins : 4
- CMOS input/output pins : 32
Accumulator
- Bit Accumulator (CY), 4 bit Accumulator (A),
8 bit Accumulator (XA)
Multiple vectored interrupt source
- External interrupt : 4
- Internal interrupt : 4
Power saving mode
- STOP : Main clock, CPU clock stop
- STBY : Only CPU clock stop
Main clock operation
Watch timer
- fast mode : 3.91 msec
- normal mode : 0.5 sec
- buzzer output : 1, 2, 4 KHz
APPLICATION
Basic interval timer
- 8 kinds of period
- Used stabilization wait timer to wake up Stop mode
VTR, Camera, Rice Cooker, Telephone
Blood Pressure Gauge, CD Player
One 8-bit timer / event counter
KSI-W029-000
2
SD42C/P1008
BLOCK DIAGRAM
PORT2
PORT3
PORT6
PORT8
BASIC
INTERVAL
TIMER
P20
P30
P60
P80
P23
P33
P63
P83
∼
∼
∼
∼
IRQBT
TIMER/
EVENT
COUNTER
IRQTC0
SD42 CORE
WATCH
TIMER
BUZ/P13
IRQWT
FLCD
SI/P11
VLC0~VLC2
COM0~COM3
SEG0~SEG19
CLOCKED
SERIAL
INTERFACE
SO/P12
SCK/P10
PROGRAM MEMORY
(8192 X 10BITS)
DATA MEMORY
(512 X 4BITS)
LCD
CONTROL
/
IRQS0
TI0/INT0/P00
INT1/P01
INT2/P02
DRIVER
INTERRUPT
CONTROL
INT3/P03
KS0/P40
KS7/P53
DISPLAY
RAM
SEG20~SEG30
(BP0~BP11)
Fx / 2n
CPU
CLOCK
BIAS
BIT SEQ.
CLOCK
CLOCK
CLOCK
GENERATOR
STOP/ IDLE
CONTROL
BUFFER(16)
OUTPUT
CONTROL
LCD
F
DIVIDER
KSI-W029-000
3
SD42C/P1008
Program Memory(ROM)
Vector Address
CONTENTS
Prioty
INTERRUPT SUORCE
0000H
0000H
0002H
0004H
0006H
0008H
000AH
000CH
000EH
0010H
0012H
0014H
0016H
0018H
001AH
001CH
001EH
RESET
Reset Signal
VECTOR
0
1
2
3
4
IRQBT
IRQ0
Basic Interval Timer
External interrupt 0
External interrupt 1
Timer Event Counter 0
ADDRESS AREA
001FH
0020H
IRQ1
ZERO-PAGE
CALL AREA
IRQTC0
002FH
0060H
IRQ2
External interrupt 2
6
IRQ3
External interrupt 3
Serial I/O 0
8
9
IRQS0
8K Byte
IRQWT
IRQKS
Watch Timer
Key Scan
12
13
1FFFH
-
reserved
15
Data Memory(RAM)
DIRECT
m
INDIRECT
@HL
STACK
GENERAL
REGISTER
@DE @DL
$00
PAGE0
(256 Byte)
RB=0
RB=2
RB=1
RB=4
MP=0
MP=1
MP=2
MP=3
SPS=0
$FF
$00
PAGE1
(256 Byte)
MB=0
MB=0
SPS=1
SPS=2
BANK 0 $FF
(1K)
$00
PAGE2
(256 Byte)
$FF
$00
PAGE3
(256 Byte) MEMORY
I/O
; Usable
$FF
KSI-W029-000
4
SD42C/P1008
I/O Address Map
ADDRESS
Hardware Module Name
R/W
Addressing Unit
REMARKS
INITIAL
b3
b2
b1
b0
1 bit
4 bit
8bit
VALUE
318H
319H
31AH
31BH
31CH
31DH
320H
321H
322H
323H
324H
325H
332H
334H
335H
336H
337H
390H
391H
392H
3A0H
Stack pointer low (SPL)
Stack pointer high (SPH)
R/W
R/W
R/W
R/W
R/W
O
O
O
O
O
Stack pointer low
stack pointer high
E
F
SP3
-
SP2
-
SP1
SP5
IS1
OV
SP0
SP4
IS0
T
Stack Page Select Low (SPSL)
Stack Page Select High (SPSh)
Psw low (PSWL)
0
0
AC
CY
O
O
0
Z
Psw high (PSWH)
0
T/E counter mode register 0
(TMOD0)
W
R
320H.3
O
Clock source select. counter
start (ch0)
00
T/E counter register 0
(TMCNT0)
readable count value (ch0)
00
FF
T/E reference register 0
(TMREF0)
W
count reference register (ch0)
Basic Timer mode register(BMOD)
Basic interval timer count
register(BITCNT)
R/W
R
332H.3
336H.3
clock select, Bit start
readable count register
0
00
Watch timer mode register
(WMOD)
R/W
W
clock/buzzer select. bit3
readable
00
00
Lcd display mode register
(LCDMD)
O
duty/bias/clock/seg/bitport
select
Lcd control register (LCON)
Power control register
(PCON)
W
O
O
display ON/OFF
0
system clock select, idle, stop
mode
00
R/W
R/W
W
3A2H
3A4H
Operating mode register (SCMOD)
Clock output mode register
(CLOMD)
O
main/sub system clock select
cpu clock output select, clock
out EN/DIS
0
O
00
3A8H
3A9H
3AAH
3ABH
3B2H
3C2H
3C3H
3C4H
Serial interface mode register0
(SIOM0)
W
3A8H.3
O
receive/transmit mode. clock
select
00
Serial interface buffer0
(SBUFF0)
R/W
P/W
serial shift register 0
XX
Power on flag (PONF)
IME
3B2H.0
O
O
power on reset flag
0
R/W 3C2H.3
Interrupt priorty select, IME flag.
00
IPSR3
IPSR2
IPSR1
IPSR0
External interrupt mode register0
(IMOD0)
W
W
W
W
O
O
O
O
external interrupt 0 edge
detection
00
00
00
00
3C5H
3C6H
3C7H
External interrupt mode register1
(IMOD1)
external interrupt 1 edge
detection
External interrupt mode register2
(IMOD2)
external interrupt 2 edge
detection
External interrupt mode register3
(IMOD3)
external interrupt 3 edge
detection
3D8H
3D9H
IE2
IRQ2
IEBT
IRQBT
IRQWT
R/W
R/W
O
O
O
O
Interrupt EN/IRQ flag
Interrupt EN/IRQ flag
0
0
IEWT
KSI-W029-000
5
SD42C/P1008
ADDRESS
Hardware Module Name
R/W
Addressing Unit
REMARKS
INITIAL
b3
IEKSF
b2
b1
IES0
b0
IRQS0
IRQTC0
IRQ0
1 bit
4 bit
O
8bit
VALUE
3DAH
3DBH
3DCH
3DDH
3DEH
3E0H
3E1H
3E2H
3E3H
3E4H
3E5H
3E6H
3E7H
3E8H
3E9H
3F0H
3F1H
3F2H
3F3H
3F4H
3F5H
3F6H
3F8H
IRQKS
R/W
R/W
R/W
R/W
R/W
W
O
O
O
O
O
Interrupt EN/IRQ flag
0
0
0
0
0
IETC0
IE0
O
Interrupt EN/IRQ flag
Interrupt EN/IRQ flag
Interrupt EN/IRQ flag
Interrupt EN/IRQ flag
IE1
IRQ1
O
IE3
IRQ3
O
O
PW03
PW02
PW12
PW22
PW32
PW42
PW52
PW62
PW72
PW82
PW92
PW01
PW11
PW21
PW31
PW41
PW51
PW61
PW71
PW81
PW91
PW00
PW10
PW20
PW30
PW40
PW50
PW60
PW70
PW80
PW90
O
O
O
O
O
port 0, 1 mode register (PMGA)
port 2, 3 mode register (PMGB)
port 4, 5 mode register (PMGC)
port 6, 7 mode register (PMGD)
port 8, 9 mode register (PMGE)
00
00
00
00
00
PW13
PW23
W
W
W
W
PW33
PW43
PW53
PW63
PW73
PW83
PW93
PORT0 (R0)
PORT1 (R1)
PORT2 (R2)
PORT3 (R3)
PORT4 (R4)
PORT5 (R5)
PORT6 (R6)
PORT8 (R8)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
R0 Port Data Register
R1 Port Data Register
R2 Port Data Register
R3 Port Data Register
R4 Port Data Register
R5 Port Data Register
R6 Port Data Register
R8 Port Data Register
0
0
0
0
0
0
0
0
O
KSI-W029-000
6
SD42C/P1008
Pin Description
PIN
SYMBOL
P00
SHARED
I/O
FUNCTION
RESET
PORT
TYPE
BPS
PIN
INT0/TI0
I/O
- Detection edge selectable
- With noise elimination function
- Edge detection vectored interrupt
input pin (detection edge selectable)
- Event pulse input port for timer event
counter
INPUT
P01
P02
P03
INT1
INT2
INT3
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
BPS
BPS
BP
P10
P11
P12
P13
P20
P21
P22
P23
P30
P31
P32
P33
P40
P41
P42
P43
P50
P51
P52
P53
P60
P61
P62
P63
P80
P81
P82
P83
SCK
SI
- Serial clock I/O pin
- Serial data input pin
SO
- Serial data output pin
BUZ
- Buzzer output pin
- 4Bit I/O Port
- 4Bit I/O Port
BP
KS0
KS1
KS2
KS3
KS4
KS5
KS6
KS7
- Falling edge detection keyscan
input pin
BD
- Falling edge detection keyscan
input pin
BD
- 4Bit I/O Pin
- 4Bit I/O Pin
BP-PDND
BP
KSI-W029-000
7
SD42C/P1008
Pin Description
PIN
SHARED
I/O
FUNCTION
RESET
PORT
TYPE
SYMBOL
SEG0 ~
PIN
O
- Segment signal output pin
OP-SEGB
SEG19
SEG20 ~
SEG31
COM0
COM1
COM2
COM3
VLC0
VLC1
VLC2
BIAS
BP0 ~ 11
O
O
- 1 Bit output port (Bit Port) shared with
a segment signal output pin
OP-SEGA
OP-COMA
- Common signal output
- LCD drive power pin split register network
(Mask Option)
VLC
- LCD power supply bias control
- Main system clock input
- Main system clock output
- Sub system clock input
- Sub system clock output
- System reset input pin
VLC
XI
I
O
I
OSC1
XO
XTI
OSC2
XTO
O
I
RESETB
IP1
IP2
MASK ROM
Version
TEST
I
- Chip function
test input pin
BP
OTP ROM
Version
KSI-W029-000
8
SD42C/P1008
I/O Circuits
BP
BPS
VDD VDD
VDD VDD
OUTPUT
ENABLE
OUTPUT
PUR
PUR
(M.O)
ENABLE
(M.O)
PAD
PAD
DATA
DATA
VSS
VSS
INTERNAL
INTERNAL
BD
BP-PDND
VDD
VDD
Output TR
Disable
(P-CH)
PUR
PUR
OUTPUT
ENABLE
(M.O)
(M.O)
PAD
PAD
DATA
DATA
OUTPUT
ENABLE
Output TR
Disable
(N-CH)
VSS
VSS
INTERNAL
INTERNAL
OP-COMA
OP-SEGA
VLC0
VLC0
VLC1
VLC1
PAD
COM DATA
SEG DATA
PAD
VLC2
VLC2
NOTE) PUR : Pull-Up Resistor
M.O : Mask Option
KSI-W029-000
9
SD42C/P1008
OP-SEGB
IP1
VDD
VDD
VLC0
VLC1
SEG DATA
PBIT.X DATA
PAD
PAD
VLC2
VSS
IP2
VLC
VDD
PAD
BIAS
VLC0
2R
R
R=90K
VLC1
VLC2
R
R
VSS
VSS
OSC1
OSC2
XI
XO
XTI
XTO
VSS
KSI-W029-000
10
SD42C/P1008
Absolute Maximum Ratings
(TA = 0℃ to 70℃, VDD = 5V ±10%, fx = 4.19MHz)
PARAMETER
Supply Voltage
SYMBOL
VDD
CONDITION
RATING
UNIT
-
-0.3 to +7.0
-0.3 to VDD+0.3
-0.3 to VDD+0.3
-15
V
V
VI
Input Voltage
All I/O ports
VO
Output Voltage
Output Current High
-
V
OH
I
One I/O port active
All I/O ports active
One I/O port active
-
mA
-30
Output Current Low
Peak Value
+30
+15
RMS Value
Peak Value
RMS Value
Peak Value
RMS Value
Total value for ports
P1, P2, P3, P8
Total value for ports
P0, P4, P5, P6
-
+100
+60
mA
IOL
+100
+60
A
T
Operating Temperature
Storage Temperature
-40 to +85
-55 to +125
℃
℃
Tstg
-
* RMS values are calculated as peak value x Duty
* Exceeding beyond those listed values under "Absolute Maximum Ratings" may cause permanent
damage to the device.
KSI-W029-000
11
SD42C/P1008
DC Electrical Characteristics
(VSS = 0, VDD = 5V ±10%, TA = 25℃, fX = 4.19MHz)
PARAMETER
SYMBOL
TEST
CONDITION
LIMIT
UNIT
MIN.
TYP.
MAX.
DD
V
IH1
V
0.8 VDD
High Level
Port 0,1 (Schmitt Input)
XI, XTI
-
-
VDD
VDD
VIH2
IH3
VDD-0.5
Input Voltage
V
V
0.7 VDD
Port 2,3,4,5,6,8,
RESETB, TEST
-
VIL1
IL2
0.2 VDD
0.4
Low Level
Port 0,1 (Schmitt Input)
XI, XTI
0
0
-
-
Input Voltage
V
V
V
VIL3
Port 2,3,4,5,6,8,
RESETB, TEST
0
-
0.3 VDD
(IOH = - 5mA)
High Level
Port 0,1,2,3,6
Port 0,1,2,3,6
4.2
4.5
4.9
-
-
-
VOH
(IOH = - 100uA)
(IOL = 10mA)
(IOL = 10mA)
Output Voltage
Low Level
4.6
Port 4,5 (Open-Drain)
Port 0,1,2,3,6
-
-
-
-
2
Output Voltage
VOL
IIH
0.4
0.1
1.2
0.6
0.3
3
V
(IOL = 1mA)
Port 0,1,2,3,6
High Level
Input Leakage
Current
Port 0,1,2,3,4,5,6,8
VPPOEX, XTI, RESETB
uA
XI
-
-
5
15
-3
Low Level
Port 0,1,2,3,4,5,6,8
VPPOEX, XTI, TEST
XI
-1.2
Input Leakage
Current
IIL
uA
-
-
-5
-
-15
10
VDD = 5V ±10%
Supply Current
Dynamic
Mode
Idle
IDD1
(1)
Main Clock (XI)
= 4.19MHz
mA
-
-
5
Mode
KSI-W029-000
12
SD42C/P1008
DC Electrical Characteristic
(VSS = 0, VDD = 5V ±10%, TA = 25℃, fx = 4.19MHz)
SYMBOL
PARAMETER
TEST
LIMIT
UNIT
CONDITION
MIN.
TYP.
MAX.
Supply Current
Dynamic
-
-
2
IDD2
(1)
Main Clock (XI)
= 2MHz
VDD = 3V ±10%
Mode
Idle
-
-
-
-
-
-
-
-
-
-
1
1.5
15
5
mA
Mode
Dynamic
Mode
Idle
DD3
I
(2)
Sub Clock (XTI)
= 32.768KHz
VDD = 3V ±10%
VDD = 5V ±10%
IDD4
(2)
Mode
uA
IDD5
Main Clock (XI)
= 4.19MHz
Stop
Mode
3
Pull-up
RL1
RL2
VI = 0V, VDD = 5V ±10%
RESETB
20
10
-
-
60
30
Resistor
Kohm
Pull-down
Resistor
VI = 0V, VDD = 5V ±10%
TEST
NOTES ) :
(1) Data Include power consumption for subsystem clock oscillation.
(2) Main system clock oscillation stops and the subsystem clock is used.
KSI-W029-000
13
SD42C/P1008
AC Electrical Characteristics
(TA = -40 o +85℃, VDD = 2.7 to 6.0V)
PARAMETER
Cycle Time
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
0.95
-
64
uS
tCY
DD
V
=
4.5 to 6.0V
Main system
clock
3.8
-
64
uS
VDD =
2.7 to 3.3V
Sub system clock
114
122
-
125
uS
MHz
KHz
uS
uS
uS
uS
uS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
uS
VDD = 4.5 to 6.0V
VDD = 2.7 to 3.3V
VDD = 4.5 to 6.0V
TI0 Input Frequency
0
1
fTI
0
-
275
TI0 Input High, Low
Level Width
0.48
-
-
tTIH
tTIL
DD
V
= 2.7 to 3.3V
INT0
1.8
-
-
Interrupt Input High,
Low Level Width
(1)
-
-
INT1, 2, 3
10
-
-
tINTH
tINTL
tKCY
KS0 to KS7
10
-
-
SCK Cycle Time
Input
Output
Input
800
-
-
VDD = 4.5 to 6.0V
VDD = 2.7 to 3.3V
1600
-
-
3200
-
-
Output
Input
3800
-
-
SCK High, Low
Level Width
400
-
-
tKH
VDD = 4.5 to 6.0V
VDD = 2.7 to 3.3V
Output
Input
tKCY /2~50
-
-
1600
-
-
tKL
tKCY /2~150
Output
Input
-
-
SI Set up Time to
SCK High
100
150
400
400
-
-
-
tSIK
Output
Input
-
-
-
SI Hold Time to
SCK High
-
tKSI
Output
Input
-
-
SCK to S0 Output
Delay Time
VDD = 4.5 to 6.0V
VDD = 2.7 to 3.3V
-
300
250
1000
1000
-
tKSO
Output
Input
-
-
-
-
Output
-
-
RESETB Low Level
10
-
tRSL
(1) 2tcy or 128/fX, depending on the setting of the interrupt mode register.
KSI-W029-000
14
SD42C/P1008
AC Timing Measurement Points (Except XI and XTI)
0.8VDD
0.2VDD
Measurement
Points
0.8VDD
0.2VDD
Clock Timing
XI
1/XI
t
XH
t
XL
V -0.5V
DD
0.4V
1/XTI
t
t
XTH
t
XTL
XTI
V
0.4V
-0.5V
DD
Timer Event Counter Timing
TI0
1/f
TI
t
TIL
TIH
0.8V
0.2V
DD
DD
Serial Transfer Timing
SCK
t
KCY
t
t
KL
KH
0.8V
0.2V
DD
DD
t
SIK
t
KSI
0.8V
0.2V
DD
DD
SI
Input Data
t
KSO
SO
Output Data
Interrupt Input Timing
t
t
INTL
INTH
INT0~INT3
KS0~KS7
0.8V
0.2V
DD
DD
RESETB Input Timing
RESETB
t
RSL
0.2V
DD
KSI-W029-000
15
SD42C/P1008
RAM Data Retention Characteristics ( in STOP Mode )
(TA = -40 to +85℃)
PARAMETER
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
Data Retention
Supply Voltage
VDDDR
2.0
-
6.0
V
Data Retention
Supply Current
IDDDR
tSREL
tWAIT
VDDDR = 2.0V
-
0.1
-
10
-
uA
uS
Release Signal Set
Time
0
217/fx
When released by RESETB
-
-
-
-
mS
mS
Oscillation
Stabilization
Wait Time
When released by interrupt
Signal
NOTE 1)
NOTE 1) Depends on the setting of the basic interval timer mode register.
(refer to the table below)
( fx = 4.19MHz )
BMOD2
BMOD1 BMOD0
Oscillation Stabilization
220/f (Approximately 250ms)
0
0
1
1
0
1
0
0
0
1
0
1
X
217/f (Approximately 31.3ms)
X
215/f (Approximately 7.82ms)
X
213/f (Approximately 1.95ms)
X
KSI-W029-000
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SD42C/P1008
RAM Data Retention Timing
When STOP mode is released by RESETB input
Internal Reset Operation
Stabilization Wait Time
Operation
Mode
STOP Mode
RAM Data retention
V
DD
V
DDDR
STOP instruction execution
t
SREL
RESETB
t
WAIT
When STOP mode is released by interrupt signal
Stabilization Wait Time
Operation
Mode
STOP Mode
RAM Data retention
VDD
VDDDR
STOP instruction execution
tSREL
tWAIT
Interrupt Signal
(Rising Edge)
KSI-W029-000
17
SD42C/P1008
SD42P1008
Description
The SD42P1008 is a system evaluation LSI having a built in One-Time Programming
circuit. A programming and verification for the internal EPROM is achieved by using a
general EPROM programmer with an adapter socket.
The function of this device is exactly same as the SD42C1008 with programming of the
internal EPROM.
The SD42P1008 is the OTP version of the SD42C1008 with replacement of MASK ROM to
EPROM as an internal ROM.
Ordering Information
Type NO.
Marking
Package Code
SD42P1008
SD42P1008
QFP-80
Pin Configuration
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
64
P50/EPA4/kS4
SEG12
1
SEG13
SEG14
SEG15
63
62
P43/EPA3/kS3
P42/EPA2/kS2
2
3
61
P41/EPA1/kS1
4
5
6
SEG16
SEG17
60
59
P40/EPA0/kS0
XO
SEG18
7
58
XI
SEG19
SEG20
8
9
57
56
V P P /OEX
XTO
SEG21
55
XTI
10
SEG22
SEG23
SEG24
54
53
V D D
11
12
13
SD42P1008
P33/EPD3
P32/EPD2
52
SEG25
SEG26
SEG27
14
15
51
50
49
P31/EPD1
P30/EPD0
16
P13/EPA11/BUZ
SEG28
SEG29
17
18
48
47
P12/EPA10/SO
P11/EPA9/SI
SEG30
P10/EPA8/SCK
19
46
SEG31
COM0
P03/INT3
20
21
45
44
P02/CEX/INT2
COM1
P01/EPA13/INT1
22
43
COM2
COM3
23
24
42
41
P00/EPA12/INT0/T
P23
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
KSI-W029-000
18
SD42C/P1008
Device Operation
The operational modes of the SD42P1008 are listed in Table 1.
A single 5V power supply is required in the read mode.
All inputs are TTL levels except for VPP / OEX.
VPP = 12.5±0.5V
.
PINS
VDD
OUTPUT
CEX
VPP / OEX
MODE
READ
VIL
VIL
VIL
VIH
VIL
VPP
VIL
5.0V
6.0V
6.0V
6.0V
DOUT
DIN
PROGRAM
VERIFY
DOUT
High Z
PROGRAM INHIBIT
VPP
TABLE 1. Operating Modes
MODE
PIN NAME
EPROM MODE
VIL
USER MODE
TEST
VIH
VIH
RESETB
VIL
VIL
TABLE 2. The modes of SD42P1008
DC Programming Characteristics
LIMIT
UNIT
SYMBOL
PARAMETER
TEST CONDITION
MIN.
MAX.
0.8
Input Low Voltage
VIL
VIH
-0.1
2.0
-
V
V
V
V
V
V
Input High Voltage
VDD
0.45
-
Output Low Voltage during Verify
Output High Voltage during Verify
VOL
VOH
VPP
VDD
IOL = 2.1mA
IOH = -400uA
2.4
12.5
6.0
Quick-pulse Programming
Quick-pulse Programming
13.0
6.5
KSI-W029-000
19
SD42C/P1008
Package Dimension
[ UNIT : Millimeter ]
80 QFP
20.0±0.1
3.00MAX
14.0±0.1
17.9±0.25
0.15±0.05
0.80
0.35±0.05
23.9±0.25
1.8±0.2
0.8±0.15
KSI-W029-000
20
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