U5020M [ATMEL]
DIGITAL WINDOW WATCHDOG TIMER; 数字窗口看门狗定时器
| 型号： | U5020M |
| 厂家： | 
ATMEL |
| 描述： | DIGITAL WINDOW WATCHDOG TIMER |
| 文件： | 总10页 (文件大小：169K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• Low Current Consumption: IDD < 100 µA
• RC Oscillator
• Internal Reset During Power-up and Supply Voltage Drops (POR)
• “Short” Trigger Window for Active Mode
“Long” Trigger Window for Sleep Mode
• Cyclical Wake-up of the Microcontroller in Sleep Mode
• Trigger Input
• Six Wake-up Inputs
• Reset Output
Digital Window
Watchdog Timer
• Enable Output
Description
U5020M
The digital window watchdog timer, U5020M, is a CMOS integrated circuit. In applica-
tions where safety is critical, it is especially important to monitor the microcontroller.
Normal microcontroller operation is indicated by a cyclically transmitted trigger signal,
which is received by a window watchdog timer within a defined time window.
A missing or a wrong trigger signal causes the watchdog timer to reset the microcon-
troller. The IC is tailored for microcontrollers which can work in both full-power and
sleep mode. With an additional voltage monitoring (power-on reset and supply voltage
drop reset), the U5020M offers a complete monitoring solution for microsystems in
automotive and industrial applications.
Rev. 4755A–AUTO–11/03
Figure 1. Block Diagram with External Ciruit
C
10 nF
VDD
R1
13
VDD
15
OSC
RC
Oscillator
C1
OSC
Reset
10
16
Input ts
Micro-
controller
State machine
External
switching
circuitry
OSC
9
Trigger 11
Input signal
conditioning
Enable
Power-on
reset
POR
POR
Test logic
Mode
12
14
3-8
2
1
Wake up
GND
Test
Test
Pin Configuration
Figure 2. Pinning SO16
1
16 TS
TM
TM
15 OSC
2
3
4
5
GND
14
WAKE-UP
WAKE-UP
WAKE-UP
13 VDD
MODE
12
11 TRIG
WAKE-UP
WAKE-UP
6
7
8
RESET
10
9
ENA
WAKE-UP
2
U5020M
4755A–AUTO–11/03
U5020M
Pin Description
Pin
Symbol
Function
1
TM
Test must not be connected
Test must be connected to GND
Wake-up inputs (pull-down resistor)
2
TM
3 to 8
9
WAKE-UP
ENA
There are six digitally debounced wake-up inputs. During the long trigger mode each signal slope at the
inputs initiates a reset pulse at pin 10.
Enable output (push-pull)
It is used for the control of peripheral components. It is activated after the processor triggers three times
correctly.
Reset output (open drain)
10
RESET
Resets the processor in the case of a trigger error or if a wake-up pulse occurs during the long watchdog
period.
Trigger input (pull-up resistor)
It is connected to the microprocessor’s trigger signal.
11
12
TRIG
Mode input (pull-up resistor)
The processor’s mode signal initiates the switchover between the long and the short watchdog time.
MODE
13
14
15
VDD
GND
OSC
Supply voltage
Ground, reference voltage
RC oscillator
Time switch input
16
TS
Programming pin to select different time durations for the long watchdog time.
Functional
Description
Supply, Pin 13
The U5020M requires a stabilized supply voltage VDD = 5 V ±5% to comply with its elec-
trical characteristics.
An external buffer capacitor of C = 10 nF may be connected between pin 13 and GND.
RC Oscillator, Pin 15
The clock frequency, f, can be adjusted by the components R1 and C1 according to the
formula:
1
f = --
t
where t = 1.35 + 1.57 R1 (C1 + 0.01)
R1 in kꢀ, C1 in nF and t in µs
The clock frequency determines all time periods of the logic part as shown in the table
“Electrical Characteristics” under the subheading “Timing” on page 8. With an appropri-
ate component selection, the clock frequency, f, is nearly independent of the supply
voltage as shown in Figure 3 on page 4.
Frequency tolerance ꢁfmax = 10% with R1 ±1%, C1 = ±5%
3
4755A–AUTO–11/03
Figure 3. Period t versus R1, at C1 = 500 pF
1000.00
100.00
t (µs)
4.5 V
5.0 V
5.5 V
10.00
C1 = 500 pF
100
1.00
1
10
1000
R1 (kΩ)
Figure 4. Power-up Reset and Mode Switchover
Pin 13
VDD
t0
t6
Pin 10
Pin 12
Reset out
Mode
t1
Supply Voltage
Monitoring, Pin 10
The integrated power-on reset (POR) circuitry sets the internal logic to a defined basic
status and generates a reset pulse at the reset output, pin 10, during ramp-up of the
supply voltage and in the case of voltage drops of the supply. A hysteresis in the POR
threshold prevents the circuit from oscillating. During ramp-up of the supply voltage, the
reset output stays active for a specified period of time (t0) in order to bring the microcon-
troller in its defined reset status (see Figure 4). Pin 10 has an open-drain output.
Switch-over Mode Time, The switch-over mode time enables the synchronous operation of microcontroller and
watchdog. When the power-up reset time has elapsed, the watchdog has to be switched
Pin 12
to monitoring mode by the microcontroller by a “low” signal transmitted to the mode pin
(pin 12) within the time-out period, t1. If the low signal does not occur within t1, (see Fig-
ure 4) the watchdog generates a reset pulse, t6, and the time, t1, starts again.
Microcontroller and watchdog are synchronized with the switchover mode time, t1, each
time a reset pulse is generated.
4
U5020M
4755A–AUTO–11/03
U5020M
Microcontroller in Active Mode
Monitoring with the “Short”
Trigger Window
After the switch-over mode the watchdog operates in short watchdog mode and expects
a trigger pulse from the microcontroller within the defined time window, t3, (enable time).
The watchdog generates a reset pulse which resets the microcontroller if
•
•
•
the trigger pulse duration is too long
the trigger pulse is within the disable time, t2
there is no trigger pulse
Figure 5 shows the pulse diagram with a missing trigger pulse.
Figure 5. Pulse Diagram with no Trigger Pulse During the Short Watchdog Time
Pin 13
Pin 10
Pin 12
VDD
t0
t1
Reset out
Mode
t2
t3
Pin 11
Trigger
Figure 6 on page 6 shows a correct trigger sequence. The positive edge of the trigger
signal starts a new monitoring cycle with the disable time, t2. To ensure correct opera-
tion of the microcontroller, the watchdog needs to be triggered three times correctly
before it sets its enable output. This feature is used to activate or deactivate safety-criti-
cal components which have to be switched to a certain condition (emergency status) in
the case of a microcontroller malfunction. As soon as there is an incorrect trigger
sequence, the enable signal is reset and it takes a sequence of three correct triggers
before enable is reset.
Microcontroller in Sleep Mode
Monitoring with the “Long”
Trigger Window
The long watchdog mode allows cyclical wake-up of the microcontroller during sleep
mode. As in short watchdog mode, there is a disable time, t4, and an enable time, t5, in
which a trigger signal is accepted. The watchdog can be switched from the short trigger
window to the long trigger window with a “high” potential at the mode pin (pin 12). In
contrast to the short watchdog mode, the time periods are now much longer and the
enable output remains inactive so that other components can be switched off to effect a
further decrease in current consumption. As soon as a wake-up signal at one of the 6
wake up inputs (pins 3 to 8) is detected, the long watchdog mode ends, a reset pulse
wakes-up the sleeping microcontroller and the normal monitoring cycle starts with the
mode switch-over time.
By means of a low or high potential at pin 16 (time switch), two values for the long
watchdog time can be selected.
5
4755A–AUTO–11/03
Figure 6. Pulse Diagram of a Correct Trigger Sequence During the Short Watchdog Time
Pin 13
Pin 10
VDD
t1
t0
Reset out
Mode
t3
t2
t2
Pin 12
Pin 11
Trigger
ttrig
Pin 9
Enable
Figure 7 shows the switch-over from the short to the long watchdog mode. The wake-up
signal during the enable time, t5, activates a reset pulse, t6.
The watchdog can be switched back from the long to the short watchdog mode with a
low potential at the mode pin (pin 12).
Figure 7. Pulse Diagram of the Long Watchdog Time
t6
t1
Pin 10
Reset out
Wake-up
Pins 3 to 8
Pin 12
t4
t5
Mode
t2
Pin 11
Pin 9
Trigger
Enable
6
U5020M
4755A–AUTO–11/03
U5020M
Application Hint
In order to prevent the IC from an undesired reset output signal which may be caused by
transcients on the supply under certain conditions, a PC board connection from pin 2 to
GND is strongly recommended.
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Parameters
Symbol
VDD
Value
6.5
Unit
V
Supply voltage
Output current
IOUT
±2
mA
V
Input voltage
VIN
-0.5 V to VDD + 0.5 V
-40 to +85
-55 to +150
Ambient temperature range
Storage temperature range
Tamb
Tstg
LC
LC
Thermal Resistance
Parameters
Symbol
Value
Unit
Junction ambient SO16
RthJA
160
K/W
7
4755A–AUTO–11/03
Electrical Characteristics
VDD = 5 V; Tamb = -40°C to +85°C; reference point is ground (pin14); Figure 4 on page 4, unless otherwise specified
Parameters
Test Conditions
Pin
Symbol
VDD
Min.
Typ.
Max.
5.5
Unit
V
Supply voltage
Current consumption
Power-on reset
Power-on reset
Power-on reset
Inputs
13
4.5
R1 = 66 kꢀ
Logic functions
Threshold
13
IDD
100
µA
V
13
VDD
1
13
13
VPOR
Vhys
3.8
V
Hysteresis
100
mV
3 to 8, 11, 12, 16
Upper threshold (“1”)
Lower threshold (“0”)
VIH
VIL
4.0
V
V
1.0
VDD
0.2
+
Input voltage range
VIN
I IN
-0.4
-20
V
Input current
Depending on pin
20
µA
Output Pin 9
Maximum output current
Upper output voltage (“1”)
Lower output voltage (“0”)
Output Pin 10
IOUT
VOH
VOL
2
mA
V
I
OUT = 1 mA
OUT = -1 mA
4.5
I
0.5
0.5
V
Maximum output current
Lower output voltage (“0”)
Timing
IOUT
VOL
2
mA
V
IOUT = -1 mA
Debounce period
Debounce period
Maximum trigger pulse period
Power-up reset time
Time-out period
Trig, Mode
11, 12
3 to 8
3
4
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
cycle
Wake-up 1-6
96
128
45
201
to
t1
t2
t3
t4
t5
t4
t5
t6
1,112
130
Short disable time
Short enable time
Long disable time
Long enable time
Long disable time
Long enable time
Reset-out time
124
Input switch = low (0)
Input switch = low (0)
Input switch = high (1)
Input switch = high (1)
16
16
16
16
71,970
30,002
1,200
400
40
8
U5020M
4755A–AUTO–11/03
U5020M
Ordering Information
Extended Type Number
Package
Remarks
U5020M-FP
SO16
–
Package Information
5.2
4.8
Package SO16
Dimensions in mm
10.0
9.85
3.7
1.4
0.2
0.25
0.10
0.4
3.8
1.27
6.15
5.85
8.89
16
9
technical drawings
according to DIN
specifications
1
8
9
4755A–AUTO–11/03
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Printed on recycled paper.
4755A–AUTO–11/03
相关型号：
U5020M-MFPG3Y
Power Supply Management Circuit, Fixed, 1 Channel, CMOS, PDSO16, LEAD FREE, SO-16
ATMEL
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