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U3770M-MFG [ATMEL]

Modulator, I/Q, SO-16, 16 PIN;
U3770M-MFG
型号： U3770M-MFG
厂家： ATMEL    ATMEL
描述：

Modulator, I/Q, SO-16, 16 PIN

射频 微波
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U3770M  
CT2 I/Q Modulator and Clock Circuitry  
Description  
The U3770M is a quadrature modulator realized using with TEMIC Semiconductors’ PLL IC U2783B and the  
TEMIC Semiconductors’ advanced 0.8 micron CMOS GaAs front end U7001BG, a complete CT2 chip set is  
process. The IC is especially designed for CT2 applica- available.  
tions in conjunction with TEMIC Semiconductors’ RF/IF  
Electrostatic sensitive device.  
signal processor U2760B and a CT2 baseband controller  
Observe precautions for handling.  
TM  
(i.e., AMD PhoX controller Am79C4xx). Together  
Features  
Programmable 0.8/1.6-MHz quadrature-modulated  
carrier generation  
Supply-voltage range 2.7 V to 3.3 V  
Low power consumption, typically 12 mW  
SO16 package or die form  
More than 26 dB LO and sideband suppression  
18.432 MHz CMOS level clock generation  
Block Diagram  
R
Ref in  
12.8 MHz  
LF  
95 9881  
11  
2
14  
CLK out  
Phase  
comparator  
VCO  
DIV / 25  
512 kHz  
Amp.  
DIV / 36  
512 kHz  
18.432 MHz  
3
VDD  
DGND  
AGND  
PROG  
TST  
4
DIV / 2  
or  
DIV / 4  
6.4 MHz  
3.2 MHz  
13  
12  
10  
Dual DFF  
9
MOD out  
6
5
Q
in  
in  
in  
QB  
8
7
I
IB  
in  
1, 15, 16  
DNC  
Figure 1. Block diagram  
Ordering Information  
Extended Type Number  
U3770M-MFG  
Package  
SO16  
SO16  
Remarks  
Tube  
Taped and reeled  
U3770M-MFG3  
Rev. A2, 19-May-99  
1 (5)  
U3770M  
Functional Description  
The U3770M has been designed to reduce power con- reference oscillator. This way, only one crystal oscillator  
sumption and cost of CT2 devices. An innovative CMOS is needed in the complete CT2 device.  
I/Q modulator with extremely low current provides all the  
Internally, the 12.8-MHz reference signal is fed into a  
advantages of I/Q modulation:  
shaping amplifier and then into two logic dividers, to gen-  
erate a 512-kHz and a programmable 3.2-MHz or  
6.4-MHz clock. This clock is divided by 4 by two D flip-  
flops. The flip-flop outputs drive the four analog switches  
in quadrature. The local oscillator (LO) supression mixer  
consists of a pair of analog switches. make a local oscilla-  
tor (LO) suppression mixer. By summing the other pair  
outputs the suppression (both LO and side tone) is  
<–26 dBc.  
–
–
–
No requirement for FM deviation tuning  
Eliminates the Gaussian filter  
Simplifies the power ramping control  
The modulated output carrier can be programmed to be  
0.8 MHz or 1.6 MHz by the PROG control pin.  
The typical supply voltage is 3 V @ 4 mA.  
The 512-kHz clock drives a frequency synthesizer. The  
To reduce overall system cost, an internal PLL generates VCO runs at a fixed frequency of 18.432 MHz. The VCO  
an 18.432-MHz clock signal from the system’s 12.8-MHz control voltage (LF pin) controls the VCO frequency.  
Pin Description  
Pin  
2
Symbol  
Function  
External 12.8-MHz reference  
frequency input  
n.c.  
n.c.  
n.c.  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
F
Ref in  
3
4
5
6
7
8
9
10  
VDD  
Supply voltage  
F
Ref in  
DGND Digital ground  
QB  
Analog switch input  
Analog switch input  
Analog switch input  
Analog switch input  
Modulator output signal  
Test input, must be connected to  
GND (only factory use)  
PLL loop filter  
in  
VDD  
CLK  
out  
Q
in  
IB  
in  
DGND  
AGND  
I
in  
MOD  
out  
TST  
QB  
Q
PROG  
LF  
11  
12  
LF  
PROG  
PROG = 0, 1.6-MHz mode  
PROG = 1, 0.8-MHz mode  
IB  
I
TST  
13  
14  
AGND Analog ground  
CLK  
Digital CMOS clock output  
18.432 MHz  
out  
MOD  
out  
1, 15,  
16  
n.c.  
Not connected  
95 9930  
Figure 2. Pinning  
2 (5)  
Rev. A2, 19-May-99  
U3770M  
Absolute Maximum Ratings  
Stresses at or above those listed may cause permanent damage to the device. This is a stress rating only and functional  
operation of the device at these or any other conditions above those indicated in this data sheet is not implied. Exposure  
to absolute maximum rating conditions for extended periods may affect device reliability.  
Parameters  
Symbol  
V
DD  
Value  
6
Unit  
V
Supply voltage  
Modulator input voltages  
I
IB  
Q
QB  
–0.5 to V  
V
DD  
DD  
Reference frequency input  
Ambient temperature  
Storage temperature  
F
T
T
–0.5 to V  
V
Ref in  
–40 to +85  
–65 to +150  
°C  
°C  
°C  
amb  
stg  
Junction temperature  
T
T < T  
+10  
j
j
amb  
Operating Range  
Parameters  
Symbol  
Value  
10%  
–5 to +70  
T < T +5  
Unit  
V
°C  
°C  
°C  
Supply voltage  
V
DD  
3
Ambient temperature  
Junction temperature  
Storage temperature  
T
amb  
T
j
j
amb  
T
stg  
–40 to +125  
Electrical Characteristics  
Test conditions (unless otherwise specified) related to test circuit  
V = 3 V, V  
V
and V , V  
= 1 V single ended, oscillator frequency F  
= 12.8 MHz, T = –5 to +70°C  
amb  
S
BIi, BIi  
BQi BQi  
PP  
Ref in  
Parameters  
Test Conditions / Pins  
Symbol  
Min.  
2.7  
Typ.  
Max.  
3.3  
Unit  
V
mA  
Supply-voltage range  
Supply current  
Pin 3  
Pin 3  
Pin 2  
V
3
4
DD  
DD  
I
F
Ref in  
Input voltage  
Input impedance  
I, Q inputs  
V
150  
100  
mV  
k
F Ref in  
Z
F Ref in  
PP  
Pins 5, 6, 7 and 8  
Input voltage  
Single ended  
Single ended  
V
Z
F
1
V
k
kHz  
V
Iin, Qin  
Iin, Qin  
Iin, Qin  
PP  
Input impedance  
Input frequency  
External bias voltage  
20  
18  
1.5  
V
IB, QB  
MOD  
Output level  
Pin 9  
out  
1)  
Unloaded  
V
Mod out  
70  
mV  
RMS  
LO and sideband suppres-  
sion  
LO sub  
SB sub  
–26  
dBc  
Output impedance  
Z
5
k
Mod out  
CLK  
Pin 14  
out  
Output frequency  
Output-voltage swing  
F
V
18.432  
MHz  
V
CLK out  
@ load = 20 pF  
1.8  
CLK out  
1)  
Note  
The output signal contains some harmonics to be filtered by an external lowpass filter  
Rev. A2, 19-May-99  
3 (5)  
U3770M  
Test Circuit  
47 nF  
4.7 nF  
LF  
22  
11  
RRef in  
12.8 MHz  
2
95 9967  
14  
Phase  
comparator  
DIV / 25  
VCO  
512 kHz  
CLK out  
3
Amp  
DIV / 36  
512 kHz  
18.432 MHz  
VDD  
4
DGND  
13  
DIV / 2  
or  
DIV / 4  
6.4 MHz  
3.2 MHz  
AGND  
12  
Dual DFF  
PROG  
10  
TST  
9
MOD out  
6
5
8
7
IB in  
QB in  
1 k  
Q in  
I in  
1 nF  
1 nF  
1 nF  
1 nF  
1 k  
1 k  
1 k  
Figure 3. Test circuit  
4 (5)  
Rev. A2, 19-May-99  
U3770M  
Package Information  
Package: SO16  
We reserve the right to make changes to improve technical design and may do so without further notice.  
Parameters can vary in different applications. All operating parameters must be validated for each customer  
application by the customer. Should the buyer use TEMIC Semiconductors products for any unintended or  
unauthorized application, the buyer shall indemnify TEMIC Semiconductors against all claims, costs, damages,  
and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with  
such unintended or unauthorized use.  
TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany  
Telephone: 49 (0)7131 67 2594, Fax number: 49 (0)7131 67 2423  
Rev. A2, 19-May-99  
5 (5)  

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