T2801_技术文档

T2801

DECT Single-Chip Transceiver

Description

The T2801 is an RF IC for low-power DECT appli- modulation compensation circuit for advanced closed-

cations. The HP-VFQFP-N48-packaged IC is a complete loop modulation concept. No mechanical tuning is

transceiver including image rejection mixer, IF amplifier, necessary in production.

FM demodulator, baseband filter, RSSI, TX preamplifier,

power-ramping generator for power amplifiers, inte-

Observe precautions for handling.

grated synthesizer, fully integrated VCO, TX filter and

Electrostatic sensitive device.

F_De_Sa_ut_pu_pr_lye_-vs_{oltage range 3 V to 4.6 V (unregulated)}

D Auxiliary-voltage regulator on-chip

D Low current consumption

D Few low cost external components

D No mechanical tuning required

D Non-blindslot and blindslot operation

D Unlimited multislot operation with advanced closed-

loop modulation

D Supports multiple reference clocks (10.368 MHz/

13.824 MHz/ 20.736 MHz)

D TX preamplifier with 0 dBm output power at 1.9 GHz

and ramp-signal generator for SiGe power amplifier

Block Diagram

DEMOD

MIXER

OUT

IF_TANK

IF AMP 1

CF

IF_IN

TANK

IF AMP 2

IR MIXER

RF_IN

BB_OUT

DEMOD

BB FILTER

RAMP_OUT

RAMP

D/A

DEMOD DAC

GEN

RSSI

RAMP_SET

GF

VCO

TX / RX

TX_DATA

SWITCH

CLOCK

DATA

ENABLE

3-WIRE

BUS

PC

PD

CP

MCC

RC

f

TX_OUT

: n

TX DRIVER

RX_ON

TX_ON

PU_RX/TX

PU_PLL

CTRL

LOGIC

AUX

REG

VCO

REG

f

PU_VCO

: n

VREG_VCO

VS_VCO

VREG VS_REG VTUNE

CP

LD

REF_CLK

GND_VCO

PU_REG REG_CTRL

I_CPSW

Figure 1. Block diagram

Ordering Information

Extended Type Number

Package

Remarks

T2801-PLH

HP-VFQFP-N48

Taped and reeled

Rev. A9, 11-Dec-01

1 (27)

Preliminary Information

T2801

Functional Block Description

Name

AUX REG

BBF

Description

Auxiliary voltage regulator

Baseband filter

Name

Description

Programmable counter

Phase detector

PC

PD

CP

Charge pump

RAMP GEN Ramp-signal generator

DAC

D/A converter for demodulator tuning

Demodulator

RC

Reference counter

DEMOD

GF

RSSI

Received signal-strength indicator

Gaussian filter for transmit data

1st intermediate frequency amplifier

2nd intermediate frequency amplifier

Image rejection mixer

TX DRIVER Buffer amplifier for TX_OUT

IF AMP1

IF AMP2

IR MIXER

MCC

TX/RX

SWITCH

Switches VCO signal to IR MIXER

resp. TX DRIVER

VCO

Voltage-controlled oscillator

Voltage regulator for VCO

VCO REG

Modulation compensation circuit

Pinning

48 47 46 45 44 43 42 41 40 39 38 37

1

36

35

34

33

32

31

30

29

28

27

26

25

CLOCK

RAMP_OUT

2

DATA

ENABLE

REF_CLK

IF_IN2

IF_IN1

VS_IF

3

4

5

LD

PU_REG

VS_PLL

VREG

TX_OUT

GND3

6

T2801

7

RF_IN2

RF_IN1

8

9

REG_CTRL

VS_REG

GND2

10

11

12

IF_TANK2

GND_CP

VS_CP

IF_TANK1

RSSI

13 14 15 16 17 18 19 20 21 22 23 24

Figure 2. Pinning

2 (27)

Rev. A9, 11-Dec-01

Preliminary Information

T2801

Pin Description

Symbol

Function

Configuration

1

CLOCK

3-wire-bus: Clock input

VS_PLL

7

2

3

4

DATA

3-wire-bus: Data input

3-wire-bus: Enable input

Reference-frequency input

CLOCK

DATA

ENABLE

1,2,3

ENABLE

REF_CLK

5k

GND_PLL

43

VS_PLL

7

10k

REF_CLK

4

GND_PLL

43

5

LD

Lock-detect output

^L5^D

100

GND_PLL

43

6

PU_REG

Power-up input for aux. voltage

regulator

PU_REG

6

25k

GND_PLL

43

Rev. A9, 11-Dec-01

3 (27)

Preliminary Information

T2801

Pin Description (continued)

Symbol

Function

PLL supply voltage

Configuration

7

VS_PLL

7

GND1

18

VS_REG

10

VS_CP

12

GND2

28

VS_VCO

14

GND3

31

VS_IF

33

GND_VCO

16

GND_CP

11

GND_PLL

43

VS_MIXER

42

VS_REG

8

9

VREG

Aux. voltage-regulator output

10

REG_CTRL

9

REG_CTRL

Aux. voltage-regulator control

output

VREG

8

10

VS_REG

Aux. voltage-regulator supply

voltage

GND_PLL

43

11

12

13

GND_CP

VS_CP

CP

Charge-pump ground

VS_CP

12

Charge-pump supply voltage

Charge-pump output

CP

13

GND_CP

11

4 (27)

Rev. A9, 11-Dec-01

Preliminary Information

T2801

Pin Description (continued)

Symbol

Function

Configuration

14

VS_VCO

VCO voltage-regulator supply

voltage

VS_VCO

14

VREG_VCO

15

VREG_VCO

VCO voltage-regulator control

output

16

17

GND_VCO

VTUNE

VCO ground

GND_VCO

16

VREG_VCO

15

VCO tuning voltage input

VTUNE

17

GND_VCO

16

18

GND1

Ground

VS_PLL

7

GND1

18

VS_REG

10

VS_CP

12

GND2

28

VS_VCO

14

GND3

31

VS_IF

33

GND_VCO

16

GND_CP

11

GND_PLL

43

VS_MIXER

42

Rev. A9, 11-Dec-01

5 (27)

Preliminary Information

T2801

Pin Description (continued)

Symbol

Function

Configuration

19 DEMOD_TANK1 Demodulator tank circuit

VS_MIXER

42

10k

DEMOD_

TANK1

19

DEMOD_

TANK2

20

20 DEMOD_TANK2 Demodulator tank circuit

GND1

18

21

DAC_DEC

Decoupling PIN for VCO_DAC

VREG_VCO

15

10k

DAC_DEC

21

400

GND_VCO

16

VREG_VCO

15

22

REG_DEC

Decoupling PIN for VCO_REG

2k

REG_DEC

22

42k

GND_VCO

16

VS_IF

33

23

BB_CF

Baseband filter corner-frequency

control input

BB_CF

23

GND1

18

6 (27)

Rev. A9, 11-Dec-01

Preliminary Information

T2801

Pin Description (continued)

Symbol

Function

Configuration

VS_IF

33

24

BB_OUT

Baseband filter output

BB_OUT

24

GND1

18

VS_IF

33

25

RSSI

Received signal-strength indicator

output

RSSI

25

13k

GND2

28

26

27

28

IF_TANK1

IF_TANK2

GND2

IF tank circuit

Ground

VS_IF

33

IF_TANK2

27

IF_TANK1

26

GND2

28

VS_PLL

7

GND1

18

VS_REG

10

VS_CP

12

GND2

28

VS_VCO

14

GND3

31

VS_IF

33

GND_VCO

16

GND_CP

11

GND_PLL

43

VS_MIXER

42

Rev. A9, 11-Dec-01

7 (27)

Preliminary Information

T2801

Pin Description (continued)

Symbol

Function

Configuration

29

RF_IN1

RF input of image reject mixer

VS_MIXER

42

RF_IN1

29

RF_IN2

30

31

RF_IN2

GND3

RF input of image reject mixer

GND2

28

Ground

VS_PLL

7

GND1

18

VS_REG

10

VS_CP

12

GND2

28

VS_VCO

14

GND3

31

VS_IF

33

GND_VCO

16

GND_CP

11

GND_PLL

43

VS_MIXER

42

TX_OUT

32

TX_OUT

TX driver amplifier output for PA

GND3

31

8 (27)

Rev. A9, 11-Dec-01

Preliminary Information

T2801

Pin Description (continued)

Symbol

Function

Configuration

33

VS_IF

IF amplifier supply voltage

VS_PLL

7

GND1

18

VS_REG

10

VS_CP

12

GND2

28

VS_VCO

14

GND3

31

VS_IF

33

GND_VCO

16

GND_CP

11

GND_PLL

43

VS_MIXER

42

34

35

36

IF_IN1

IF_IN2

IF input of IF amplifier

VS_IF

33

IF_IN1

34

IF_IN2

35

4.3k

IF input of IF amplifier

GND2

28

RAMP_OUT

Ramp-generator output for PA

power ramping

VS_MIXER

42

RAMP_OUT

36

GND2

28

Rev. A9, 11-Dec-01

9 (27)

Preliminary Information

T2801

Pin Description (continued)

Symbol

Function

Configuration

37

RAMP_SET

Slew-rate setting of ramping signal

VS_MIXER

42

RAMP_SET

37

56

GND2

25

38

39

RX_ON

TX_ON

RX control input

TX control input

VS_IF

33

RX_ON

TX_ON

38, 39

5k

GND1

18

40

41

MIXER_OUT1

MIXER_OUT2

Mixer output to SAW filter

VS_MIXER

42

270

MIXER_

OUT1

40

MIXER_

OUT2

41

GND2

28

10 (27)

Rev. A9, 11-Dec-01

Preliminary Information

T2801

Pin Description (continued)

Symbol

Function

Configuration

42

VS_MIXER

Mixer supply voltage

VS_PLL

7

GND1

18

VS_REG

10

VS_CP

12

GND2

28

VS_VCO

14

GND3

31

43

GND_PLL

PLL ground

VS_IF

33

GND_VCO

16

GND_CP

11

GND_PLL

43

VS_MIXER

42

44

PU_VCO

VCO power-up input

VS_VCO

14

PU_VCO

44

5k

GND_VCO

16

45

PU_RX/TX

RX/TX power-up input

PU_RX/TX

45

25k

GND1

18

Rev. A9, 11-Dec-01

11 (27)

Preliminary Information

T2801

Pin Description (continued)

Symbol

Function

PLL power-up input

Configuration

20k

46

PU_PLL

10k

140k

10k

25k

10k

25k

PU_

PLL

46

GND_

PLL

43

47

TX_DATA

TX data input of Gaussian filter and

modulation-compensation circuit

VS_PLL

7

TX_DATA

47

5k

GND_PLL

43

VS_PLL

48

I_CPSW

Charge pump switch input controls

charge pump current

7

I_CPSW

48

5k

GND_PLL

43

12 (27)

Rev. A9, 11-Dec-01

Preliminary Information

T2801

Functional Description

Receiver

Synthesizer

The RF signal at RF_IN is fed to an image rejection mixer

IR_MIXER with its differential outputs MIXER_OUT1

and MIXER_OUT2 driving an IF-SAW filter at

110.592 MHz or 112.32 MHz. The IF amplifiers

IF_AMP1 and IF_AMP2 with an external IF_TANK and

an integrated RSSI function feed the signal to the

The IR_MIXER, the TX_DRIVER and the

programmable counter PC are driven by the fully

integrated VCO (including on-chip inductors and

varactors). An 3-bit digital-to-analog converter is used to

pretune the frequency. The output signal is frequency-

divided to supply the desired frequency to the

TX_DRIVER, 0/90 degree phase shifter for the

IR_MIXER and to be used by the PC for the phase detec-

demodulator DEMOD working at f = f /2 ([55 MHz)

IF

and finally to an integrated baseband filter BB. For

demodulator tuning in production an integrated 5-bit dig-

ital-to-analog (D/A) converter is provided to control the

on-chip varicap diode.

tor PD (f = 3.456 MHz). Unlimited multislot operation

PD

is possible by using the integrated advanced closed-loop

modulation concept based on the modulation

compensation circuit MCC.

Transmitter

The transmit data at TX_DATA is filtered by an integrated

Gaussian Filter GF and fed to the fully integrated VCO

operating at twice the output frequency. After modulation

the signal is frequency-divided by 2 and fed via a TX/RX

SWITCH to the TX_DRIVER. This bus-controlled driver

amplifier supplies typical +3 dBm output power at

TX_OUT. A ramp-signal generator RAMP_GEN, pro-

vides a ramp signal at RAMP_OUT for the external power

amplifier, is integrated. The slope of the ramp signal is

controlled by a capacitor at the RAMP_SET pin.

Power Supply

An integrated bandgap-stabilized voltage regulator for

use with an external low-cost PNP transistor is imple-

mented. Multiple power-down and current saving modes

are provided.

Rev. A9, 11-Dec-01

13 (27)

Preliminary Information

T2801

PLL Principle

RF_IN

Programable counter PC

”– Main counter MC

”– Swallow counter SC

f_VCO= f_PDx (S_MCx 32 + S_SC)

f_VCO

ext. loop filter

PA driver

Mixer

Phase frequency

detector PD

f_PD= 3.456 MHz

Charge

pump

Divider

by 2

VCO

DAC

GF_DATA

Modulation

compensation MCC

Gaussian

filter GF

Controlled phase shifting

Reference counter RC

6.912 MHz

S_RC

REF_CLK

10.368MHz

13.824MHz

20.736MHz

3

4

6

1.152 Mbit/s

TX_DATA

PLL reference

Frequency

REF_CLK

Baseband controller

Figure 3.

14 (27)

Rev. A9, 11-Dec-01

Preliminary Information

T2801

The following table shows the LO frequencies for RX and TX for the DECT band plus additional channels for the

extended DECT band. Intermediate frequencies of 110.592 MHz and 112.32 MHz are supported.

Table 1 LO frequencies

Mode

f_IF/MHz

Channel

C9

f_ANT/MHz

1881.792

1883.520

...

f_VCO/MHz

1881.792

1883.520

...

S_MC

34

...

S_SC

1

TX

C8

2

...

9

C1

1895.616

1897.344

1899.072

1900.800

...

1895.616

1897.344

1899.072

1900.800

...

34

...

C0

10

11

12

...

30

31

1

C10

C11

...

C29

C30

C9

1931.904

1933.632

1881.792

1883.520

...

1931.904

1933.632

1771.200

1772.928

...

34

32

...

RX

110.592

C8

2

...

9

C1

1895.616

1897.344

1899.072

1900.800

...

1785.024

1786.752

1788.480

1790.208

...

32

...

C0

10

11

12

...

30

31

0

C10

C11

...

C29

C30

C9

1931.904

1933.632

1881.792

1883.520

...

1821.312

1823.040

1769.472

1771.200

...

32

...

RX

112.320

C8

1

...

8

C1

1895.616

1897.344

1899.072

1900.800

...

1783.296

1785.024

1786.752

1788.480

...

32

...

C0

9

C10

C11

...

10

11

...

29

30

C29

C30

1931.904

1933.632

1819.584

1821.312

32

Formula

TX:

RX:

f

= f

= 1.728 MHz × (32 × S + S )

ANT

VCO MC SC

= 1.728 MHz × (32 × S + S ) + f

IF

MC

SC

Rev. A9, 11-Dec-01

15 (27)

Preliminary Information

T2801

Control Signals

Table 2

Signal

Function

I_CPSW

PU_REG

PU_VCO

PU_RX/TX

PU_PLL

RX_ON

Controls the charge pump current

Activates AUX voltage regulator supplying the complete transceiver.

Activates VCO voltage regulator which supplies only the VCO.

Activates RX/TX switch.

Activates PLL circuits: PC, PD, CP, RC

Activates RX circuits: BBF, DEMOD, IF AMP, IR MIXER

Activates TX circuits: TX-DRIVER, RAMP GEN. Starts RAMP SIGNAL at RAMP OUT.

Activates GF in TX mode.

TX_ON

Data Word 1

Bit D10

Data Word 1

Bit D9

Activates MCC in TX mode.

Table 3

Mode

TX Mode

1

RX Mode

1

RSSI Only

1

PU_REG

PU_VCO

PU_RX/TX

PU_PLL

1

RX_ON

0

1

TX_ON

1

0

1

BB filter

Demodulator

OFF

ON

54

ON

OFF

ON

OFF

ON

OFF

ON

85

OFF

ON

OFF

ON

OFF

ON

OFF

ON

80

IF amplifiers and RSSI

IR mixer

RX switch

TX switch

TX driver

Ramp generator

Programmable counter

Voltage-controlled oscillator

Gaussian filter

Phase detector / charge pump

Modulation compensation circuit

Reference counter

Typ. current consumption / mA @ V = 3.2 V

S

16 (27)

Rev. A9, 11-Dec-01

Preliminary Information

T2801

Serial Programming Bus

The transceiver is programmed by the 3-wire bus many pulses arrived during enable-low condition. During

(CLOCK, DATA and ENABLE).

enable low condition the bus current is increased to speed

up the bus logic.

After setting enable signal to low condition, on the rising

edge of the clock signal, the data is transferred bit by bit

into the shift register, starting with the MSB-bit. After The programming of the transceiver is separated into two

enable returning to high condition the programmed data words. Data word 1 controls mainly the channel in-

information is loaded into the addressed latches, formation together with settings, which are closely

according to the addressbit condition (last bit). Additional related with the channel. Dataword 2 holds setup informa-

leading bits are ignored and there is no check made how tion, which is adjusted during production.

Data Word 1

MSB

LSB

Data bits

Address

bit

D22 D21 D20 D19 D18 D17 D16 D15 D14

D13

D12 D11 D10

D9

D8 D7 D6 D5 D4 D3 D2 D1 D0

GFCS VCODAC CPCS

A0

1

RC

SC

MC

VCOS

1

GF MCC

Data Word 2

E10

E9

E8

E7

E6

E5 E4 E3 E2 E1 E0

A0

0

DEMODDAC

MCCS

TEST

Data Word 1 Programs

PLL Settings

SC (Swallow Counter)

With the Reference Counter bits D21 – D22

D20

D19

D18

D17

D16

S

SC

RC (Reference Counter)

0

1

0

1

0

1

D22

D21

S

RC

REF_CLK

10.368 MHz

13.824 MHz

20.736 MHz

0

1

0

1

0

3

0

2

4

6

...

1

...

29

30

31

1

0

1

0

1

With the Main Counter bits D14 – D15

1

MC (Main Counter)

1

D15

D14

S

MC

0

1

0

1

0

1

32

33

34

35

With the Swallow Counter bits D16 – D20

Rev. A9, 11-Dec-01

17 (27)

Preliminary Information

T2801

VCO Select (RX/TX VCO)

With bit D13

VCO_DAC Adjustment

With bit D3 – D5

Used to switch between RX/TX VCO

Used to pretune the VCO frequency in case of production

tolerances of the device. Tuning voltage in locked condi-

tion should be around 1.8 V at room temperature. This

gives margin for ambient temperature changes.

D13

0

VCOS (VCO Select)

RX-VCO

TX-VCO

1

Pretune DAC Voltage

D5

0

D4

0

D3

0

f

/%

VCO

–5

...

5

Gaussian Filter on/off

With bit D10

0

1

0

1

0

GF is used only in TX mode

0

1

D10

0

GF (Gaussian Filter)

1

0

OFF

ON

1

0

1

0

1

Modulation Compensation Circuit on/off

With bit D9

CPCS Adjustment

MCC is used only in TX mode

With bit D0 – D2

D9

0

MCC (Modulation Compensation Circuit)

Used to adjust the charge pump current. This can be used

to compensate the change of the tuning sensitivity over

frequency and device tolerances.

OFF

ON

1

CPCS (Charge-Pump Current Settings)

D2

0

D1

0

D0

0

CPCS

GFCS Adjustment

–4

–3

–2

–1

0

With bit D6 – D8

0

1

Only in TX mode effective for setting the frequency devi-

ation of the modulation

0

1

0

1

GFCS (Gaussian Filter Settings)

1

0

D8

0

D7

0

D6

0

GFCS

60%

1

0

1

0

2

0

1

70%

1

3

0

1

0

80%

0

1

90%

1

0

100%

110%

120%

130%

1

0

1

0

1

18 (27)

Rev. A9, 11-Dec-01

Preliminary Information

T2801

Data Word 2 Programs

DEMODDAC Adjustment

TEST Mode Settings

With bits E6 – E10

With bit E0 – E2 and D11

Only in RX mode effective. Used to tune the demodulator

center frequency and allows to compensate tolerances of

external components and the T2801.

In normal operation Lock detect output is used. All other

settings are for test only.

D11 E2 E1 E0 Signal at lock

detect output

CP mode

Demod DAC Voltage

E10

0

E9

0

E8

0

E7

0

E6

0

f

%

IFcenter

1

0

1

0

1

0

1

Lock detect

RC out

Active

–5

0

1

...

5

1

PC out

0

1

0

X

MCCTEST:

RC out divided by

2048

1

0

1

0

1

0

1

0

1

0

1

0

1

Lock detect

RC out

High imp.

1

PC out

MCCS Adjustment

With bits E3 – E5

X

GFTEST: RC out High imp.

divided by 2

Only in TX mode effective. Adjusts the modulation com-

pensation circuit for closed loop modulation. This

adjustment is done with a test sequence of a long stream

of ,1‘ – ,0‘. The correct setting is achieved, if the modula-

tion is not affected by the PLL.

MCCS (Modulation Compensation Settings)

E5

0

E4

0

E3

0

MCCS

60%

0

1

70%

0

1

0

80%

0

1

90%

1

0

100%

110%

120%

130%

1

0

1

0

1

Rev. A9, 11-Dec-01

19 (27)

Preliminary Information

T2801

3-Wire Bus Protocol Timing Diagram

DATA

CLOCK

ENABLE

TL

TC

TH

TPER

TT

TEC

TS

16525

Figure 4.

Description

Clock period

Symbol

TPER

TS

Min. Value

Unit

ns

125

60

Set time data to clock

Hold time data to clock

Clock pulse width

ns

TH

60

ns

TC

60

ns

Set time enable to clock

Hold time enable to data

Time between two protocols

TL

200

0

ns

TEC

TT

ns

250

ns

TX DATA Timing

RefCLK

TX_DATA

T

H

T

S

TS and TH must be considered for both (falling and

rising) edges of RefCLK when using REF_CLK =

10.368 MHz.

Set-up time TX DATA

Hold time TX DATA

TS

TH

10 ns

Figure 5. TX DATA timing

Absolute Maximum Ratings

All voltages refer to GND

Parameter

Symbol

Min.

3.2

Max.

4.7

Unit

V

Supply voltage regulator Pin 10

V

S_REG

Supply voltage

Pins 7, 12, 14, 33 and 42

V

S

3.0

4.7

V

Logic input voltage

Pins 1, 2, 3, 38, 39, 44,

45, 46, 47 and 48

V

IN

– 0.3

V

S

V

Junction temperature

Storage temperature

T

150

_C

jmax

T

–40

stg

Thermal Resistance

Parameter

Symbol

Value

Unit

Junction ambient

R

t.b.d.

K/W

thJA

20 (27)

Rev. A9, 11-Dec-01

Preliminary Information

T2801

Operating Range

Parameter

Symbol

Min.

3.2

Typ.

3.6

Max.

Unit

V

Supply voltage regulator Pins 10

V

S_REG

4.6

Supply voltage

Pins 7, 12, 14, 33 and 42

V

S

3.0

V

Ambient temperature

T

amb

–25

+85

_C

Electrical Characteristics

Test conditions (unless otherwise specified): V

= 3.2 V, T

= 25°C

S_REG

amb

Parameter

IR mixer

Test Conditions / Pins

Pins 29, 30, 40 and 41

Pins 29 and 30

Symbol

Min. Typ. Max.

Unit

Input impedance

Input matching

Z

50

<2:1

20

Ω

in

Pins 29 and 30

VSWR

IRR

in

Image rejection ratio

DSB noise figure

Pins 40 and 41

dB

Pins 40 and 41

NFDSB=

NFSSB

10

Conversion gain

R

= 200 Ω

G

conv

11

dB

load

Input interception point

IF amplifier

Pins 40 and 41

IIP3

–10

dBm

Pins 26, 27, 34 and 35

Input impedance

Pins 34 and 35

Z

200

400

Ω

in

Lower cut-off frequency

Upper cut-off frequency

Power gain

fl

90

130

85

MHz

dB

3dB

fu

3dB

Gp

Bandwidth of external tank

circuit

Pins 26 and 27

BW3dB

10

MHz

Noise figure

RSSI

NF

9

dB

Pins 25, 34 and 35

RSSI sensitivity

at IF_IN1, IF_IN2

Pins 34 and 35

at IF_IN1, IF_IN2

Pins 34 and 35

P

20

dBµV

min

RSSI compression

P

max

100

RSSI dynamic range

RSSI resolution

DR

80

dB

Slope of the RSSI has to be

steady

Acc

±2

RSSI rise time

P

in

P

in

= 30 to 100 dBµV, Pin 25

= 100 to 30 dBµV, Pin 25

t

1

µs

r

f

RSSI fall time

Quiescent output current

@ P < 20 dBµV at IF_IN1,

IF_IN2 Pin 25

I

30

µA

in

out

Maximum output current

@ P = 100 dBµV at

150

µA

in

out

IF_IN1, IF_IN2 Pin 25

Rev. A9, 11-Dec-01

21 (27)

Preliminary Information

T2801

Electrical Characteristics (continued)

Test conditions (unless otherwise specified): V

= 3.2 V, T

= 25°C

S_REG

amb

Parameter

Test Conditions / Pins

Pins 19, 20, 23 and 24

Symbol

Min. Typ. Max.

Unit

FM demodulator, BB-Filter

Co-channel rejection ratio

@ P = –75 dBm at

CCRR

S

10

dB

in

IR-mixer input

Sensitivity

Quality factor of external

tank circuit approx. 20,

0.5

V/MHz

f

= F /2,

Pin 24

res

IF

Amplitude of recovered

signal

Nominal deviation of signal

± 288 kHz, Pin 24

A

450

680

mVss

Corner frequency

Pin 23: C = 68 pF

Pin 24

f

kHz

V

c

Output voltage DC range

V

1

Vs–1

outDC

DAC for FM demodulator (internally connected)

DEMOD_DAC range

VCO

(see bus protocol E6 ... E10)

Df

± 5

%

IFcenter

RX–VCO frequency range

TX–VCO frequency range

Tuning gain

VCOS = ‘0’

VCOS = ‘1’

Bit D13

f

1750

1860

1840

1950

MHz

MHz/V

V

vco

G

40

tune

Frequency control voltage

range

Pin 17

V

0.4

2.8

VCO_DAC range

PLL

(see bus protocol D3 ... D5)

∆f

± 5

%

vco,DAC

Scaling factor prescaler

Scaling factor main counter

S

32 / 33

PSC

S

32 / 33 / 34 / 35

0 31

MC

Scaling factor swallow

counter

S

SC

External reference input

frequency

AC coupled sinewave

Pin 4

f

10.368

13.824

20.736

MHz

REF_CLK

External reference input

voltage

AC coupled sinewave

Pin 4

V

50

250

mV

REF_CLK

RMS

Scaling factor reference

counter

S

RC

3 / 4 / 6 / 8

Charge pump

Pin 13

Output current

V

= V

/ 2,

I

± 6.5

± 1.2

0.2

mA

CP

VS_CP

CP_nom

I_CPSW = ‘1’

Pin 48

Output current

Current scaling

V

CP

= V

/ 2,

I

VS_CP

I_CPSW = ‘0’

I

=

I

CP_step

CP

I

+ CPCS * I

CP_step

CP_nom

(see bus protocol D0 ... D2)

Leakage current

I

± 100

pA

L

22 (27)

Rev. A9, 11-Dec-01

Preliminary Information

T2801

Electrical Characteristics (continued)

Test conditions (unless otherwise specified): V

= 3.2 V, T

= 25°C

S_REG

amb

Parameter

Test Conditions / Pins

Symbol

Min. Typ. Max.

Unit

Gaussian transmit filter (Gaussian shape B T = 0.5)

Tx data filter clock

Frequency deviation

12 taps in filter

f

13.824

MHz

kHz

%

TXFCLK

GF

±350

FM_nom

Frequency deviation scaling GF = GF

* GFCS

GFCS

60

130

FM

FM_nom

(see bus protocol D6 ... D8)

Modulation compensation circuit

Oversampling

OVS

DSV

6

Digital sum variation

Current scaling factor

VCO switch and TX driver

Power gain

85

(see bus protocol E3 ... E5)

MCCS

60

0

130

%

Pin 32

@ P = –40 dBm

Gp

30

100

3

dB

Ω

in

Output impedance

Pin 32

Z

out

Maximum output power

Gain compression

Pin 32

@ TX_RF_OUT, Pin 32

Pin 32

P

max

P

1dB

dBm

1

Output interception point

Ramp generator

OIP3

10

Pins 36 and 37

Minimum output voltage

According to RAMP_SET

input

V

0.2

V

min

Maximum output voltage

According to RAMP_SET

input

V

max

1.95

Rise time

Fall time

C

= 270 pF at Pin 37

Pin 5

t

5

µs

ramp

r

f

Lock detect and test mode output

Lock detect output,

test mode output

locked = ‘1’, unlocked = ‘0’

test modes (see bus protocol

E0 ... E2)

LD

Leakage current

V

OH

= 4.6 V

I

5

µA

L

Saturation voltage

Auxiliary regulator

Output voltage

I

= 0.5 mA

V

0.4

V

OL

SL

Pins 8, 9 and 10

= 3 V Pin 8

= V + 0.1 V

V

f

V

REG

2.9

2.6

3.0

3.1

V

SREG

Supply voltage rejection

SVR

t.b.d.

dB

Pin10

DC

pp

= 0.1 to 10 kHz

= 100 nF

Pin10

C

Pin8

VCO regulator

Output voltage

3-wire bus

Clock

Pins 14, 15 and 12

= 3 V Pin 15

V

2.7

2.8

V

SVCO

REG_VCO

f

6.912

MHz

Clock

Rev. A9, 11-Dec-01

23 (27)

Preliminary Information

T2801

Electrical Characteristics (continued)

Test conditions (unless otherwise specified): V

= 3.2 V, T

= 25°C

S_REG

amb

Parameter

Test Conditions / Pins

Symbol

Min. Typ. Max.

Unit

Logic input levels (CLOCK, DATA, ENABLE, RX_ON, TX_ON, PU_VCO, TX_DATA, I_CPSW)

Pins 1, 2, 3, 38, 39, 44, 47 and 48

High input level

Low input level

High input current

Low input current

Standby control

= ‘1’

= ‘0’

= ‘1’

= ‘0’

V

1.5

V

iH

V

iL

0.5

5

I

–5

µA

iH

I

5

iL

Pins 6, 45 and 46

Power up

PU_REG = ‘1‘

PU_RX/TX = ‘1‘

PU_PLL = ‘1‘

High input level

Pin 6

Pin 45

Pin 46

V

PU_REG

V

2.0

V

PU_RX/TX

V

PU_PLL

Standby

PU_REG = ‘0‘

PU_RX/TX = ‘0‘

PU_PLL = ‘0‘

Low input level

Pin 6

Pin 45

Pin 46

V

PU_REG,OFF

0.7

V

PU_RX/TX,OFF

V

PU_PLL,OFF

Power up

PU_REG = ‘1‘

PU_RX/TX = ‘1‘

V

PU

V

PU

= 3 V

= 5.5 V

Pin 6

Pin 45

I

20

60

30

80

40

100

µA

PU_REG

I

PU_RX/TX

PU_PLL = ‘1‘

High input current

V

PU

V

PU

= 3 V

= 5.5 V

Pin 46

I

100

200

125

300

150

400

µA

PU_PLL

Standby

PU_xxxx = ‘0’

Low input current

V

PU

V

PU

= 0 V

= 0.5 V Pins 45, 46

Pin 6,

I

0.1

1

µA

PU,OFF

Settling time

V = 0 → active operation

S

Switched from

V = 0 to V = 3V

t

soa

< 10

< 2

µs

S

Settling time

Switched from

standby → active operation

PU = ‘0’ to PU = ‘1’

t

ssa

sas

Settling time

Switched from

active operation → standby

PU = ‘1’ to standby

Power supply

Pins 7, 10, 12, 14, 33 and 42

Total supply current

RX

I

85

82

54

58

1

mA

µA

S

RSSI only

TX

TX (MCC, GF active)

PU_RX/TX = GND

Standby current

10

Supply current CP

V

VS_CP

= 3 V, PLL in lock

I

1

µA

CP

condition

Pin 13

24 (27)

Rev. A9, 11-Dec-01

Preliminary Information

T2801

Application Circuit

RAMP_OUT TX_OUT RF_IN

33 pF

180 nH

100 nH

SAW

Filter

TFS

33 pF

15 pF

18 pF

112B

RSSI

68 pF

270 nH

15 pF

560 pF

BB_OUT

BB_OUT 24

BB_CF 23

37 RAMP_SET

68 pF

2.2 nF

100 pF

RX_ON

TX_ON

38 RX_ON

39 TX_ON

REG_DEC 22

DAC_DEC 21

40 MIXER_OUT1

41 MIXER_OUT2

42 VS_MIXER

43 GND_PLL

44 PU_VCO

T2801

DEMOD_TANK2 20

DEMOD_TANK1 19

GND1 18

tbd

PU_VCO

VTUNE 17

PU_RX/TX

PU_PLL

22 nF

GND_VCO 16

VREG_VCO 15

VS_VCO 14

45 PU_RX/TX

46 PU_PLL

TX_DATA

I_CPSW

180 150 nF

Ω

47 TX_DATA

48 I_CPSW

CP 13

56 pF

470 nF

CLOCK

DATA

ENABLE

REF_CLK

LD

220 pF

4.7 nF

PU_REG

VCC

BC808

or similar

tantal

Figure 6. Application circuit

Rev. A9, 11-Dec-01

25 (27)

Preliminary Information

T2801

Package Information

26 (27)

Rev. A9, 11-Dec-01

Preliminary Information

T2801

Ozone Depleting Substances Policy Statement

It is the policy of Atmel Germany GmbH to

1. Meet all present and future national and international statutory requirements.

2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems

with respect to their impact on the health and safety of our employees and the public, as well as their impact on

the environment.

It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as

ozone depleting substances (ODSs).

The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid

their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these

substances.

Atmel Germany GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed

in the following documents.

1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively

2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental

Protection Agency (EPA) in the USA

3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.

Atmel Germany GmbH can certify that our semiconductors are not manufactured with ozone depleting substances

and do not contain such substances.

8.

We reserve the right to make changes to improve technical design and may do so without further notice.

Parameters can vary in different applications. All operating parameters must be validated for each customer

application by the customer. Should the buyer use Atmel products for any unintended or unauthorized application,

the buyer shall indemnify Atmel against all claims, costs, damages, and expenses, arising out of, directly or

indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use.

Data sheets can also be retrieved from the Internet:

http://www.atmel–wm.com

Atmel Germany GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany

Telephone: 49 (0)7131 67 2594, Fax number: 49 (0)7131 67 2423

Rev. A9, 11-Dec-01

27 (27)

Preliminary Information


型号：	T2801
厂家：	ATMEL
描述：	DECT Single-Chip Transceiver DECT单芯片收发器
文件：	总27页 (文件大小：243K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

T2801 [ATMEL]

相关型号：

T2801-PLH

T2801-PLQ

T2801B

T2801B-A16A

T2801B-BC

T2801B-BD

T2801B-BL

T2801B-BR

T2801B-C

T2801B-DW

T2801B-L

T2801B-U2