DEMOBOARD-T7024-PGM [ATMEL]
Bluetooth/ISM 2.4-GHz Front-end IC; 蓝牙/ ISM 2.4 GHz的前端IC
| 型号： | DEMOBOARD-T7024-PGM |
| 厂家： | 
ATMEL |
| 描述： | Bluetooth/ISM 2.4-GHz Front-end IC |
| 文件： | 总15页 (文件大小：1148K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• Single 3-V Supply Voltage
• High Power-added Efficient Power Amplifier (Pout Typically 23 dBm)
• Ramp-controlled Output Power
• Low-noise Preamplifier (NF Typically 2.1 dB)
• Biasing for External PIN Diode T/R Switch
• Current-saving Standby Mode
• Few External Components
• QFN20 Package with Extended Performance
Bluetooth/ISM
2.4-GHz
Front-end IC
1. Description
The T7024 is a monolithic SiGe transmit/receive front-end IC with power amplifier,
low-noise amplifier and T/R switch driver. It is especially designed for operation in
TDMA systems like Bluetooth® and WDCT.
Due to the ramp-control feature and a very low quiescent current, an external switch
transistor for VS is not required.
T7024
Figure 1-1. Block Diagram
RX_ON PU
VS_LNA
TX
TX/RX/
Standby
Control
SWITCH_OUT
R_SWITCH
RX
LNA_OUT
LNA_IN
LNA
V1_PA
V2_PA
RAMP
PA_IN
V3_PA_OUT
PA
4533I–BLURF–01/09
2. Pin Configuration
Figure 2-1. Pinning QFN20
10
9
8
7
6
V3_PA_OUT 11
V3_PA_OUT 12
V3_PA_OUT 13
GND 14
5
4
3
2
1
SWITCH_OUT
R_SWITCH
PU
T7024
RX_ON
RAMP 15
LNA_OUT
16 17 18 19 20
Table 2-1.
Pin Description
Symbol
Pin
1
Function
LNA_OUT
RX_ON
PU
Low-noise amplifier output
RX active high
2
3
Power-up active high
4
R_SWITCH
SWITCH_OUT
GND
Resistor to GND sets the PIN diode current
5
Switched current output for PIN diode
6
Ground
7
LNA_IN
GND
Low-noise amplifier input
8
Ground
9
VS_LNA
GND
Supply voltage input for low-noise amplifier
10
11
12
13
14
15
16
17
18
19
20
Slug
Ground
V3_PA_OUT
V3_PA_OUT
V3_PA_OUT
GND
Inductor to power supply and matching network for power amplifier output
Inductor to power supply and matching network for power amplifier output
Inductor to power supply and matching network for power amplifier output
Ground
RAMP
Power ramping control input
Inductor to power supply for power amplifier
Inductor to power supply for power amplifier
Ground
V2_PA
V2_PA
GND
V1_PA
Supply voltage for power amplifier
Power amplifier input
PA_IN
GND
Ground
2
T7024
4533I–BLURF–01/09
T7024
3. Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Parameters
Symbol
Value
Unit
Supply voltage
Pins VS_LNA, V1_PA, V2_PA, V3_PA_OUT
VS
6
V
Junction temperature
Storage temperature
RF input power LNA
RF input power PA
Tj
150
°C
°C
Tstg
–40 to +125
PinLNA
PinPA
5
dBm
dBm
10
Electrostatic sensitive device.
Observe precautions for handling.
4. Thermal Resistance
Parameters
Symbol
Value
Unit
Junction ambient QFN20, slug soldered on PCB
RthJA
27
K/W
5. Handling
Do not operate this part near strong electrostatic fields. This IC meets class 1 ESD test require-
ment (HBM in accordance to EIA/JESD22-A114-A (October 97) and class A ESD test
requirement (MM) in accordance to EIA/JESD22-A115A.
6. Operating Range
All voltages are referred to ground (pins GND and slug). Power supply points are VS_LNA, V1_PA, V2_PA, V3_PA_OUT.
The table represents the sum of all supply currents depending on the TX/RX mode.
Parameters
Symbol
Min.
Typ.
Max.
Unit
V
Supply voltage
Pins V1_PA, V2_PA and V3_PA_OUT
VS
2.7
3.0
4.6
Supply voltage, pin VS_LNA
VS
2.7
3.0
5.5
V
Supply current TX
Supply current RX
IS
IS
165
8
mA
mA
Standby current, PU = 0
Ambient temperature
IS_standby
Tamb
10
µA
°C
–25
+25
+85
3
4533I–BLURF–01/09
7. Electrical Characteristics
Test conditions (unless otherwise specified): VS = 3.0V, Tamb = 25°C
Parameters
Test Conditions
Symbol
Min.
Typ.
Max.
Unit
Power Amplifier(1)
Supply voltage
Pins V1_PA, V2_PA, V3_PA_OUT
VS
IS_TX
IS_RX
IS_standby
f
2.7
3.0
4.6
V
mA
µA
TX
165
Supply current
RX (PA off), VRAMP ≤ 0.1V
10
10
Standby current
Standby
µA
Frequency range
TX
2.4
60
2.5
GHz
dB
Gain-control range
Power gain maximum
Power gain minimum
TX
ΔGp
Gp
42
30
TX, pin PA_IN to V3_PA_OUT
TX, pin PA_IN to V3_PA_OUT
28
33
dB
Gp
–40
–17
dB
TX, power gain (maximum)
Pin RAMP
Ramping voltage maximum
Ramping voltage minimum
VRAMP max
VRAMP min
1.7
1.75
0.1
1.83
V
V
TX, power gain (minimum)
Pin RAMP
Ramping current maximum
Power-added efficiency
TX, VRAMP = 1.75V, pin RAMP
TX
IRAMP max
PAE
0.5
24
mA
%
35
22
40
23
TX, input power = 0 dBm referred to
pins V3_PA_OUT
Saturated output power
Input matching(2)
Psat
dBm
Load
VSWR
TX, pin PA_IN
< 1.5:1
< 1.5:1
Load
VSWR
Output matching(2)
TX, pins V3_PA_OUT
TX, pins V3_PA_OUT
TX, pins V3_PA_OUT
2 fo
3 fo
–30
–30
dBc
dBc
Harmonics at Psat = 23 dBm
T/R Switch Driver (Current Programming by External Resistor from R_SWITCH to GND)
Standby, pin SWITCH_OUT
RX
IS_O_standby
IS_O_RX
IS_O_100
IS_O_1k2
IS_O_33k
IS_O_R
1
1
µA
µA
TX at 100Ω
TX at 1.2 kΩ
TX at 33 kΩ
TX at ∞
1.7
7
mA
mA
mA
mA
Switch-out current output
17
19
Low-noise Amplifier(3)
Supply voltage
All, pin VS_LNA
RX
VS
IS
2.7
3.0
8
5.5
9
V
Supply current
mA
Supply current
(LNA and control logic)
TX (control logic active)
Pin VS_LNA
IS
0.5
mA
Notes: 1. Power amplifier shall be unconditionally stable, maximum duty cycle 100%, true CW operation, maximum load mismatch
and duration: load VSWR = 10:1 (all phases) 10s, ZG = 50Ω.
2. With external matching network, load impedance 50Ω.
3. Low-noise amplifier shall be unconditionally stable.
4. With external matching components.
5. LNA gain can be adjusted with RX_ON voltage according to Figure 9-10 on page 9. Please note, that for RX_ON below
1.4V the T/R switch driver switches to TX mode.
4
T7024
4533I–BLURF–01/09
T7024
7. Electrical Characteristics (Continued)
Test conditions (unless otherwise specified): VS = 3.0V, Tamb = 25°C
Parameters
Test Conditions
Standby, pin VS_LNA
RX
Symbol
IS_standby
f
Min.
Typ.
Max.
10
Unit
µA
Standby current
1
Frequency range
Power gain(5)
2.4
15
2.5
19
GHz
dB
RX, pin LNA_IN to LNA_OUT
RX
Gp
16
2.1
–7
Noise figure
NF
2.3
–6
dB
Gain compression
3rd-order input interception point
Input matching(4)
Output matching(4)
Logic Input Levels (RX_ON, PU)(5)
High input level
RX, referred to pin LNA_OUT
RX
O1dB
IIP3
–9
dBm
dBm
–16
–14
–13
2:1
2:1
RX, pin LNA_IN
RX, pin LNA_OUT
VSWRin
VSWRout
= ‘1’ pins RX_ON and PU
ViH
ViL
IiH
2.4
0
VS, LNA
0.5
V
V
Low input level
= ‘0’
High input current
Low input current
= ‘1’ ViH = 2.4V
= ‘0’
40
60
µA
µA
IiL
0.2
Notes: 1. Power amplifier shall be unconditionally stable, maximum duty cycle 100%, true CW operation, maximum load mismatch
and duration: load VSWR = 10:1 (all phases) 10s, ZG = 50Ω.
2. With external matching network, load impedance 50Ω.
3. Low-noise amplifier shall be unconditionally stable.
4. With external matching components.
5. LNA gain can be adjusted with RX_ON voltage according to Figure 9-10 on page 9. Please note, that for RX_ON below
1.4V the T/R switch driver switches to TX mode.
8. Control Logic PA and LNA/Antenna Switch Driver
PU
0
RX_ON
Ramp(1)
PA
off
on
off
on
off
on
off
on
LNA
off
off
on
on
off
off
on
on
Antenna Switch Driver
Operation Mode
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
off
off
off
off
on
on
off
off
standby
(2)
0
0
(3)
0
(4)
1
(4)
1
TX
1
RX
(5)
1
Notes: 1. “0” = VRAMP ≤0.1V, “1” = VRAMP typically 1.75V, 1.3V < VRAMP < 1.83V controls gain and output power, compare Figure 9-5 on
page 7
2. Only for special operation, e.g. only PA operation, no LNA/switch driver operation
3. Only for special operation, e.g. no switch driver operation
4. Only for special operation
5. Only for special operation, e.g. separate TX/RX antennas, TX and RX operation at the same time
5
4533I–BLURF–01/09
9. Typical Operating Characteristics
Figure 9-1. LNA: Gain and Noise Figure versus Frequency
25
20
15
5
4
3
Gain
NF
10
5
2
1
0
0
2000
2200
2400
2600
2800
3000
Frequency (MHz)
Figure 9-2. LNA: NF and Gain versus Temperature
2.5
2.0
NF
VS = 3V
1.5
1.0
0.5
0.0
-0.5
Gain
-1.0
-1.5
-2.0
-2.5
-40
-20
0
20
40
60
80
Temperature ( C)
°
Figure 9-3. LNA: Typical Switch-out Current versus Rswitch
2.0
16
12
8
4
0
1
10
100
1000
10000 100000 1000000
Rswitch (Ω)
6
T7024
4533I–BLURF–01/09
T7024
Figure 9-4. PA: Output Power and PAE versus Supply Voltage
50
250
220
190
40
PAE
I_S_TX
30
Pout
20
10
0
160
130
100
f = 2.4 GHz
Vramp = 1.8V
inPA = 0 dBm
P
2.7
3.1
3.5
3.9
4.3
4.7
Supply Voltage (V)
Figure 9-5. PA: Output Power and PAE versus Ramp Voltage
50
250
200
150
PAE
30
Pout
10
-10
100
50
0
f = 2.4 GHz
V
S = 3V
P
inPA = 0 dBm
I_S_TX
-30
-50
1.2
1.4
1.6
1.8
2.0
Vramp (V)
Figure 9-6. PA: Output Power and PAE versus Input Power
50
300
250
200
150
100
PAE
40
Gain
30
I_S_TX
20
10
VS = 3V
f = 2.4 GHz
V
ramp = 1.8V
PinPA = 0 dBm
0
50
0
Pout
-30
-10
-20
-10
0
-10
-40
Input Power (dBm)
7
4533I–BLURF–01/09
Figure 9-7. PA: Output Power and PAE versus Frequency
50
250
200
150
PAE
40
I_S_TX
30
Pout
20
100
50
0
V
S = 3V
ramp = 1.8V
inPA = 0 dBm
V
P
10
0
2400
2420
2440
2460
2480
2500
Frequency (MHz)
Figure 9-8. LNA: Supply Current versus Temperature
8.0
7.8
7.6
7.4
7.2
7.0
6.8
6.6
6.4
6.2
6.0
-40
-20
0
20
40
60
80
Temperature ( C)
°
Figure 9-9. PA: Pout versus VRAMP and Temperature
30
f = 2.4 GHz
VS = 3V
Pin = 0 dBm
20
10
5
25
0
-10
-20
80
-15
-40 C
°
1.0
1.2
1.4
1.6
1.8
Vramp (V)
8
T7024
4533I–BLURF–01/09
T7024
Figure 9-10. LNA Gain (dB) versus RX_ON (V)
20
15
10
5
VS = 3V
0
-5
-10
-15
-20
-25
1
1.5
2
2.5
3
RX_ON (V)
10. Input/Output Circuits
Figure 10-1. Input Circuit PA_IN/V1_PA
V1_PA
PA_IN
GND
Figure 10-2. Input Circuit RAMP/V1_PA
V1_PA
RAMP
9
4533I–BLURF–01/09
Figure 10-3. Input Circuit V2_PA
V2_PA
GND
Figure 10-4. Input/Output Circuit V3_PA_OUT
V3_PA_OUT
GND
Figure 10-5. Input Circuit SWITCH_OUT/R_SWITCH
V1_PA
SWITCH_OUT
R_SWITCH
GND
10
T7024
4533I–BLURF–01/09
T7024
Figure 10-6. Input Circuit LNA_IN/VS_LNA
VS_LNA
LNA_IN
GND
Figure 10-7. Input Circuit PU/RX_ON
VS_LNA
LNA_IN / PU
Figure 10-8. Output Circuit LNA_OUT
VS_LNA
LNA_OUT
GND
11
4533I–BLURF–01/09
Figure 10-9. Typical Application T7024
LNA_OUT
PA_IN
V1_PA
V2_PA
2.2 pF
1 pF
3.3 pF
20 19 18 17 16
1
2
3
4
5
15
14
13
12
11
PA_RAMP
PX_ON
PU
T7024
harm. termination
2.2 pF
R1 is selected
with DIL-switch
R1
Var
6
7
8
9 10
0.8 pF
Pin diode replaced by
LED on application board
18 nH
1.8 pF
Switch_OUT LNA_IN VS_LNA
V3_PA
PA_OUT
blocking capacitors
depending on application
12
T7024
4533I–BLURF–01/09
T7024
11. Ordering Information
Extended Type Number
Package
Remarks
MOQ
Taped and reeled
Pb free, halogen free
T7024-PGPM
QFN20
1500 pcs.
Taped and reeled
Pb free, halogen free
T7024-PGQM
QFN20
QFN20
6000 pcs.
1
Demoboard-T7024-PGM
Evaluation board QFN
12. Package Information
Package: QFN 20 - 5 x 5
Exposed pad 3.1 x 3.1
Dimensions in mm
Not indicated tolerances ± 0.05
0.9±0.1
5
+0
3.1
0.05-0.05
16
20
20
1
15
11
1
5
technical drawings
according to DIN
specifications
5
10
6
0.65 nom.
2.6
Drawing-No.: 6.543-5094.01-4
Issue: 1; 19.12.02
13
4533I–BLURF–01/09
13. Recommended PCB Land Pattern
Figure 13-1. Recommended PCB Land Pattern
B
A
E
F
D
C
Table 13-1. Recommended PCB Land Pattern Signs
Sign
A
Description
Size
Distance of vias
1.6 mm
3.1 mm
0.33 mm
1 mm
B
Size of slug pattern
Distance slug to pins
Diameter of vias
C
D
E
Width of pin pattern
Distance of pin pattern
0.3 mm
0.33 mm
F
14. Revision History
Please note that the following page numbers referred to in this section refer to the specific revision
mentioned, not to this document.
Revision No.
History
4533I-BLURF-01/09
• PSSO20 package variant deleted
• Put datasheet in a new template
• Page 1: Block diagram changed
• Page 13: Figure 10-8 changed
4533H-BLURF-07/07
14
T7024
4533I–BLURF–01/09
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4533I–BLURF–01/09
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