AT93C46A-10PA-5.0C [ATMEL]
EEPROM, 64X16, Serial, CMOS, PDIP8, 0.300 INCH, PLASTIC, MS-001BA, DIP-8;![AT93C46A-10PA-5.0C](http://pdffile.icpdf.com/pdf2/p00251/img/icpdf/AT93C46A-10P_1522076_icpdf.jpg)
型号: | AT93C46A-10PA-5.0C |
厂家: | ![]() |
描述: | EEPROM, 64X16, Serial, CMOS, PDIP8, 0.300 INCH, PLASTIC, MS-001BA, DIP-8 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 时钟 光电二极管 内存集成电路 |
文件: | 总13页 (文件大小:111K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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Features
• Low-Voltage and Standard-Voltage Operation
– 5.0 (VCC = 4.5V to 5.5V)
– 2.7 (VCC = 2.7V to 5.5V)
• 3-Wire Serial Interface
• 2 MHz Clock Rate (5V) Compatibility
• Self-Timed Write Cycle (10 ms max)
• High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
• Lead-Free/Halogen-Free
Devices Available
• 8-lead PDIP and 8-lead JEDEC SOIC Packages
3-Wire
Automotive
Serial EEPROM
1K (64 x 16)
Description
The AT93C46A provides 1024 bits of serial electrically erasable programmable read
only memory (EEPROM) organized as 64 words of 16 bits each. The device is opti-
mized for use in many automotive applications where low power and low voltage
operation are essential. The AT93C46A is available in space saving 8-lead PDIP and
8-lead JEDEC SOIC packages.
AT93C46A
The AT93C46A is enabled through the Chip Select pin (CS), and accessed via a 3-
wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock
(SK). Upon receiving a READ instruction at DI, the address is decoded and the data is
clocked out serially on the data output pin DO. The WRITE cycle is completely self-
timed and no separate ERASE cycle is required before WRITE. The WRITE cycle is
only enabled when the part is in the ERASE/WRITE ENABLE state. When CS is
brought “high” following the initiation of a WRITE cycle, the DO pin outputs the
READY/BUSY status of the part.
Preliminary
The AT93C46A is available in 4.5V to 5.5V and 2.7V to 5.5V versions.
8-lead PDIP
Pin Configurations
Pin Name
Function
CS
SK
DI
1
2
3
4
8
7
6
5
VCC
DC
CS
Chip Select
NC
SK
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
DO
GND
DI
8-lead SOIC
DO
GND
VCC
NC
CS
1
2
3
4
8
7
6
5
VCC
Power Supply
No Connect
SK
DI
DC
NC
DO
GND
DC
Don’t Connect
Rev. 3450A–SEEPR–2/04
Absolute Maximum Ratings*
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
Operating Temperature................................. -55°C to +125°C
Storage Temperature.................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground.....................................-1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
Block Diagram
2
AT93C46A [Preliminary]
3450A–SEEPR–2/04
AT93C46A [Preliminary]
Pin Capacitance
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted).
Symbol
COUT
CIN
Test Conditions
Max
5
Units
pF
Conditions
VOUT = 0V
VIN = 0V
Output Capacitance (DO)
Input Capacitance (CS, SK, DI)
5
pF
Note:
This parameter is characterized and is not 100% tested.
DC Characteristics
Applicable over recommended operating range from: TA = -40° C to +125° C, VCC = +2.7V to +5.5V,
(unless otherwise noted).
Symbol
VCC1
Parameter
Test Condition
Min
2.7
4.5
Typ
Max
5.5
5.5
2.0
2.0
10.0
30
Unit
V
Supply Voltage
Supply Voltage
VCC2
V
READ at 1.0 MHz
WRITE at 1.0 MHz
CS = 0V
0.5
0.5
6.0
17
mA
mA
µA
µA
µA
µA
ICC
Supply Current
VCC = 5.0V
ISB1
ISB2
IIL
Standby Current
Standby Current
Input Leakage
VCC = 2.7V
VCC = 5.0V
CS = 0V
VIN = 0V to VCC
VIN = 0V to VCC
0.1
0.1
3.0
3.0
IOL
Output Leakage
(1)
VIL1
Input Low Voltage
Input High Voltage
-0.6
2.0
0.8
VCC + 1
2.7V ≤VCC ≤5.5V
4.5V ≤VCC ≤5.5V
V
(1)
VIH1
IOL = 2.1 mA
IOH = -0.4 mA
IOL = 0.15 mA
IOH = -100 µA
0.4
0.2
V
V
V
V
VOL1
VOH1
Output Low Voltage
Output High Voltage
2.4
VOL2
VOH2
Output Low Voltage
Output High Voltage
1.8V ≤VCC ≤2.7V
VCC - 0.2
Note:
1. VIL min and VIH max are reference only and are not tested.
3
3450A–SEEPR–2/04
AC Characteristics
Applicable over recommended operating range from TA = -40°C to + 125°C, VCC = As Specified, CL = 1 TTL Gate and
100 pF (unless otherwise noted).
Symbol
Parameter
Test Condition
Min
Typ
Max
Units
SK Clock
Frequency
4.5V ≤VCC ≤5.5V
2.7V ≤VCC ≤5.5V
0
0
2
1
fSK
MHz
4.5V ≤VCC ≤5.5V
2.7V ≤VCC ≤5.5V
250
250
tSKH
tSKL
tCS
SK High Time
SK Low Time
ns
ns
ns
ns
4.5V ≤VCC ≤5.5V
2.7V ≤VCC ≤5.5V
250
250
Minimum CS
Low Time
4.5V ≤VCC ≤5.5V
2.7V ≤VCC ≤5.5V
250
250
4.5V ≤VCC ≤5.5V
2.7V ≤VCC ≤5.5V
50
50
tCSS
CS Setup Time
Relative to SK
4.5V ≤VCC ≤5.5V
2.7V ≤VCC ≤5.5V
100
100
tDIS
tCSH
tDIH
DI Setup Time
CS Hold Time
DI Hold Time
Relative to SK
Relative to SK
Relative to SK
ns
ns
ns
0
4.5V ≤VCC ≤5.5V
2.7V ≤VCC ≤5.5V
100
100
4.5V ≤VCC ≤5.5V
2.7V ≤VCC ≤5.5V
250
500
tPD1
tPD0
tSV
Output Delay to ‘1’
Output Delay to ‘0’
CS to Status Valid
AC Test
AC Test
AC Test
ns
ns
ns
ns
4.5V ≤VCC ≤5.5V
2.7V ≤VCC ≤5.5V
250
500
4.5V ≤VCC ≤5.5V
2.7V ≤VCC ≤5.5V
250
250
CS to DO in High
Impedance
AC Test
CS = VIL
4.5V ≤VCC ≤5.5V
2.7V ≤VCC ≤5.5V
100
150
tDF
10
ms
ms
tWP
Write Cycle Time
2.7V ≤VCC ≤5.5V
3
Endurance(1)
5.0V, 25°C, Page Mode
1M
Write Cycles
Note:
1. This parameter is characterized and is not 100% tested.
4
AT93C46A [Preliminary]
3450A–SEEPR–2/04
AT93C46A [Preliminary]
Instruction Set for the AT93C46A
Address
Instruction
READ
SB
1
Op Code
x 16
Comments
10
00
11
01
00
00
00
A5 - A0
Reads data stored in memory, at specified address.
Write enable must precede all programming modes.
Erase memory location An - A0.
EWEN
ERASE
WRITE
ERAL
1
11XXXX
A5 - A0
1
1
A5 - A0
Writes memory location An - A0.
1
10XXXX
01XXXX
00XXXX
Erases all memory locations. Valid only at VCC = 4.5V to 5.5V.
Writes all memory locations. Valid only at VCC = 4.5V to 5.5V.
Disables all programming instructions.
WRAL
1
EWDS
1
Functional
Description
The AT93C46A is accessed via a simple and versatile three-wire serial communication
interface. Device operation is controlled by seven instructions issued by the host pro-
cessor. A valid instruction starts with a rising edge of CS and consists of a Start Bit
(logic “1”) followed by the appropriate Op Code and the desired memory Address
location.
READ (READ): The Read (READ) instruction contains the Address code for the mem-
ory location to be read. After the instruction and address are decoded, data from the
selected memory location is available at the serial output pin DO. Output data changes
are synchronized with the rising edges of serial clock SK. It should be noted that a
dummy bit (logic “0”) precedes the 16-bit data output string.
ERASE/WRITE (EWEN): To assure data integrity, the part automatically goes into the
Erase/Write Disable (EWDS) state when power is first applied. An Erase/Write Enable
(EWEN) instruction must be executed first before any programming instructions can be
carried out. Please note that once in the Erase/Write Enable state, programming
remains enabled until an Erase/Write Disable (EWDS) instruction is executed or VCC
power is removed from the part.
ERASE (ERASE): The Erase (ERASE) instruction programs all bits in the specified
memory location to the logical “1” state. The self-timed erase cycle starts once the
ERASE instruction and address are decoded. The DO pin outputs the READY/BUSY
status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS).
A logic “1” at pin DO indicates that the selected memory location has been erased, and
the part is ready for another instruction.
WRITE (WRITE): The Write (WRITE) instruction contains the 16 bits of data to be writ-
ten into the specified memory location. The self-timed programming cycle, tWP, starts
after the last bit of data is received at serial data input pin DI. The DO pin outputs the
READY/BUSY status of the part if CS is brought high after being kept low for a minimum
of 250 ns (tCS). A logic “0” at DO indicates that programming is still in progress. A logic
“1” indicates that the memory location at the specified address has been written with the
data pattern contained in the instruction and the part is ready for further instructions. A
READY/BUSY status cannot be obtained if the CS is brought high after the end of
the self-timed programming cycle, tWP
.
ERASE ALL (ERAL): The Erase All (ERAL) instruction programs every bit in the mem-
ory array to the logic “1” state and is primarily used for testing purposes. The DO pin
5
3450A–SEEPR–2/04
outputs the READY/BUSY status of the part if CS is brought high after being kept low for
a minimum of 250 ns (tCS). The ERAL instruction is valid only at VCC = 5.0V 10%.
WRITE ALL (WRAL): The Write All (WRAL) instruction programs all memory locations
with the data patterns specified in the instruction. The DO pin outputs the READY/BUSY
status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS).
The WRAL instruction is valid only at VCC = 5.0V 10%.
ERASE/WRITE DISABLE (EWDS): To protect against accidental data disturb, the
Erase/Write Disable (EWDS) instruction disables all programming modes and should be
executed after all programming operations. The operation of the READ instruction is
independent of both the EWEN and EWDS instructions and can be executed at any
time.
Timing Diagrams
Synchronous Data Timing
Note:
1. This is the minimum SK period.
Organization Key for Timing Diagrams
AT93C46A
x 16
I/O
AN
DN
A5
D15
6
AT93C46A [Preliminary]
3450A–SEEPR–2/04
AT93C46A [Preliminary]
READ Timing
tCS
High Impedance
EWEN Timing(1)
tCS
CS
SK
DI
...
1
0
0
1
1
Note:
1. Requires a minimum of nine clock cycles.
EWDS Timing(1)
tCS
CS
SK
DI
...
0
0
0
1
0
Note:
1. Requires a minimum of nine clock cycles.
7
3450A–SEEPR–2/04
WRITE Timing
tCS
CS
SK
DI
...
...
AN
DN
1
0
1
A0
D0
HIGH IMPEDANCE
BUSY
READY
DO
tWP
WRAL Timing(1)(2)
tCS
CS
SK
DI
1
0
0
0
1
...
DN ... D0
BUSY
HIGH IMPEDANCE
DO
READY
tWP
Notes: 1. Valid only at VCC = 4.5V to 5.5V.
2. Requires a minimum of nine clock cycles.
8
AT93C46A [Preliminary]
3450A–SEEPR–2/04
AT93C46A [Preliminary]
ERASE Timing
tCS
CS
SK
DI
STANDBY
CHECK
STATUS
A0
1
1
1
AN
...
AN-1 AN-2
tDF
tSV
HIGH IMPEDANCE
HIGH IMPEDANCE
BUSY
DO
READY
tWP
ERAL Timing(1)
tCS
CS
STANDBY
CHECK
STATUS
SK
DI
1
0
0
1
0
tDF
tSV
BUSY
HIGH IMPEDANCE
HIGH IMPEDANCE
DO
READY
tWP
Note:
1. Valid only at VCC = 4.5V to 5.5V.
9
3450A–SEEPR–2/04
Ordering Information
Ordering Code
Package
Operation Range
AT93C46A-10PA-5.0C
AT93C46A-10SA-5.0C
8P3
8S1
Automotive
(-40°C to 125°C)
AT93C46A-10PA-2.7C
AT93C46A-10SA-2.7C
8P3
8S1
Automotive
(-40°C to 125°C)
Lead-Free/Halogen-Free/
Automotive Temperature
AT93C46A-10SZ-2.7C
8S1
(-40°C to 125°C)
Note:
For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics table.
Package Type
8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
Options
8P3
8S1
-5.0
-2.7
Low Voltage (4.5V to 5.5V)
Low Voltage (2.7V to 5.5V)
10
AT93C46A [Preliminary]
3450A–SEEPR–2/04
AT93C46A [Preliminary]
Packaging Information
8P3 – PDIP
E
1
E1
N
Top View
c
eA
End View
COMMON DIMENSIONS
(Unit of Measure = inches)
D
e
MIN
MAX
NOM
NOTE
SYMBOL
D1
A2 A
A
0.210
0.195
0.022
0.070
0.045
0.014
0.400
2
A2
b
0.115
0.014
0.045
0.030
0.008
0.355
0.005
0.300
0.240
0.130
0.018
0.060
0.039
0.010
0.365
5
6
6
b2
b3
c
D
3
3
4
3
b2
L
D1
E
b3
4 PLCS
0.310
0.250
0.325
0.280
b
E1
e
0.100 BSC
0.300 BSC
0.130
Side View
eA
L
4
2
0.115
0.150
Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information.
2. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3.
3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch.
4. E and eA measured with the leads constrained to be perpendicular to datum.
5. Pointed or rounded lead tips are preferred to ease insertion.
6. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm).
01/09/02
TITLE
DRAWING NO.
REV.
2325 Orchard Parkway
San Jose, CA 95131
8P3, 8-lead, 0.300" Wide Body, Plastic Dual
In-line Package (PDIP)
8P3
B
R
11
3450A–SEEPR–2/04
8S1 – JEDEC SOIC
C
1
E
E1
L
N
∅
Top View
End View
e
B
COMMON DIMENSIONS
(Unit of Measure = mm)
A
MIN
1.35
0.10
MAX
1.75
0.25
NOM
NOTE
SYMBOL
A1
A
–
–
A1
b
0.31
0.17
4.80
3.81
5.79
–
0.51
0.25
5.00
3.99
6.20
C
D
E1
E
–
–
D
–
–
Side View
e
1.27 BSC
L
0.40
0˚
–
–
1.27
8˚
∅
Note:
These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc.
10/7/03
REV.
TITLE
DRAWING NO.
1150 E. Cheyenne Mtn. Blvd.
Colorado Springs, CO 80906
8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing
8S1
B
R
Small Outline (JEDEC SOIC)
12
AT93C46A [Preliminary]
3450A–SEEPR–2/04
Atmel Corporation
Atmel Operations
2325 Orchard Parkway
San Jose, CA 95131, USA
Tel: 1(408) 441-0311
Fax: 1(408) 487-2600
Memory
RF/Automotive
Theresienstrasse 2
Postfach 3535
74025 Heilbronn, Germany
Tel: (49) 71-31-67-0
Fax: (49) 71-31-67-2340
2325 Orchard Parkway
San Jose, CA 95131, USA
Tel: 1(408) 441-0311
Fax: 1(408) 436-4314
Regional Headquarters
Microcontrollers
2325 Orchard Parkway
San Jose, CA 95131, USA
Tel: 1(408) 441-0311
Fax: 1(408) 436-4314
1150 East Cheyenne Mtn. Blvd.
Colorado Springs, CO 80906, USA
Tel: 1(719) 576-3300
Europe
Atmel Sarl
Route des Arsenaux 41
Case Postale 80
CH-1705 Fribourg
Switzerland
Tel: (41) 26-426-5555
Fax: (41) 26-426-5500
Fax: 1(719) 540-1759
Biometrics/Imaging/Hi-Rel MPU/
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Avenue de Rochepleine
La Chantrerie
BP 70602
44306 Nantes Cedex 3, France
Tel: (33) 2-40-18-18-18
Fax: (33) 2-40-18-19-60
BP 123
38521 Saint-Egreve Cedex, France
Tel: (33) 4-76-58-30-00
Fax: (33) 4-76-58-34-80
Asia
Room 1219
Chinachem Golden Plaza
77 Mody Road Tsimshatsui
East Kowloon
Hong Kong
Tel: (852) 2721-9778
Fax: (852) 2722-1369
ASIC/ASSP/Smart Cards
Zone Industrielle
13106 Rousset Cedex, France
Tel: (33) 4-42-53-60-00
Fax: (33) 4-42-53-60-01
1150 East Cheyenne Mtn. Blvd.
Colorado Springs, CO 80906, USA
Tel: 1(719) 576-3300
Japan
9F, Tonetsu Shinkawa Bldg.
1-24-8 Shinkawa
Chuo-ku, Tokyo 104-0033
Japan
Tel: (81) 3-3523-3551
Fax: (81) 3-3523-7581
Fax: 1(719) 540-1759
Scottish Enterprise Technology Park
Maxwell Building
East Kilbride G75 0QR, Scotland
Tel: (44) 1355-803-000
Fax: (44) 1355-242-743
Literature Requests
www.atmel.com/literature
Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard
warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any
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3450A–SEEPR–2/04
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AT93C46A-10PI2.7
64X16 MICROWIRE BUS SERIAL EEPROM, PDIP8, 0.300 INCH, PLASTIC, MS-001BA, DIP-8
ATMEL
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