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AT78C1503 [ATMEL]

DVD/CD Read Channel; DVD / CD读取通道
AT78C1503
型号： AT78C1503
厂家： ATMEL    ATMEL
描述：

DVD/CD Read Channel
DVD / CD读取通道

CD DVD
文件： 总14页 (文件大小：108K)
中文：  中文翻译
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Features  
• Operating Supply Range 3.0V to 3.6V  
• Power Dissipation 1W Max  
• Low-power Sleep Mode (<0.5 mW)  
• RF Data Channel  
– Automatic Gain Control or Programmable Gain Mode  
– Wide Bandwidth VGA  
– VGA Accepts Inputs from 30–300 mV Peak-to-peak Differential (PPD),  
60–600 mVPPD or 110–1100 mVPPD  
– Programmable Equalization via 7th-order Equiripple Filter with Programmable  
Symmetric Zeros  
– Programmable 5-to-1 Filter Cutoff Range  
– Data Slicer with DC Restore Circuit  
– Wide Frequency Range Clock Extraction  
– Frequency Synthesizer with Independent 7-bit M and 6-bit N Dividers,  
Better than 1% Resolution  
DVD/CD Read  
Channel  
– Highly Programmable to Accommodate DVD (1–5X) and CD (6–30X)  
– Write Asymmetry Measurement for Adjusting Write-mode Power  
– Data Recovery Supports CLV, ZCLV, ZCAV Recording  
– Optional Internally-generated Timing for AGC and Timing Recovery  
• Synthesizer Functions  
AT78C1503  
AT78C1507  
– Supports Wobble Clock Synthesis, Using Low-jitter PLL  
• Servo Algebra and OPC Functions  
– 45 MHz Bandwidth for Differential Phase Tracking Detector  
– Land and Groove Detector for DVD RAM  
– Supports One Beam Push/Pull Tracking Output  
– Supports One Beam Differential Phase Tracking  
– Supports Three-beam Push/Pull Tracking Output, Using E, F, G, H  
– Focus Error Signal Output  
– Focus OK Signal  
– Track Crossing Detection  
– Mirror Signal Output  
– Wobble Detection for DVD RAM, DVD-RW, DVD-R  
– Detects Tracking Error OK  
– Provides Sample and Hold Functions for CD and DVD OPC  
– Formats Pre-pit Data, Using Raw Pre-pit Information from AT78C1503  
• Header Detection for DVD RAM  
Description  
The AT78C1503 is a programmable DVD/CD channel responsible for servo algebra, gain con-  
trol, equalization, bit detection and clock extraction for CD-ROM, DVD-ROM, DVD-R, DVD-RW  
and DVD-RAM formats. Programmable features allow data rates up to 5X DVD. Also, for DVD-  
RAM functionality, the channel serves the write path providing laser power control and pit asym-  
metry detection. Up to 2X DVD write speeds are supported for DVD-R, DVD-RW and DVD-  
RAM. The extracted wobble frequency is supplied to the AT78C1507 companion chip which in  
turn synthesizes the write clock.  
The AT78C1507 is the companion chip to the AT78C1503 – DVD/CD Read Channel – and the  
AT78C1504 – DVD/CD Automatic Laser Power Controller. Working in conjunction with the read  
channel, the AT78C1507 is responsible for wobble clock synthesis for DVD-R and DVD-RAM  
formats. In addition, the two parts working together also support pre-pit data and clock recovery  
for the DVD-R format. Four separate inputs are provided to enable the AT78C1507 to perform  
tracking servo algebra, using just the outrigger photo detector signals (E, F, G, H for example)  
coming from the OPU. This extends the range of supported tracking servo algebra functions for  
the 1503-1507 combination. Lastly, OPC capability is supported for efficient writing of DVD-R,  
DVD-RAM and CD-R disks.  
Based on CMOS technology, both the AT78C1503 and AT78C1507 operate from a single 3.3V  
supply and are fully programmable through serial interfaces for both CD and DVD modes.  
Rev. 2054A–DVD–07/02  
Figure 1. DVD System Block Diagram  
DRAM  
Flash  
AT78C1502  
Servo  
Power  
Drivers  
Sled  
Control  
System  
Spindle  
Focus  
Laser  
AT78C1501  
ATAPI I/F  
Controller  
DBM  
ECC  
SRAM  
AT78C1503  
Read  
Channel  
AT78C1504  
Laser Power  
Controller  
T08XX  
Laser Amp  
ARM7TDMI  
AT78C1507  
Read  
Channel Adj.  
AT78C1505  
Pre-amp  
2
DVD/CD Read Channel  
2054A–DVD–07/02  
DVD/CD Read Channel  
Figure 2. AT78C1503 Block Diagram  
CAGC  
100  
SERREG  
FREQUENCY  
58 FREF  
(RF Sequencer)  
Control  
SYNTHESIZER  
AGC  
CONTROL  
98  
94  
AGCLZ  
70 DATA7  
AGCHLD  
69 DATA6  
DATA  
FCDAC  
REG9 <4 0>  
BST1 / BST2  
REG 8  
PLL  
68 DATA5  
67 DATA4  
66 DATA3  
65 DATA2  
RFGEN  
MUX  
7th ORDER  
FILTER/  
EQUALIZER  
VGA  
VGA  
2/3  
RFP/N  
64 DATA1  
Sum of  
Selectable  
Buffer  
DC  
Sum of  
Difference  
63 DATA0  
RESTORE  
FO1P/N  
FO2P/N  
TR1P/N  
TR2P/N  
4/5  
6/7  
8/9  
VGA  
VGA  
VGA  
VGA  
62 RCLK  
01 IDFIELD  
DIFFERENTIAL  
TRACKING  
DETECTOR  
AGC  
09 RDSZ  
48 TOK  
47 TZC  
28 TE  
MUX  
Control  
Voltage  
TRACK OK  
10/  
11  
TRACK  
ZERO  
CROSS  
DTR2  
Sum of  
Selectable  
Buffer  
AUTO  
INV  
MUX  
D/SE  
D/SE  
D/SE  
D/SE  
44 WOBBLE  
45 ID12  
46 ID34  
27 FE  
Slow Arithmetic  
and Normalization  
Push/Pull  
Tracking  
Focus Error  
FO1-CD  
FO2-CD  
TR1-CD  
TR2-CD  
16  
17  
18  
19  
FOCUS OK  
49 FOK  
Mirror Detector  
Wobble Detector  
50 MIRROR  
29 SLOWSUM  
59 RFDROP  
Land-groove  
Detector  
REXT  
13  
VREF  
41 RG  
77 WG  
40 PD  
SERIAL  
REGISTER  
/
MODE  
CONTROL  
TEST  
127  
93  
P
92  
N
91  
P
90  
N
93 82  
85  
P
84  
N
51 53 52  
P
N
3
2054A–DVD–07/02  
Figure 3. AT78C1503 Pin-out  
75  
74  
73  
72  
71  
70  
69  
68  
67  
66  
65  
64  
63  
62  
61  
60  
59  
58  
57  
56  
55  
54  
53  
52  
51  
01  
IDFEILD  
RFP  
TRCST  
VDD3  
VSS3  
02  
03  
04  
05  
06  
07  
08  
09  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
RFN  
FO1P  
VDD11  
VSS11  
DATA7  
DATA6  
DATA5  
DATA4  
DATA3  
DATA2  
DATA1  
DATA0  
RCLK  
RFDROP  
VDD5  
VSS5  
FO1N  
FO2P  
FO2N  
TR1P  
TR1N  
TR2P  
TR2N  
FOHG  
REXT  
AT78C1503  
VDD1  
VSS1  
FO1_CD  
FO2_CD  
TR1_CD  
TR2_CD  
VDD6  
FREF  
VDD7  
VSS7  
SS_H  
VDD4  
VSS4  
VSS6  
REFFRONT  
REFBACK  
LENSPOS  
SCLK  
SDATA  
SENA  
Table 1. AT78C1503 Pin List  
Pin # Pin Name Type  
Description  
1
IDFIELD  
RFP  
Digital Output  
Analog Input  
Analog Input  
Diff Input  
Signal to Preamp to Drive ID Select  
High-speed Signal Input  
High-speed Signal Input  
Focus 1 Pos  
2
3
RFN  
4
FO1P  
FO1N  
FO2P  
FO2N  
TR1P  
TR1N  
TR2P  
TR2N  
5
Diff Input  
Focus 1 Neg  
6
Diff Input  
Focus 2 Pos  
7
Diff Input  
Focus 2 Neg  
8
Diff Input  
Track 1 Pos  
9
Diff Input  
Track 1 Neg  
10  
11  
Diff Input  
Track 2 Pos  
Diff Input  
Track 2 Neg  
4
DVD/CD Read Channel  
2054A–DVD–07/02  
DVD/CD Read Channel  
Table 1. AT78C1503 Pin List (Continued)  
Pin # Pin Name  
Type  
Description  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
FOHG  
REXT  
Digital Input  
Passive  
Focus High Gain  
Passive for 0 TC Current Reference (16.5 K_, 1%)  
DPD, IBIAS  
VDD1  
3.3V Supply  
0V Supply  
VSS1  
DPD, IBIAS  
FO1_CD  
FO2_CD  
TR1_CD  
TR2_CD  
VDD6  
Analog Input  
Analog Input  
Analog Input  
Analog Input  
3.3V Supply  
Digital Input  
0V Supply  
Focus 1, CD Input  
Focus 2, CD Input  
Track 1, CD Input  
Track 2, CD Input  
Slow Servo Analog  
SS_H  
Servo Sample and Hold  
Slow Servo Analog  
VSS6  
REFFRONT  
REFBACK  
LENSPOS  
ATP1  
Input/Output  
Input/Output  
Analog Input  
Analog Output  
Analog Output  
Analog Output  
Analog Output  
Digital Input  
0V Supply  
Servo Front-end Reference Level  
Servo back-end Reference Level  
Lens Position Error Input  
Servo Analog Test Point  
Focus Error Output  
FE  
TE  
Tracking Error Output  
Low-pass Filtered Sum of Photodetector Outputs  
Power-on Reset, Bar (active-low)  
Servo DACs  
SLOWSUM  
PORB  
VSS8  
VDD8  
3.3V Supply  
Digital Input  
Digital Input  
Digital Input  
Digital Input  
Digital Input  
Digital Input  
Digital Input  
Digital Input  
Digital Input  
0V Supply  
Servo DACs  
IDSEL  
LHIPWR  
SHLD  
ID Field Select  
Laser High Power  
Servo Hold  
ADCSTRT  
BWUP  
BWDN  
IDINT  
Start On-chip 6-bit ADC  
Bandwidth Up  
Bandwidth Down  
Mode Select of Sequencer  
Power-down  
PD  
RG  
User Data Read Gate  
Servo DAC Rings  
VSS9  
VDD9  
3.3V Supply  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
Servo DAC Rings  
WOBBLE  
ID12  
Wobble Detect Output  
ID Field 12 Detected  
ID Field 34 Detected  
Track Zero Crossing  
ID34  
TZC  
5
2054A–DVD–07/02  
Table 1. AT78C1503 Pin List (Continued)  
Pin # Pin Name  
Type  
Description  
48  
49  
50  
TOK  
Digital Output  
Digital Output  
Digital Output  
Track OK  
FOK  
Focus OK  
MIRROR  
Mirror Detect (ROM)/Mirror Field Detect (RAM)  
Serial Data Enable; Must Be High to Read or Write  
Serial Registers  
51  
SENA  
Digital Input  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
71  
72  
73  
74  
75  
76  
77  
78  
79  
80  
81  
82  
SDATA  
SCLK  
Input/Output  
Digital Input  
0V Supply  
Serial Data, Input (write data) or Output (read data)  
Serial Data Clock  
VSS4  
ESD Ring, Digital Ring  
VDD4  
3.3V Supply  
0V Supply  
ESD Ring, Digital Ring  
VSS7  
Slow Servo Digital, Synthesizer Dividers  
Slow Servo Digital, Synthesizer Dividers  
Reference Clock Input to Synthesizer  
Digital I/O Supply  
VDD7  
3.3V Supply  
Digital Input  
0V Supply  
FREF  
VSS5  
VDD5  
3.3V Supply  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
0V Supply  
Digital I/O Supply  
RFDROP  
RCLK  
RF Dropout Detected  
Recovered Clock Divided by 4 or 8  
Recovered Data Out, Bit 0 (last in time)  
Recovered Data Out, Bit 1  
DATA0  
DATA1  
DATA2  
DATA3  
DATA4  
DATA5  
DATA6  
DATA7  
VSS11  
VDD11  
VSS3  
Recovered Data Out, Bit 2  
Recovered Data Out, Bit 3  
Recovered Data Out, Bit 4  
Recovered Data Out, Bit 5  
Recovered Data Out, Bit 6  
Recovered Data Out, Bit 7 (first in time)  
Digital I/O Ring  
3.3V Supply  
0V Supply  
Digital I/O Ring  
TR CML, Synthesizer CML, DC Restore  
TR CML, Synthesizer CML, DC Restore  
Timing Recovery Coast  
VDD3  
3.3V Supply  
Digital Input  
Digital Output  
Digital Input  
Diff Input  
TRCST  
WCLK  
WG  
Write Clock  
Write Gate (enables write clock)  
Timing Recovery/Synthesizer Test Input  
Timing Recovery/Synthesizer Test Input  
Timing Recovery/Synthesizer Test Input  
Timing Recovery/Synthesizer Test Input  
TR/Detector/Phase Detector Test Input  
TRSIN2N  
TRSIN2P  
TRSIN1N  
TRSIN1P  
TSDDTP1N  
Diff Input  
Diff Input  
Diff Input  
Test Output  
6
DVD/CD Read Channel  
2054A–DVD–07/02  
DVD/CD Read Channel  
Table 1. AT78C1503 Pin List (Continued)  
Pin # Pin Name  
Type  
Description  
83  
84  
85  
86  
87  
88  
89  
90  
91  
92  
93  
94  
95  
96  
97  
98  
99  
100  
TSDDTP1P  
TSDDTP2N  
TSDDTP2P  
CDCRN  
CDCRP  
VDD2  
Test Output  
Test Output  
Test Output  
Diff Passive  
Diff Passive  
3.3V Supply  
0V Supply  
Diff Output  
Diff Output  
Diff Output  
Diff Output  
Digital Input  
Digital Input  
0V Supply  
3.3V Supply  
Digital Input  
Analog Output  
Passive  
TR/Detector/Phase Detector Test Point  
TR/Detector/Phase Detector Test Input  
TR/Detector/Phase Detector Test Input  
Detector Duty Cycle Feedback Cap  
Detector Duty Cycle Feedback Cap  
RF Front-end Ring  
VSS2  
RF Front-end Ring  
TP2N  
Test Point 2 Output  
TP2P  
Test Point 2 Output  
TP1N  
Test Point 1 Output  
TP1P  
Test Point 1 Output  
AGCHLD  
AGCFST  
VSS10  
AGC Hold Input  
AGC Fast Recovery Input  
AGC, LPF  
VDD10  
AGCLZ  
RDSZ  
AGC, LPF  
Low Z Control for AGC Input  
AGC Cap/Detector Cap Voltage Outputs  
External Capacitor for AGC Loop  
CAGC  
Table 2. Supply Pins  
Supply Pin  
VDD/SS1  
VDD/SS2  
VDD/SS3  
VDD/SS4  
VDD/SS5  
VDD/SS6  
Circuitry  
DPD, IBIAS, RTRIM  
RF Front-end Ring  
TR & Synth CML, DC Restore, RF Dropout Analog  
ESD & Digital Ring  
Digital I/O Supply  
Servo Analog  
Servo, Synth and RF Dropout Digital, CMOSTPMUX, Serial Registers 1  
and 3, Calibrator  
VDD/SS7  
VDD/SS8  
VDD/SS9  
VDD/SS10  
VDD/SS11  
Servo DACs  
Servo DAC Rings  
AGC, LPF  
Digital I/O Ring  
7
2054A–DVD–07/02  
Figure 4. AT78C1507 Block Diagram – Wobble PLL and OPC Sample and Hold  
87  
75  
SFLTP  
SFLTN  
WBLIN  
86  
Phase/Frequency  
Comparator  
VCO  
Q Pump  
1/(P+1)  
76  
WOBLE X 186  
WOB2X  
WOBBLE  
1/186  
WCLK  
Reg50  
<3:2>  
SELOPC  
CD/DVD  
PCLK  
61  
27  
SHCD  
S&H  
for  
37  
38  
OPCOUT  
MUX  
OPC  
SHDVD  
DVDOPC  
19  
18  
WOBBLE + 180 DEG  
CDOPC  
PTSEL  
RS  
98  
95  
94  
Q
PDATA  
62  
PTOP  
PBOT  
D
FF  
MUX  
8
DVD/CD Read Channel  
2054A–DVD–07/02  
DVD/CD Read Channel  
Figure 5. AT78C1507 – Tracking Error Path  
GSEL  
Reg 49<7:4>  
SHSB  
21  
BWSEL  
Reg 49<3:0>  
SE  
TP2  
29  
Reg. 51–58 <7:3>  
Gain &  
Offset  
Adj  
"E"  
P/N  
Sample  
& Hold  
4/5  
6/7  
D2SE  
D2SE  
D2SE  
D2SE  
BW/LPF  
BW/LPF  
BW/LPF  
BW/LPF  
V21  
V21  
V21  
V21  
Reg. 62–65  
SE  
TP2  
30  
(E+F) − (G+H)  
+
Gain &  
Offset  
Adj  
Normalization  
Sample  
& Hold  
"F"  
P/N  
SE  
TP2  
31  
(−)  
Outrigger  
Signals  
Gain &  
Offset  
Adj  
Sample  
& Hold  
"G"  
P/N  
8/9  
(+)  
SE  
TP2  
32  
Gain &  
Offset  
Adj  
"H"  
P/N  
Sample  
& Hold  
10/11  
SUMSB  
29  
Outrigger Tracking Error  
SE  
TP2  
28  
SE  
TP2  
25  
SELTE  
Reg 56 <0>  
IDINT  
Reg 32 <6>  
LPF  
24  
REFBACK  
VGA  
12V  
28  
TE  
100 kHz  
TRI2VHIG  
Reg 56<2>  
TEGOUT  
Reg 69 <3:0>  
TEOFF  
Reg 57 <2:0>  
+
SGNTEOFF  
Reg 56 <1>  
DC  
Offset  
TEG1\I2VLOG  
Reg 68 <3:0>  
TEG1\I2VHIG  
Reg 68 <7:4>  
ENMB  
Reg 66<1>  
POLMB  
Reg 66 <2>  
TEMB  
25  
Main Beam  
Pin 25  
From 1503  
Vref  
GSELMB  
Reg 68 <7:4>  
9
2054A–DVD–07/02  
Figure 6. AT78C1507 Pin-out  
75  
74  
73  
72  
71  
70  
69  
68  
67  
66  
65  
64  
63  
62  
61  
60  
59  
58  
57  
56  
55  
54  
53  
52  
51  
01 NC0  
WBLIN  
VDD3  
VSS3  
VDD11  
VSS11  
CTP7  
CTP6  
CTP5  
CTP4  
CTP3  
CTP2  
CTP1  
CTP0  
PDATA  
PCLK  
VDD5  
VSS6  
FREF  
VDD7  
VSS7  
VDD4  
VSS4  
SCLK  
SDATA  
SENA  
02  
03  
NC1  
NC2  
04 EP  
05  
06  
EN  
FP  
07 FN  
08  
09  
GP  
GN  
10 HP  
11  
12  
HN  
WBLCOAST  
13 REXT  
AT78C1507  
14  
15  
VDD1  
VSS1  
16 TLOW2  
17  
18  
TLOW3  
CDOPC  
19 DVDOPC  
20  
21  
VDD6  
SHSB  
22 VSS6  
23  
24  
REFFRONT  
REFBACK  
25 TEMB  
Table 3. AT78C1507 Pin List  
Pin #  
Pin Name  
NC0  
NC1  
NC2  
EP  
Type  
Description  
1
Digital Output  
Analog Input  
Analog Input  
Diff Input  
Diff Input  
Diff Input  
Diff Input  
Diff Input  
Diff Input  
Diff Input  
Diff Input  
Not Used  
2
Not Used  
3
Not Used  
4
“E” Input Pos  
“E” Input Neg  
“F” Input Pos  
“F” Input Neg  
“G” Input Pos  
“G” Input Neg  
“H” Input Pos  
“H” Input Neg  
5
EN  
6
FP  
7
FN  
8
GP  
9
GN  
10  
11  
HP  
HN  
10  
DVD/CD Read Channel  
2054A–DVD–07/02  
DVD/CD Read Channel  
Table 3. AT78C1507 Pin List (Continued)  
Pin #  
Pin Name  
Type  
Description  
12  
WBLCOAST  
Digital Input  
Coast Wobble Clock Synthesizer  
16 K_, 1% Resistor to 0V Supply  
(for on-chip biasing)  
13  
REXT  
Passive  
14  
15  
16  
17  
18  
19  
20  
VDD1  
3.3V Supply  
0V Supply  
0V  
Power Supply  
VSS1  
Power Supply  
TLOW2  
TLOW3  
CDOPC  
DVDOPC  
VDD6  
Tie-down to a 0V Supply  
Tie-down to a 0V Supply  
CD Monitor Diode  
DVD Monitor Diode  
Power Supply  
0V  
Analog Input  
Analog Input  
3.3V Supply  
Sample/Hold Control for E, F, G, H  
(1 = Sample, 0 = Hold)  
21  
SHSB  
Digital Input  
22  
23  
24  
VSS6  
0V Supply  
Power Supply  
REFFRONT  
REFBACK  
Input/Output  
Input/Output  
Front-end Reference Voltage  
Back-end Reference Voltage  
Tracking Error Main Beam from AT78C1503  
(generated using A, B, C, D)  
25  
TEMB  
Analog Input  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
ATP1  
Analog Output  
Analog Output  
Analog Output  
Analog Output  
Digital Input  
0V Supply  
3.3V Supply  
0V  
Analog Test Point (single-ended)  
Sampled Monitor Diode Output  
Tracking Error Output  
E + F + G + H  
OPCOUT  
TE  
SUMSB  
PORB  
VSS8  
Power-on Reset, Bar (active-low)  
Power Supply  
VDD8  
Power Supply  
TLOW4  
LHIPWR  
THI1  
Tie-down to a 0V Supply  
Laser High Power  
Digital Input  
3.3V  
Tie-up to a 3.3V Supply  
Start on-chip 6-bit ADC  
ADCSTRT  
Digital Input  
Sample/Hold Control for CD Monitor Diode  
(1 = Sample, 0 = Hold)  
37  
38  
SHCD  
Digital Input  
Digital Input  
Sample/Hold Control for DVD Monitor Diode  
(1 = Sample, 0 = Hold)  
SHDVD  
39  
40  
41  
42  
43  
TLOW7  
TLOW8  
THI2  
0V  
Tie-down to a 0V Supply  
Tie-down to a 0V Supply  
Tie-up to a 3.3V Supply  
Power Supply  
0V  
3.3V  
VSS9  
0V Supply  
3.3V Supply  
VDD9  
Power Supply  
11  
2054A–DVD–07/02  
Table 3. AT78C1507 Pin List (Continued)  
Pin #  
44  
Pin Name  
NC4  
Type  
Description  
Not Used  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
45  
NC9  
Not Used  
46  
NC10  
TZC  
Not Used  
47  
Track Zero Crossing  
Tracking Error OK  
Not Used  
48  
TOK  
49  
NC5  
50  
NC6  
Not Used  
Serial Data Enable  
51  
52  
SENA  
Digital Input  
Input/Output  
(must be high to read or write serial registers)  
Serial Data, Input (write data) or Output (read  
data)  
SDATA  
53  
54  
55  
56  
57  
SCLK  
VSS4  
VDD4  
VSS7  
VDD7  
Digital Input  
0V Supply  
Serial Data Clock  
Power Supply  
Power Supply  
Power Supply  
Power Supply  
3.3V Supply  
0V Supply  
3.3V Supply  
Frequency Reference for Wobble Clock  
Synthesizer  
58  
FREF  
Digital Input  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
71  
72  
73  
74  
75  
76  
77  
VSS5  
VDD5  
PCLK  
PDATA  
CTP0  
CTP1  
CTP2  
CTP3  
CTP4  
CTP5  
CTP6  
CTP7  
VSS11  
VDD11  
VSS3  
VDD3  
WBLIN  
WCLK  
WCLKEN  
0V Supply  
Power Supply  
3.3V Supply  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
Digital Output  
0V Supply  
Power Supply  
Pre-pit Clock  
Pre-pit Data  
Digital Test Point Out, Bit 0  
Digital Test Point Out, Bit 1  
Digital Test Point Out, Bit 2  
Digital Test Point Out, Bit 3  
Digital Test Point Out, Bit 4  
Digital Test Point Out, Bit 5  
Digital Test Point Out, Bit 6  
Digital Test Point Out, Bit 7  
Power Supply  
3.3V Supply  
0V Supply  
Power Supply  
Power Supply  
3.3V Supply  
Digital Input  
Digital Output  
Digital Input  
Power Supply  
Raw Digital Wobble from AT78C1503  
Write Clock (synthesized wobble clock)  
Write Clock Enable  
12  
DVD/CD Read Channel  
2054A–DVD–07/02  
DVD/CD Read Channel  
Table 3. AT78C1507 Pin List (Continued)  
Pin #  
78  
79  
80  
81  
82  
83  
84  
85  
86  
87  
88  
89  
90  
91  
92  
93  
94  
95  
96  
97  
Pin Name  
TLOW9  
TLOW10  
TLOW11  
TLOW12  
TSDDTP1N  
TSDDTP1P  
TSDDTP2N  
TSDDTP2P  
SFILTN  
SFILTP  
VDD2  
Type  
Description  
0V  
Tie-down to a 0V Supply  
Tie-down to a 0V Supply  
Tie-down to a 0V Supply  
Tie-down to a 0V Supply  
Differential Analog/CML Test Point1 Neg  
Differential Analog/CML Test Point1 Pos  
Differential Analog/CML Test Point2 Neg  
Differential Analog/CML Test Point2 Pos  
Wobble Synthesizer Filter Neg  
Wobble Synthesizer Filter Pos  
Power Supply  
0V  
0V  
0V  
Test Output  
Test Output  
Test Output  
Test Output  
Diff Passive  
Diff Passive  
3.3V Supply  
0V Supply  
Diff Output  
Diff Output  
Diff Output  
Diff Output  
Digital Input  
Digital Input  
0V Supply  
3.3V Supply  
VSS2  
Power Supply  
TP2N  
Not Used  
TP2P  
Not Used  
TP1N  
Not Used  
TP1P  
Not Used  
PBOT  
Bottom Pre-pit Detect from AT78C1503  
Top Pre-pit Detect from AT78C1503  
Power Supply  
PTOP  
VSS10  
VDD10  
Power Supply  
Pre-pit Top Select  
98  
PTSEL  
Digital Input  
(PTSEL = 1 selects input on pin PTOP;  
PTSEL = 0 selects input on PBOT)  
99  
NC7  
NC8  
Analog Output  
Passive  
Not Used  
Not Used  
100  
13  
2054A–DVD–07/02  
Atmel Headquarters  
Atmel Operations  
Corporate Headquarters  
2325 Orchard Parkway  
San Jose, CA 95131  
TEL 1(408) 441-0311  
FAX 1(408) 487-2600  
Memory  
RF/Automotive  
Theresienstrasse 2  
Postfach 3535  
74025 Heilbronn, Germany  
TEL (49) 71-31-67-0  
FAX (49) 71-31-67-2340  
2325 Orchard Parkway  
San Jose, CA 95131  
TEL 1(408) 441-0311  
FAX 1(408) 436-4314  
Europe  
Atmel Sarl  
Route des Arsenaux 41  
Case Postale 80  
CH-1705 Fribourg  
Switzerland  
Microcontrollers  
2325 Orchard Parkway  
San Jose, CA 95131  
TEL 1(408) 441-0311  
FAX 1(408) 436-4314  
1150 East Cheyenne Mtn. Blvd.  
Colorado Springs, CO 80906  
TEL 1(719) 576-3300  
FAX 1(719) 540-1759  
Biometrics/Imaging/Hi-Rel MPU/  
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TEL (41) 26-426-5555  
FAX (41) 26-426-5500  
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Asia  
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TEL (33) 4-76-58-30-00  
FAX (33) 4-76-58-34-80  
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Zone Industrielle  
Hong Kong  
TEL (852) 2721-9778  
FAX (852) 2722-1369  
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Japan  
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TEL 1(719) 576-3300  
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Chuo-ku, Tokyo 104-0033  
Japan  
FAX 1(719) 540-1759  
TEL (81) 3-3523-3551  
FAX (81) 3-3523-7581  
Scottish Enterprise Technology Park  
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TEL (44) 1355-803-000  
FAX (44) 1355-242-743  
e-mail  
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© Atmel Corporation 2002.  
Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty  
which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors  
which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does  
not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted  
by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical  
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ATMEL® is the registered trademark of Atmel.  
Printed on recycled paper.  
2054A–DVD–07/02  

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