AT59C11-10PC [ATMEL]
4-Wire Serial EEPROMs; 4线串行EEPROM
| 型号： | AT59C11-10PC |
| 厂家： | 
ATMEL |
| 描述： | 4-Wire Serial EEPROMs |
| 文件： | 总13页 (文件大小：134K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• Low Voltage and Standard Voltage Operation
– 5.0 (VCC = 4.5V to 5.5V)
– 2.7 (VCC = 2.7V to 5.5V)
– 2.5 (VCC = 2.5V to 5.5V)
• User Selectable Internal Organization
– 1K: 128 x 8 or 64 x 16
– 2K: 256 x 8 or 128 x 16
– 4K: 512 x 8 or 256 x 16
• 4-Wire Serial Interface
• Self-Timed Write Cycle (10 ms max)
• High Reliability
4-Wire Serial
EEPROMs
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
– ESD Protection: >4000V
1K (128 x 8 or 64 x 16)
2K (256 x 8 or 128 x 16)
4K (512 x 8 or 256 x 16)
• 8-Pin PDIP and 8-Pin EIAJ SOIC Packages
Description
The AT59C11/22/13 provides 1024/2048/4096 bits of serial EEPROM (Electrically
Erasable Programmable Read Only Memory) organized as 64/128/256 words of 16
bits each, when the ORG Pin is connected to VCC and 128/256/512 words of 8 bits
each when it is tied to ground. The device is optimized for use in many industrial and
commercial applications where low power and low voltage operation are essential.
The AT59C11/22/13 is available in space saving 8-pin PDIP and 8-pin EIAJ SOIC
packages.
AT59C11
AT59C22
AT59C13
The AT59C11/22/13 is enabled through the Chip Select pin (CS), and accessed via a
4-wire serial interface consisting of Data Input (DI), Data Output (DO), and Clock
(CLK). Upon receiving a READ instruction at DI, the address is decoded and the data
is clocked out serially on the data output pin DO, the WRITE cycle is completely self-
timed and no separate ERASE cycle is required before WRITE. The WRITE cycle is
only enabled when the part is in the ERASE/WRITE ENABLE state. Ready/Busy sta-
tus can be monitored upon completion of a programming operation by polling the
Ready/Busy pin.
The AT59C11/22/13 is available in 5.0V ± 10%, 2.7V to 5.5V and 2.5V to 5.5V ver-
sions.
4-Wire, 1K
Serial E2PROM
Pin Configurations
8-Pin PDIP
Pin Name
Function
CS
Chip Select
CLK
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
DI
DO
GND
VCC
8-Pin SOIC
Power Supply
Internal Organization
Status Output
ORG
RDY/BUSY
Rev. 0173K–07/98
Absolute Maximum Ratings*
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability
Operating Temperature.................................. -55°C to +125°C
Storage Temperature..................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground.....................................-1.0V to +7.0V
Maximum Operating Voltage........................................... 6.25V
DC Output Current........................................................ 5.0 mA
Block Diagram(1)
Note:
1. When the ORG pin is connected to VCC, the x 16 organization is selected. When it is connected to ground, the x 8 organiza-
tion is selected. If the ORG pin is left unconnected, then an internal pullup device will select the x 16 organization.
AT59C11/22/13
2
AT59C11/22/13
Pin Capacitance(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted).
Test Conditions
Max
5
Units
pF
Conditions
VOUT = 0V
VIN = 0V
COUT
Output Capacitance (DO)
CIN
Input Capacitance (CS, CLK, DI, RDY/BUSY)
5
pF
Note:
1. This parameter is characterized and is not 100% tested.
DC Characteristics
Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +2.5V to +5.5V,
TAC = 0°C to +70°C, VCC = +2.5V to +5.5V (unless otherwise noted).
Symbol
VCC1
VCC2
VCC3
VCC4
ICC
Parameter
Test Condition
Min
1.8
2.5
2.7
4.5
Typ
Max
5.5
Units
V
Supply Voltage
Supply Voltage
Supply Voltage
Supply Voltage
Supply Current
5.5
V
5.5
V
5.5
V
VCC = 5.0V
READ at 1.0 MHz
WRITE at 1.0 MHz
CS = 0V
0.5
0.5
6.0
6.0
21.0
0.1
0.1
2.0
mA
mA
µA
µA
µA
µA
µA
V
2.0
ISB1
ISB2
ISB3
IIL
Standby Current
Standby Current
Standby Current
Input Leakage
VCC = 2.5V
10.0
10.0
30.0
1.0
VCC = 2.7V
CS = 0V
VCC = 5.0V
CS = 0V
VIN = 0V to VCC
VIN = 0V to VCC
IOL
Output Leakage
1.0
(1)
VIL1
Input Low Voltage
Input High Voltage
-0.6
2.0
0.8
4.5V ≤ VCC ≤ 5.5V
2.5V ≤ VCC ≤ 2.7V
4.5V ≤ VCC ≤ 5.5V
2.5V ≤ VCC ≤ 2.7V
(1)
VIH1
VCC + 1
(1)
VIL2
Input Low Voltage
Input High Voltage
-0.6
VCC x 0.3
VCC + 1
V
V
V
(1)
VIH2
VCC x 0.7
VOL1
VOH1
Output Low Voltage
Output High Voltage
IOL = 2.1 mA
IOH = 0.4 mA
0.4
2.4
VOL2
VOH2
Output Low Voltage
Output High Voltage
IOL = 0.15 mA
IOH = -0.1 mA
0.2
VCC - 0.2
Note:
1. VIL min and VIH max are reference only and are not tested.
3
AC Characteristics
Applicable over recommended operating range from TA = -40°C to +85°C, VCC = +2.5V to +5.5V,
CL = 1 TTL Gate and 100 pF (unless otherwise noted).
Symbol
Parameter
Test Condition
Min
Typ
Max
Units
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
0
0
0
0
1
1
0.5
fCLK
CLK Clock Frequency
MHz
0.25
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
250
250
500
tCKH
tCKL
tCS
CLK High Time
ns
ns
ns
ns
1000
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
250
250
500
CLK Low Time
1000
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
250
250
500
Minimum CS Low Time
CS Setup Time
1000
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
50
50
100
200
tCSS
Relative to SK
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
100
100
200
400
tDIS
tCSH
tDIH
DI Setup Time
CS Hold Time
DI Hold Time
Relative to SK
Relative to SK
Relative to SK
ns
ns
ns
0
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
100
100
200
400
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
250
250
500
tPD1
tPD0
tRBD
tCZ
Output Delay to ‘1’
Output Delay to ‘0’
AC Test
AC Test
AC Test
ns
ns
ns
ns
1000
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
250
250
500
1000
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
250
250
500
RDY/BUSY Delay to
Status Valid
1000
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ VCC ≤ 5.5V
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC ≤ 5.5V
100
100
200
400
CS to DO in High
Impedance
AC Test
CS = VIL
tWC
Write Cycle Time
0.1
1M
10
ms
Endurance(1)
5.0V, 25°C, Page Mode
Write Cycles
Note:
1. This paramter is characterized and is not 100% tested.
AT59C11/22/13
4
AT59C11/22/13
Instruction Set for the AT59C11
Address
Data
Op
Instruction
SB
Code
x 8
x 16
x 8
x 16
Comments
READ
1
10XX
0011
A6 - A0
A5 - A0
Reads data stored in memory, at
specified address.
EWEN
1
XXXXXXX
XXXXXX
Write enable must precede all
programming modes.
WRITE
ERAL
1
1
X1XX
0010
A6 - A0
A5 - A0
D7 - D0
D7 - D0
D15 - D0 Writes memory location An - A0.
XXXXXXX
XXXXXX
Erases all memory locations. Valid only
at VCC = 4.5V to 5.5V.
WRAL
EWDS
1
1
0001
0000
XXXXXXX
XXXXXXX
XXXXXX
XXXXXX
D15 - D0 Writes all memory locations. Valid only
at VCC = 4.5V to 5.5V.
Disables all programming
instructions.
Instruction Set for the AT59C22
Address
Data
Op
Instruction
SB
Code
x 8
x 16
x 8
x 16
Comments
READ
1
10XX
A7 - A0
A6 - A0
Reads data stored in memory, at
specified address.
EWEN
1
0011
XXXXXXXX
XXXXXXX
Write enable must precede all
programming modes.
WRITE
ERAL
1
1
X1XX
0010
A7 - A0
A6 - A0
D7 - D0
D7 - D0
D15 - D0 Writes memory location An - A0.
XXXXXXXX
XXXXXXX
Erases all memory locations. Valid only
at VCC = 4.5V to 5.5V.
WRAL
EWDS
1
1
0001
0000
XXXXXXXX
XXXXXXXX
XXXXXXX
XXXXXXX
D15 - D0 Writes all memory locations. Valid when
VCC = 5.0V ± 10% and Disable Register
cleared.
Disables all programming instructions.
5
Instruction Set for the AT59C13
Address
Data
Op
Instruction
SB
Code
x 8
x 16
x 8
x 16
Comments
READ
1
10XX
0011
A8 - A0
A7 - A0
Reads data stored in memory, at
specified address.
EWEN
1
XXXXXXXXX
XXXXXXXX
Write enable must precede all
programming modes.
WRITE
ERAL
1
1
X1XX
0010
A8 - A0
A7 - A0
D7 - D0
D7 - D0
D15 - D0 Writes memory location An - A0.
XXXXXXXXX
XXXXXXXX
Erases all memory locations. Valid only
at VCC = 4.5V to 5.5V.
WRAL
EWDS
1
1
0001
0000
XXXXXXXXX
XXXXXXXXX
XXXXXXXX
XXXXXXXX
D15 - D0 Writes all memory locations. Valid when
VCC = 5.0V ± 10% and Disable Register
cleared.
Disables all programming instructions.
AT59C11/22/13
6
AT59C11/22/13
Functional Description
The AT59C11/22/13 are accessed via a simple and versa-
tile 4-wire serial communication interface. Device operation
is controlled by six instructions issued by the host proces-
sor. A valid instruction starts with a rising edge of CS
and consists of a Start Bit (logic ‘1’) followed by the appro-
priate Op Code and the desired memory Address location.
after the last bit of data is received at serial data input pin
DI. The Ready/Busy status of the AT59C11/22/13 can be
determined by polling the RDY/BUSY pin. A logic ‘0’ at
RDY/BUSY indicates that programming is still in progress.
A logic ‘1’ indicates that the memory location at the speci-
fied address has been written with the data pattern con-
tained in the instruction and the part is ready for further
instructions.
READ (READ): The Read (READ) instruction contains
the Address code for the memory location to be read. After
the instruction and address are decoded, data from the
selected memory location is available at the serial output
pin DO. Output data changes are synchronized with the ris-
ing edges of serial clock CLK. It should be noted that a
dummy bit (logic ‘0’) precedes the 8- or 16-bit data output
string.
ERASE ALL (ERAL): The Erase All (ERAL) instruction
programs every bit in the memory array to the logic ‘1’ state
and is primarily used for testing purposes. The Ready/Busy
status of the AT59C11/22/13 can be determined by polling
the RDY/BUSY pin. The ERAL instruction is valid only at
VCC = 5.0V ± 10%.
ERASE/WRITE (EWEN): To assure data integrity, the
part automatically goes into the Erase/Write Disable
(EWDS) state when power is first applied. An Erase/Write
Enable (EWEN) instruction must be executed first before
any programming instructions can be carried out. Please
note that once in the Erase/Write Enable state, program-
ming remains enabled until an Erase/Write Disable
(EWDS) instruction is executed or VCC power is removed
from the part.
WRITE ALL (WRAL): The Write All (WRAL) instruction
programs all memory locations with the data patterns spec-
ified in the instruction. The Ready/Busy status of the
AT59C11/22/13 can be determined by polling the
RDY/BUSY pin. The WRAL instruction is valid only at VCC
=
5.0V ± 10%.
ERASE/WRITE DISABLE (EWDS): To protect against
accidental data disturb, the Erase/Write Disable (EWDS)
instruction disables all programming modes and should be
executed after all programming operations. The operation
of the READ instruction is independent of both the EWEN
and EWDS instructions and can be executed at any time.
WRITE (WRITE): The Write (WRITE) instruction contains
the 8 or 16 bits of data to be written into the specified mem-
ory location. The self-timed programming cycle, tWP, starts
Timing Diagrams
Synchronous Data Timing
Note:
1. This is the minimum CLK period.
7
Organization Key for Timing Diagrams
Density 1K
Density 2K
Density 4K
I/O
AN
DN
x 8
A6
x 16
A5
x 8
A7
x 16
A6
x 8
A8
x 16
A7
D7
D15
D7
D15
D7
D15
READ Timing
CS
CLK
DI
...
1
1
0
0
0
AN
A0
0
...
DN
D0
DO
HIGH-Z
WRITE Timing
CS
CLK
...
...
DI
1
X
1
0
0
AN
A0 DN
D0
1
tRBD
RDY/BUSY
tWC
EWEN/EWDS Timing
CS
CLK
DI
1
0
0
X
X
X
X
X
X
X
*
ENABLE = 11
*DISABLE = 00
AT59C11/22/13
8
AT59C11/22/13
ERAL Timing
CS
CLK
DI
1
0
0
1
X
X
X
X
X
X
X
1
tRBD
RDY/BUSY
tWC
WRAL Timing
CS
CLK
...
DI
1
0
0
0
1
X
X
X
X
X
X
X
DN
D0
1
tRBD
RDY/BUSY
tWC
9
AT59C11 Ordering Information
tWC (max)
ICC (max)
ISB (max)
fMAX
(ms)
(µA)
(µA)
(kHz)
Ordering Code
Package
Operation Range
10
10
10
2000
30.0
30.0
10.0
10.0
10.0
10.0
1000
1000
1000
1000
500
AT59C11-10PC
8P3
8S2
Commercial
AT59C11W-10SC
(0°C to 70°C)
AT59C11-10PI
8P3
8S2
Industrial
AT59C11W-10SI
(-40°C to 85°C)
800
AT59C11-10PC-2.7
8P3
8S2
Commercial
AT59C11W-10SC-2.7
(0°C to 70°C)
AT59C11-10PI-2.7
8P3
8S2
Industrial
AT59C11W-10SI-2.7
(-40°C to 85°C)
600
AT59C11-10PC-2.5
8P3
8S2
Commercial
AT59C11W-10SC-2.5
(0°C to 70°C)
500
AT59C11-10PI-2.5
8P3
8S2
Industrial
AT59C11W-10SI-2.5
(-40°C to 85°C)
Package Type
8P3
8S2
8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8-Lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC)
Options
Blank
-2.7
Standard Device (4.5V to 5.5V)
Low-Voltage (2.7V to 5.5V)
-2.5
Low-Voltage (2.5V to 5.5V)
AT59C11/22/13
10
AT59C11/22/13
AT59C22 Ordering Information
tWC (max)
ICC (max)
ISB (max)
fMAX
(ms)
(µA)
(µA)
(kHz)
Ordering Code
Package
Operation Range
10
10
10
2000
30.0
30.0
10.0
10.0
10.0
10.0
1000
1000
1000
1000
500
AT59C22-10PC
8P3
8S2
Commercial
AT59C22W-10SC
(0°C to 70°C)
AT59C22-10PI
8P3
8S2
Industrial
AT59C22W-10SI
(-40°C to 85°C)
800
AT59C22-10PC-2.7
8P3
8S2
Commercial
AT59C22W-10SC-2.7
(0°C to 70°C)
AT59C22-10PI-2.7
8P3
8S2
Industrial
AT59C22W-10SI-2.7
(-40°C to 85°C)
600
AT59C22-10PC-2.5
8P3
8S2
Commercial
AT59C22W-10SC-2.5
(0°C to 70°C)
500
AT59C22-10PI-2.5
8P3
8S2
Industrial
AT59C22W-10SI-2.5
(-40°C to 85°C)
Package Type
8P3
8S2
8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8-Lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC)
Options
Blank
-2.7
Standard Device (4.5V to 5.5V)
Low-Voltage (2.7V to 5.5V)
-2.5
Low-Voltage (2.5V to 5.5V)
11
AT59C13 Ordering Information
tWC (max)
ICC (max)
ISB (max)
fMAX
(ms)
(µA)
(µA)
(kHz)
Ordering Code
Package
Operation Range
10
10
10
2000
30.0
30.0
10.0
10.0
10.0
10.0
1000
1000
1000
1000
500
AT59C13-10PC
8P3
8S2
Commercial
AT59C13W-10SC
(0°C to 70°C)
AT59C13-10PI
8P3
8S2
Industrial
AT59C13W-10SI
(-40°C to 85°C)
800
AT59C13-10PC-2.7
8P3
8S2
Commercial
AT59C13W-10SC-2.7
(0°C to 70°C)
AT59C13-10PI-2.7
8P3
8S2
Industrial
AT59C13W-10SI-2.7
(-40°C to 85°C)
600
AT59C13-10PC-2.5
8P3
8S2
Commercial
AT59C13W-10SC-2.5
(0°C to 70°C)
500
AT59C13-10PI-2.5
8P3
8S2
Industrial
AT59C13W-10SI-2.5
(-40°C to 85°C)
Package Type
8P3
8S2
8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8-Lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC)
Options
Blank
-2.7
Standard Device (4.5V to 5.5V)
Low-Voltage (2.7V to 5.5V)
-2.5
Low-Voltage (2.5V to 5.5V)
AT59C11/22/13
12
AT59C11/22/13
Packaging Information
8P3, 8-Lead, 0.300" Wide, Plastic Dual Inline
Package (PDIP)
8S2, 8-Lead, 0.200" Wide, Plastic Gull Wing Small
Outline (EIAJ SOIC)
Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-001 BA
Dimensions in Inches and (Millimeters)
.020 (.508)
.012 (.305)
.400 (10.16)
.355 (9.02)
PIN
1
.213 (5.41) .330 (8.38)
.205 (5.21) .300 (7.62)
.280 (7.11)
.240 (6.10)
PIN 1
.037 (.940)
.027 (.690)
.300 (7.62) REF
.210 (5.33) MAX
.050 (1.27) BSC
.100 (2.54) BSC
.212 (5.38)
.203 (5.16)
.080 (2.03)
.070 (1.78)
SEATING
PLANE
.015 (.380) MIN
.150 (3.81)
.115 (2.92)
.022 (.559)
.014 (.356)
.070 (1.78)
.045 (1.14)
.013 (.330)
.004 (.102)
.325 (8.26)
.300 (7.62)
0
REF
.010 (.254)
.007 (.178)
0
8
REF
15
.012 (.305)
.008 (.203)
.035 (.889)
.020 (.508)
.430 (10.9) MAX
13
相关型号：
©2020 ICPDF网 联系我们和版权申明