AT27C4096-10PC [ATMEL]
OTP ROM, 256KX16, 100ns, CMOS, PDIP40, 0.600 INCH, PLASTIC, DIP-40;![AT27C4096-10PC](http://pdffile.icpdf.com/pdf2/p00287/img/icpdf/AT27C4096-10_1729059_icpdf.jpg)
型号: | AT27C4096-10PC |
厂家: | ![]() |
描述: | OTP ROM, 256KX16, 100ns, CMOS, PDIP40, 0.600 INCH, PLASTIC, DIP-40 OTP只读存储器 光电二极管 内存集成电路 |
文件: | 总8页 (文件大小:249K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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AT27C4096
Features
Fast Read Access Time - 85 ns
Low Power CMOS Operation
•
•
100 µA Maximum Standby
40 mA Maximum Active at 5 MHz
JEDEC Standard Packages
•
40-Lead 600 mil PDIP
44-Lead PLCC
40-Lead TSOP (10 mm X 14 mm)
Direct Upgrade from 512K bit, 1M bit, and 2M bit
(AT27C516, AT27C1024, and AT27C2048) EPROMs
5V ± 10% Power Supply
High Reliability CMOS Technology
2,000V ESD Protection
200 mA Latchup Immunity
Rapid Programming Algorithm - 50 µs/word (typical)
CMOS and TTL Compatible Inputs and Outputs
•
4 Megabit
(256K x 16)
OTP
•
•
•
CMOS EPROM
•
Integrated Product Identification Code
Commercial and Industrial Temperature Ranges
•
•
Description
The AT27C4096 is a low-power, high performance 4,194,304 bit one-time program-
mable read only memory (OTP EPROM) organized 256K by 16 bits. It requires a
single 5V power supply in normal read mode operation. Any word can be accessed
in less than 85 ns, eliminating the need for speed-reducing WAIT states. The by-16
organization makes this part ideal for high-performance 16 and 32 bit microprocessor
systems.
(continued)
PDIP Top View
Pin Configurations
Pin Name
A0 - A17
O0 - O15
CE
Function
Addresses
Outputs
AT27C4096
Chip Enable
Output Enable
No Connect
OE
NC
Note: Both GND pins must be
connected.
PLCC Top View
TSOP Top View
Type 1
Note: PLCC pkg. pins 1 and 23
are DON’T CONNECT.
0311D
3-195
Description (Continued)
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excur-
sions. Unless accommodated by the system design, these
transients may exceed data sheet limits, resulting in de-
vice non-conformance. At a minimum, a 0.1 µF high fre-
quency, low inherent inductance, ceramic capacitor
should be utilized for each device. This capacitor should
In read mode, the AT27C4096 typically consumes 15 mA.
Standby mode supply current is typically less than 10 µA.
The AT27C4096 is available in industry standard
JEDEC-approved one-time programmable (OTP) plastic
PDIP, PLCC, and TSOP packages. The device features
two-line control (CE, OE) to eliminate bus contention in
high-speed systems.
be connected between the V and Ground terminals of
CC
With high density 256K word storage capability, the
AT27C4096 allows firmware to be stored reliably and to be
accessed by the system without the delays of mass stor-
age media.
the device, as close to the device as possible. Additionally,
to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic
capacitor should be utilized, again connected between the
Atmel’s AT27C4096 has additional features that ensure
high quality and efficient production use. The Rapid Pro-
gramming Algorithm reduces the time required to program
the part and guarantees reliable programming. Program-
ming time is typically only 50 µs/word. The Integrated
Product Identification Code electronically identifies the de-
vice and manufacturer. This feature is used by industry
standard programming equipment to select the proper
programming algorithms and voltages.
V
and Ground terminals. This capacitor should be posi-
CC
tioned as close as possible to the point where the power
supply is connected to the array.
3-196
AT27C4096
AT27C4096
Block Diagram
Absolute Maximum Ratings*
Temperature Under Bias ................ -55°C to +125°C
Storage Temperature...................... -65°C to +150°C
Voltage on Any Pin with
(1)
Respect to Ground......................... -2.0V to +7.0V
Voltage on A9 with
Respect to Ground ......................-2.0V to +14.0V
(1)
V
Supply Voltage with
PP
(1)
Respect to Ground.......................-2.0V to +14.0V
*NOTICE: Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indi-
cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Note: 1. Minimum voltage is -0.6V dc which may undershoot
to -2.0V for pulses of less than 20 ns. Maximum
output pin voltage is VCC + 0.75V dc which may
overshoot to +7.0V for pulses of less than 20 ns.
Operating Modes
CE
OE
Ai
V
X
Mode \ Pin
Read
Outputs
PP
(1)
V
IL
V
IL
Ai
D
OUT
Output Disable
Standby
X
V
X
X
High Z
High Z
IH
(5)
V
X
X
Ai
X
IH
(2)
Rapid Program
V
V
V
D
D
IL
IH
IH
IH
PP
PP
PP
IN
PGM Verify
PGM Inhibit
V
V
V
Ai
V
V
IL
OUT
V
X
High Z
IH
(3)
A9 = V
H
Identification
Code
(4)
Product Identification
V
IL
V
IL
A0 = V or V
A1 - A17 = V
V
CC
IH
IL
IL
Notes: 1. X can be VIL or VIH.
4. Two identifier words may be selected. All Ai inputs
are held low (VIL), except A9, which is set to VH, and A0,
which is toggled low (VIL) to select the Manufacturer’s Identi-
fication word and high (VIH) to select the Device Code word.
2. Refer to the Programming characteristics.
3. VH = 12.0 ± 0.5V.
5. Standby VCC current (ISB) is specified with VPP = VCC
VCC > VPP will cause a slight increase in ISB.
.
3-197
DC and AC Operating Conditions for Read Operation
AT27C4096
-85
-10
-12
-15
Operating
Temperature
(Case)
Com.
Ind.
0°C - 70°C
0°C - 70°C
0°C - 70°C
0°C - 70°C
-40°C - 85°C
5V ± 10%
-40°C - 85°C
5V ± 10%
-40°C - 85°C
5V ± 10%
-40°C - 85°C
5V ± 10%
V
CC
Power Supply
DC and Operating Characteristics for Read Operation
Symbol Parameter
Condition
Min
Max
± 1
± 5
10
Units
I
I
I
Input Load Current
V
V
V
= 0V to V
CC
µA
µA
µA
LI
IN
Output Leakage Current
= 0V to V
= V
PP CC
LO
PP1
OUT
CC
(2)
(1)
V
V
Read/Standby Current
Standby Current
PP
I
(CMOS)
SB1
100
1
µA
mA
mA
CE = V ± 0.3V
CC
(1)
I
SB
CC
CC
I
(TTL)
SB2
CE = 2.0 to V + 0.5V
CC
f = 5 MHz,I
= 0 mA,
OUT
I
V
Active Current
40
CC
CE = V
IL
V
V
V
V
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
-0.6
2.0
0.8
V
V
V
V
IL
V
+ 0.5
IH
CC
I
= 2.1 mA
0.4
OL
OH
OL
I
= -400 µA
2.4
OH
Notes: 1. VCC must be applied simultaneously or before VPP
,
2. VPP may be connected directly to VCC, except during pro-
gramming. The supply current would then be the sum of ICC
and removed simultaneously or after VPP
.
and IPP
.
AC Characteristics for Read Operation
AT27C4096
-10 -12
-85
-15
Min
Max
Min
Max
Min
Max
Min
Max
Symbol Parameter
Condition
Units
Address to
Output Delay
CE = OE
= VIL
(3)
t
85
100
120
150
ns
ACC
(2)
CE to Output Delay
OE = VIL
CE = VIL
t
t
85
40
100
40
120
40
150
50
ns
ns
CE
(2, 3)
(4, 5)
OE to Output Delay
OE or CE High to
Output Float, whichever occurred first
OE
t
DF
30
30
35
40
ns
ns
Output Hold from
Address, CE or OE, whichever occurred first
(4)
t
7
0
0
0
OH
Notes:
2, 3, 4, 5. See the AC Waveforms for Read Operation diagram.
3-198
AT27C4096
AT27C4096
AC Waveforms for Read Operation (1)
Notes: 1. Timing measurement references are 0.8V and 2.0V.
Input AC drive levels are 0.45V and 2.4V, unless
otherwise specified.
3. OE may be delayed up to tACC - tOE after the address is valid
without impact on tACC
.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer
driven.
2. OE may be delayed up to tCE - tOE after the falling
edge of CE without impact on tCE
.
Output Test Load
Input Test Waveforms and Measurement Levels
tR, tF < 20 ns (10% to 90%)
Note: CL = 100 pF including
jig capacitance.
Pin Capacitance (f = 1 MHz T = 25°C) (1)
Typ
4
Max
10
Units
pF
Conditions
C
C
V
V
= 0V
IN
IN
8
12
pF
= 0V
OUT
OUT
Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
3-199
Programming Waveforms (1)
3. When programming the AT27C4096, a 0.1 µF capacitor is re-
quired across VPP and ground to suppress spurious voltage
transients.
Notes: 1. The Input Timing Reference is 0.8V for VIL and 2.0V
for VIH.
2. tOE and tDFP are characteristics of the device but
must be accommodated by the programmer.
DC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Limits
Symbol Parameter
Input Load Current
Test Conditions
Units
Min
Max
±10
VIN = VIL, VIH
µA
V
I
LI
Input Low Level
-0.6
2.0
0.8
V
V
V
V
IL
Input High Level
VCC + 0.7
0.4
V
IH
Output Low Voltage
Output High Voltage
IOL = 2.1 mA
V
OL
OH
IOH = -400 µA
2.4
V
VCC Supply Current
(Program and Verify)
50
30
mA
mA
V
I
I
CC2
PP2
VPP Supply Current
CE = VIL
A9 Product Identification
Voltage
11.5
12.5
V
ID
3-200
AT27C4096
AT27C4096
AC Programming Characteristics
Rapid Programming Algorithm
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
A 50 µs CE pulse width is used to program. The address
is set to the first location. V is raised to 6.5V and V is
CC
PP
Limits
raised to 13.0V. Each address is first programmed with
one 50 µs CE pulse without verification. Then a verifica-
tion/reprogramming loop is executed for each address. In
the event a word fails to pass verification, up to 10 succes-
sive 50 µs pulses are applied with a verification after each
pulse. If the word fails to verify after 10 pulses have been
applied, the part is considered failed. After the word veri-
fies properly, the next address is selected until all have
Test
Sym- Parameter
Conditions* (1)
Units
Min
Max
bol
Address Setup Time
OE Setup Time
2
2
2
0
2
µs
µs
µs
µs
µs
t
t
t
t
t
AS
OES
DS
AH
Data Setup Time
Address Hold Time
Data Hold Time
been checked. V is then lowered to 5.0V and V
to
PP
CC
DH
5.0V. All words are read again and compared with the
original data to determine if the device passes or fails.
OE High to
0
130
ns
Output Float Delay (2)
t
DFP
VPP Setup Time
2
2
µs
µs
µs
ns
t
t
t
t
VPS
VCS
PW
VCC Setup Time
CE Program Pulse Width (3)
47.5 52.5
150
Data Valid from OE
OE
VPP Pulse Rise Time During
Programming
50
ns
t
PRT
*AC Conditions of Test:
Input Rise and Fall Times (10% to 90%) ..............20 ns
Input Pulse Levels....................................0.45V to 2.4V
Input Timing Reference Level................... 0.8V to 2.0V
Output Timing Reference Level.................0.8V to 2.0V
Notes: 1. VCC must be applied simultaneously or before VPP
and removed simultaneously or after VPP
.
2. This parameter is only sampled and is not 100%
tested. Ouput Float is defined as the point where
data is no longer driven — see timing diagram.
3. Program Pulse width tolerance is 50 µsec ± 5%.
Atmel’s 27C4096 Integrated
Product Identification Code
Pins
Hex
Codes
Data
A0 015-08 O7 O6 O5 O4 O3 O2 O1 O0
Manufacturer
Device Type
0
1
0
0
0
1
0
1
0
1
1
1
1
0
1
1
1
0
0
0
001E
00F4
3-201
Ordering Information
t
I
(mA)
ACC
CC
Ordering Code
Package
Operation Range
(ns)
Active
Standby
85
40
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
AT27C4096-85JC
AT27C4096-85PC
AT27C4096-85VC
44J
40P6
40V
Commercial
(0°C to 70°C)
40
40
40
40
40
40
40
AT27C4096-85JI
AT27C4096-85PI
AT27C4096-85VI
44J
40P6
40V
Industrial
(-40°C to 85°C)
100
120
150
AT27C4096-10JC
AT27C4096-10PC
AT27C4096-10VC
44J
40P6
40V
Commercial
(0°C to 70°C)
AT27C4096-10JI
AT27C4096-10PI
AT27C4096-10VI
44J
40P6
40V
Industrial
(-40°C to 85°C)
AT27C4096-12JC
AT27C4096-12PC
AT27C4096-12VC
44J
40P6
40V
Commercial
(0°C to 70°C)
AT27C4096-12JI
AT27C4096-12PI
AT27C4096-12VI
44J
40P6
40V
Industrial
(-40°C to 85°C)
AT27C4096-15JC
AT27C4096-15PC
AT27C4096-15VC
44J
40P6
40V
Commercial
(0°C to 70°C)
AT27C4096-15JI
AT27C4096-15PI
AT27C4096-15VI
44J
40P6
40V
Industrial
(-40°C to 85°C)
Package Type
44J
44 Lead, Plastic J-Leaded Chip Carrier (PLCC)
40P6
40V
40 Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
40 Lead, Plastic Thin Small Outline Package (TSOP) 10 x 14 mm
3-202
AT27C4096
相关型号:
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