AT27BV4096-15VI [ATMEL]

4 Megabit 256K x 16 Unregulated Battery-Voltage High Speed OTP CMOS EPROM; 4兆位256K ×16的非稳压电池电压高速CMOS OTP EPROM
AT27BV4096-15VI
型号: AT27BV4096-15VI
厂家: ATMEL    ATMEL
描述:

4 Megabit 256K x 16 Unregulated Battery-Voltage High Speed OTP CMOS EPROM
4兆位256K ×16的非稳压电池电压高速CMOS OTP EPROM

电池 可编程只读存储器 电动程控只读存储器
文件: 总9页 (文件大小:227K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AT27BV4096  
Features  
Fast Read Access Time - 120 ns  
Dual Voltage Range Operation  
Unregulated Battery Power Supply Range, 2.7V to 3.6V  
or Standard 5V ± 10% Supply Range  
Pin Compatible with JEDEC Standard AT27C4096  
Low Power CMOS Operation  
20 µA max. (less than 1 µA typical) Standby for VCC = 3.6V  
29 mW max. Active at 5 MHz for VCC = 3.6V  
JEDEC Standard Surface Mount Packages  
4 Megabit  
44-Lead PLCC  
40-Lead TSOP (10 x 14mm)  
High Reliability CMOS Technology  
2,000V ESD Protection  
200 mA Latchup Immunity  
Rapid Programming algorithm - 100 µs/word (typical)  
CMOS and TTL Compatible Inputs and Outputs  
JEDEC Standard for LVTTL and LVBO  
Integrated Product Identification Code  
Commercial and Industrial Temperature Ranges  
(256K x 16)  
Unregulated  
Battery-Voltage  
High Speed  
OTP  
Description  
The AT27BV4096 is a high performance, low power, low voltage 4,194,304 bit one-  
time programmable read only memory (OTP EPROM) organized as 256K by 16 bits.  
It requires only one supply in the range of 2.7V to 3.6V in normal read mode opera-  
tion. The by-16 organization makes this part ideal for portable and handheld 16 and  
32 bit microprocessor based systems using either regulated or unregulated battery  
power.  
CMOS EPROM  
(continued)  
Pin Configurations  
Pin Name Function  
A0 - A17  
O0 - O15  
CE  
Addresses  
Outputs  
AT27BV4096  
Chip Enable  
Output Enable  
No Connect  
OE  
NC  
Note: Both GND pins must be  
connected.  
TSOP Top View  
PLCC Top View  
Type 1  
Note: 1. PLCC package pins 1 and 23  
are DON’T CONNECT.  
0640A  
3-63  
Description (Continued)  
Atmel’s innovative design techniques provide fast speeds  
that rival 5V parts while keeping the low power consump-  
System Considerations  
Switching between active and standby conditions via the  
Chip Enable pin may produce transient voltage excur-  
sions. Unless accommodated by the system design, these  
transients may exceed data sheet limits, resulting in de-  
vice non-conformance. At a minimum, a 0.1 µF high fre-  
quency, low inherent inductance, ceramic capacitor  
should be utilized for each device. This capacitor should  
tion of a 3V supply. At V = 2.7V, any word can be ac-  
CC  
cessed in less than 120 ns. With a typical power dissipa-  
tion of only 18 mW at 5 MHz and V  
AT27BV4096 consumes less than one fifth the power of a  
standard 5V EPROM.  
= 3V, the  
CC  
be connected between the V and Ground terminals of  
CC  
Standby mode supply current is typically less than 1 µA at  
3V. The AT27BV4096 simplifies system design and  
stretches battery lifetime even further by eliminating the  
need for power supply regulation.  
the device, as close to the device as possible. Additionally,  
to stabilize the supply voltage level on printed circuit  
boards with large EPROM arrays, a 4.7 µF bulk electrolytic  
capacitor should be utilized, again connected between the  
The AT27BV4096 is available in industry standard  
JEDEC-approved one-time programmable (OTP) plastic  
PLCC and TSOP packages. All devices feature two-line  
control (CE, OE) to give designers the flexibility to prevent  
bus contention.  
V
and Ground terminals. This capacitor should be posi-  
CC  
tioned as close as possible to the point where the power  
supply is connected to the array.  
The AT27BV4096 operating with V  
at 3.0V produces  
CC  
TTL level outputs that are compatible with standard TTL  
logic devices operating at V = 5.0V. At V = 2.7V, the  
CC  
CC  
part is compatible with JEDEC approved low voltage bat-  
tery operation (LVBO) interface specifications. The device  
is also capable of standard 5-volt operation making it ide-  
ally suited for dual supply range systems or card products  
that are pluggable in both 3-volt and 5-volt hosts.  
Atmel’s AT27BV4096 has additional features to ensure  
high quality and efficient production use. The Rapid Pro-  
gramming Algorithm reduces the time required to program  
the part and guarantees reliable programming. Program-  
ming time is typically only 100 µs/word. The Integrated  
Product Identification Code electronically identifies the de-  
vice and manufacturer. This feature is used by industry  
standard programming equipment to select the proper  
programming algorithms and voltages. The AT27BV4096  
programs exactly the same way as a standard 5V  
AT27C4096 and uses the same programming equipment.  
3-64  
AT27BV4096  
AT27BV4096  
Block Diagram  
Absolute Maximum Ratings*  
Temperature Under Bias ................ -55°C to +125°C  
Storage Temperature...................... -65°C to +150°C  
Voltage on Any Pin with  
(1)  
Respect to Ground.........................-2.0V to +7.0V  
Voltage on A9 with  
Respect to Ground ......................-2.0V to +14.0V  
(1)  
V
Supply Voltage with  
PP  
(1)  
Respect to Ground.......................-2.0V to +14.0V  
*NOTICE: Stresses beyond those listed under “Absolute Maxi-  
mum Ratings” may cause permanent damage to the device.  
This is a stress rating only and functional operation of the  
device at these or any other conditions beyond those indi-  
cated in the operational sections of this specification is not  
implied. Exposure to absolute maximum rating conditions  
for extended periods may affect device reliability.  
Note: 1. Minimum voltage is -0.6V dc which may undershoot to  
-2.0V for pulses of less than 20 ns. Maximum output  
pin voltage is VCC + 0.75V dc which may overshoot  
to +7.0V for pulses of less than 20 ns.  
Operating Modes  
CE  
OE  
Ai  
V
X
V
CC  
Mode \ Pin  
Outputs  
PP  
(1)  
(2)  
(2)  
(2)  
(3)  
(3)  
(3)  
(2)  
Read  
V
IL  
V
Ai  
V
D
OUT  
IL  
CC  
CC  
CC  
CC  
CC  
CC  
(2)  
Output Disable  
X
V
IH  
X
X
V
V
V
V
V
High Z  
High Z  
(5)  
(2)  
Standby  
V
X
X
Ai  
X
IH  
(3)  
Rapid Program  
V
V
IH  
V
D
D
IL  
IH  
IH  
PP  
PP  
PP  
IN  
(3)  
PGM Verify  
V
V
V
Ai  
V
V
IL  
OUT  
(3)  
PGM Inhibit  
V
IH  
X
High Z  
(4)  
A9 = V  
H
Identification  
Code  
(3)  
(3, 5)  
Product Identification  
V
IL  
V
A0 = V or V  
A1 - A17 = V  
V
V
CC  
IL  
IH  
IL  
IL  
CC  
Notes: 1. X can be VIL or VIH.  
4. VH = 12.0 ± 0.5V.  
2. Read, output disable, and standby modes require,  
2.7V VCC 3.6V, or 4.5V VCC 5.5V.  
3. Refer to Programming Characteristics. Programming  
modes require VCC = 6.5V.  
5. Two identifier words may be selected. All Ai inputs  
are held low (VIL), except A9 which is set to VH and A0  
which is toggled low (VIL) to select the Manufacturer’s Identi-  
fication word and high (VIH) to select the Device Code word.  
3-65  
DC and AC Operating Conditions for Read Operation  
AT27BV4096  
-12  
-15  
Com.  
Ind.  
0°C - 70°C  
-40°C - 85°C  
2.7V - 3.6V  
5V ± 10%  
0°C - 70°C  
-40°C - 85°C  
2.7V - 3.6V  
5V ± 10%  
Operating  
Temperature (Case)  
V
Power Supply  
CC  
= Preliminary Information  
DC and Operating Characteristics for Read Operation  
Symbol Parameter  
Condition  
Min  
Max  
Units  
VCC = 2.7V to 3.6V  
I
I
I
Input Load Current  
V
V
V
= 0V to V  
CC  
±1  
±5  
10  
20  
µA  
µA  
µA  
µA  
LI  
IN  
Output Leakage Current  
= 0V to V  
CC  
LO  
PP1  
OUT  
(2)  
(1)  
V
Read/Standby Current  
= V  
CC  
PP  
PP  
SB1  
SB2  
I
I
(CMOS), CE = V ± 0.3V  
CC  
(1)  
I
V
Standby Current  
SB  
CC  
CC  
100  
8
µA  
mA  
V
(TTL), CE = 2.0 to V + 0.5V  
CC  
I
V
Active Current  
f = 5 MHz, I  
= 0 mA, CE = V , V = 3.6V  
IL CC  
CC  
OUT  
V
V
V
V
= 3.0 to 3.6V  
= 2.7 to 3.6V  
= 3.0 to 3.6V  
= 2.7 to 3.6V  
-0.6  
-0.6  
0.8  
CC  
CC  
CC  
CC  
V
V
Input Low Voltage  
Input High Voltage  
IL  
0.2 x V  
V
CC  
2.0  
V
+ 0.5  
+ 0.5  
V
CC  
CC  
IH  
0.7 x V  
V
V
CC  
I
I
I
I
I
I
= 2.0 mA  
= 100 µA  
= 20 µA  
0.4  
V
OL  
OL  
OL  
OH  
OH  
OH  
V
V
Output Low Voltage  
Output High Voltage  
OL  
0.2  
0.1  
V
V
= -2.0 mA  
= -100 µA  
= -20 µA  
2.4  
V
OH  
V
V
- 0.2  
- 0.1  
V
CC  
V
CC  
VCC = 4.5V to 5.5V  
I
I
I
Input Load Current  
V
V
V
= 0V to V  
CC  
±1  
±5  
10  
100  
1
µA  
µA  
µA  
µA  
mA  
mA  
V
LI  
IN  
Output Leakage Current  
= 0V to V  
CC  
LO  
PP1  
OUT  
(2)  
(1)  
V
Read/Standby Current  
= V  
CC  
PP  
PP  
SB1  
SB2  
I
I
(CMOS), CE = V ± 0.3V  
CC  
(1)  
I
SB  
V
Standby Current  
CC  
(TTL), CE = 2.0 to V + 0.5V  
CC  
I
V
Active Current  
f = 5 MHz, I  
= 0 mA, CE = V  
IL  
40  
0.8  
CC  
CC  
OUT  
V
V
V
V
Input Low Voltage  
Input High Voltage  
Output Low Voltage  
Output High Voltage  
-0.6  
IL  
2.0  
V
+ 0.5  
V
IH  
CC  
I
OL  
= 2.1 mA  
0.4  
V
OL  
OH  
I
= -400 µA  
2.4  
V
OH  
Notes: 1. VCC must be applied simultaneously with or before  
PP, and removed simultaneously with or after  
VPP  
2. VPP may be connected directly to VCC, except during pro-  
gramming. The supply current would then be the sum of ICC  
V
.
and IPP.  
3-66  
AT27BV4096  
AT27BV4096  
AC Characteristics for Read Operation (VCC = 2.7V to 3.6V and 4.5V to 5.5V)  
AT27BV4096  
-12 -15  
Min  
Max  
Min  
Max  
Symbol  
Parameter  
Condition  
Units  
Address to  
Output Delay  
CE = OE  
= VIL  
(3)  
t
120  
150  
ns  
ACC  
(2)  
CE to Output Delay  
OE to Output Delay  
OE = VIL  
CE = VIL  
t
t
t
120  
35  
150  
50  
ns  
ns  
ns  
CE  
OE  
DF  
(2, 3)  
(4, 5)  
OE or CE High to Output Float, whichever occurred first  
30  
40  
Output Hold from Address, CE or OE,  
whichever occurred first  
t
0
0
ns  
OH  
Notes: 2, 3, 4, 5. - see AC Waveforms for Read Operation.  
= Preliminary Information  
AC Waveforms for Read Operation (1)  
Notes: 1. Timing measurement references are 0.8V and 2.0V.  
Input AC drive levels are 0.45V and 2.4V, unless oth-  
erwise specified.  
4. This parameter is only sampled and is not 100% tested.  
5. Output float is defined as the point when data is no longer  
driven.  
2. OE may be delayed up to tCE - tOE after the falling  
6. When reading a 27BV4096, a 0.1 µF capacitor is required  
across VCC and ground to supress spurious voltage tran-  
sients.  
edge of CE without impact on tCE  
3. OE may be delayed up to tACC - tOE after the address  
is valid without impact on tACC  
.
.
3-67  
Input Test Waveforms and Measurement Levels  
Output Test Load  
tR, tF < 20 ns (10% to 90%)  
Note: CL = 100 pF including  
jig capacitance.  
Pin Capacitance (f = 1 MHz T = 25°C) (1)  
Typ  
4
Max  
10  
Units  
pF  
Conditions  
C
C
V
V
= 0V  
IN  
IN  
8
12  
pF  
= 0V  
OUT  
OUT  
Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.  
3-68  
AT27BV4096  
AT27BV4096  
Programming Waveforms(1)  
Notes: 1. The Input Timing Reference is 0.8V for VIL and 2.0V  
for VIH.  
3. When programming the AT27BV4096 a 0.1 µF capacitor is  
required across VPP and ground to suppress spurious volt-  
age transients.  
2. tOE and tDFP are characteristics of the device but  
must be accommodated by the programmer.  
DC Programming Characteristics  
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V  
Limits  
Symbol  
Parameter  
Test Conditions  
Units  
µA  
V
Min  
Max  
±10  
Input Load Current  
VIN = VIL, VIH  
I
LI  
Input Low Level  
-0.6  
2.0  
0.8  
V
V
V
V
IL  
Input High Level  
VCC + 0.1  
0.4  
V
IH  
Output Low Voltage  
IOL = 2.1 mA  
V
OL  
Output High Voltage  
VCC Supply Current (Program and Verify)  
VPP Supply Current  
IOH = -400 µA  
2.4  
V
OH  
CC2  
PP2  
50  
30  
mA  
mA  
V
I
I
CE = VIL  
A9 Product Identification Voltage  
11.5  
12.5  
V
ID  
3-69  
AC Programming Characteristics  
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V  
RapidProgramming Algorithm  
A 50 µs CE pulse width is used to program. The address  
is set to the first location. V is raised to 6.5V and V is  
CC  
PP  
Limits  
raised to 13.0V. Each address is first programmed with  
one 50 µs CE pulse without verification. Then a verifica-  
tion / reprogramming loop is executed for each address.  
In the event a word fails to pass verification, up to 10 suc-  
cessive 50 µs pulses are applied with a verification after  
each pulse. If the word fails to verify after 10 pulses have  
been applied, the part is considered failed. After the word  
verifies properly, the next address is selected until all have  
Sym-  
bol  
Test  
Units  
(1)  
Min  
Max  
Parameter Conditions*  
Address Setup Time  
CE Setup Time  
2
2
2
2
0
2
µs  
µs  
µs  
µs  
µs  
µs  
t
t
t
t
t
t
AS  
CES  
OES  
DS  
OE Setup Time  
Data Setup Time  
Address Hold Time  
Data Hold Time  
been checked. V is then lowered to 5.0V and V  
to  
PP  
CC  
AH  
5.0V. All words are read again and compared with the  
original data to determine if the device passes or fails.  
DH  
OE High to Out-  
0
130  
ns  
put Float Delay (2)  
t
DFP  
VPP Setup Time  
VCC Setup Time  
2
2
µs  
µs  
t
t
VPS  
VCS  
PGM Program Pulse  
Width (3)  
47.5  
52.5  
150  
µs  
ns  
ns  
t
t
t
PW  
Data Valid from OE  
OE  
VPP Pulse Rise Time During  
Programming  
50  
PRT  
*AC Conditions of Test:  
Input Rise and Fall Times (10% to 90%)..............20 ns  
Input Pulse Levels.................................. 0.45V to 2.4V  
Input Timing Reference Level ..................0.8V to 2.0V  
Output Timing Reference Level ...............0.8V to 2.0V  
Notes: 1. VCC must be applied simultaneously or before VPP  
and removed simultaneously or after VPP  
.
2. This parameter is only sampled and is not 100%  
tested. Output Float is defined as the point where  
data is no longer driven — see timing diagram.  
3. Program Pulse width tolerance is 50 µsec ± 5%.  
Atmel’s 27BV4096 Integrated  
Product Identification Code (1)  
Pins  
Hex  
Codes  
Data  
A0 015-08 O7 O6 O5 O4 O3 O2 O1 O0  
Manufacturer  
Device Type  
0
1
0
0
0
1
0
1
0
1
1
1
1
0
1
1
1
0
0
0
001E  
00F4  
Note: 1. The AT27BV4096 has the same Product Identification  
Code as the AT27C4096. Both are programming  
compatible.  
3-70  
AT27BV4096  
AT27BV4096  
Ordering Information  
t
I
(mA)  
ACC  
CC  
Ordering Code  
Package  
Operation Range  
(ns)  
Active  
Standby  
120  
8
0.02  
0.02  
0.02  
0.02  
AT27BV4096-12JC  
AT27BV4096-12VC  
44J  
40V  
Commercial  
(0°C to 70°C)  
8
8
8
AT27BV4096-12JI  
AT27BV4096-12VI  
44J  
40V  
Industrial  
(-40°C to 85°C)  
150  
AT27BV4096-15JC  
AT27BV4096-15VC  
44J  
40V  
Commercial  
(0°C to 70°C)  
AT27BV4096-15JI  
AT27BV4096-15VI  
44J  
40V  
Industrial  
(-40°C to 85°C)  
= Preliminary Information  
Package Type  
44 Lead, Plastic J-Leaded Chip Carrier (PLCC)  
40 Lead, Plastic Thin Small Outline Package (TSOP) 10 x 14 mm  
44J  
40V  
3-71  

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