APL5320-14B [ANPEC]
Ultra-Low-Noise, High PSRR, Low-Dropout, 300mA Linear Regulator; 超低噪声,高PSRR ,低压差, 300毫安线性稳压器型号: | APL5320-14B |
厂家: | ANPEC ELECTRONICS COROPRATION |
描述: | Ultra-Low-Noise, High PSRR, Low-Dropout, 300mA Linear Regulator |
文件: | 总25页 (文件大小:424K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
APL5320
Ultra-Low-Noise, High PSRR, Low-Dropout, 300mA Linear Regulator
General Description
Features
The APL5320 is a P-channel low dropout linear regulator
which needs only one input voltage from 2.5 to 6V, and
delivers current up to 300mA to set output voltage. It also
can work with low ESR ceramic capacitors and is ideal for
using in the battery-powered applications such as note-
book computers and cellular phones. Typical dropout volt-
age is only 290mV at 300mA loading.
·
·
·
Wide Operating Voltage: 2.5~6V
Low Dropout Voltage: 290mV @ 3V/300mA
Fixed Output Voltages: 1.2~3.7V with Step 100mV,
and 2.85V, 4.75V
·
·
·
·
·
·
·
·
Guaranteed 300mA Output Current
High PSRR: 70dB
Current-Limit Protection
The APL5320 provides several versions of fixed output
voltages ranging from 1.2 to 3.7V with step 100mV and
2.85V, 4.75V. Current-limit with current foldback and ther-
mal shutdown functions protects the device against cur-
rent over-loads and over-temperature. The APL5320 is
available in SOT-23-5, TSOT-23-5, SOT-23-3, SC-70-5,
VTDFN1.2x1.6-4, and TDFN 1.6x1.6-6 packages.
Controlled Short-Circuit Current: 50mA
Over-Temperature Protection
Stable with 1mF Capacitor for Any Load
Excellent Load/Line Transient
SOT-23-5, TSOT-23-5, SOT-23-3, SC-70-5,
VTDFN1.2x1.6-4, and TDFN1.6x1.6-6 Packages
Lead Free and Green Devices Available
(RoHS Compliant)
·
Pin Configuration
VIN 1
GND 2
5 VOUT
4 NC
Applications
SHDN 3
·
·
·
·
·
·
Cellular Phones
SOT23-5/TSOT-23-5/SC-70-5
(Top View)
Portable and Battery-Powered Equipments
Laptops, Palmtops, Notebook Computers
Wireless LANs
GND 1
3 VIN
Portable Information Appliances
GPSes
VOUT 2
SOT-23-3
(Top View)
Simplified Application Circuit
1
2
3
6
5
4
SHDN
NC
VIN
GND
NC
VOUT
4
3
VIN
1
2
VOUT
GND
VIN
VOUT
VIN VOUT
SHDN
SHDN
GND
VTDFN1.2x1.6-4
(Top View)
TDFN1.6x1.6-6
(Top View)
Enable
= Exposed Pad (connected to ground
plane for better heat dissipation)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright ã ANPEC Electronics Corp.
1
www.anpec.com.tw
Rev. A.9 - Mar., 2012
APL5320
Ordering and Marking Information
APL5320
Package Code
B : SOT-23-5 BT : TSOT-23-5 A : SOT-23-3
S5 : SC-70-5 QB : TDFN1.6x1.6-6 QF: VTDFN1.2x1.6-4
Operating Ambient Temperature Range
I : -40 to 85 oC
Assembly Material
Handling Code
Handling Code
TR : Tape & Reel
Voltage Code
12 : 1.2V 36 : 3.6V
Temperature Range
Package Code
Assembly Material
G : Halogen and Lead Free Device
Voltage Code
Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant)and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
SOT-23-5
Product Name Marking Product Name Marking Product Name Marking Product Name Marking
APL5320-12B
APL5320-16B
APL5320-20B
APL5320-24B
APL5320-28B
APL5320-32B
205X
20AX
20EX
20IX
APL5320-13B
APL5320-17B
APL5320-21B
APL5320-25B
APL5320-29B
APL5320-33B
APL5320-285B
207X
20BX
20FX
20JX
20NX
20RX
20dX
APL5320-14B
APL5320-18B
APL5320-22B
APL5320-26B
APL5320-30B
APL5320-34B
APL5320-37B
208X
20CX
20GX
20KX
20OX
20SX
206X
APL5320-15B
APL5320-19B
APL5320-23B
APL5320-27B
APL5320-31B
APL5320-35B
APL5320-475B
209X
20DX
20HX
20LX
20PX
20TX
204X
20MX
20QX
20gX
APL5320-36B
Note: X - Code.
TSOT-23-5
Product Name Marking Product Name Marking Product Name Marking Product Name Marking
APL5320-12BT
APL5320-16BT
APL5320-20BT
APL5320-24BT
APL5320-28BT
APL5320-32BT
205X
20AX
20EX
20IX
APL5320-13BT
APL5320-17BT
APL5320-21BT
APL5320-25BT
APL5320-29BT
APL5320-33BT
APL5320-285BT
207X
20BX
20FX
20JX
20NX
20RX
20dX
APL5320-14BT
APL5320-18BT
APL5320-22BT
APL5320-26BT
APL5320-30BT
APL5320-34BT
APL5320-37BT
208X
20CX
20GX
20KX
20OX
20SX
206X
APL5320-15BT
APL5320-19BT
APL5320-23BT
APL5320-27BT
APL5320-31BT
APL5320-35BT
APL5320-475BT
209X
20DX
20HX
20LX
20PX
20TX
204X
20MX
20QX
20gX
APL5320-36BT
Note: X - Code.
SOT-23-3
Product Name Marking Product Name Marking Product Name Marking Product Name Marking
APL5320-12A
APL5320-16A
APL5320-20A
APL5320-24A
APL5320-28A
APL5320-32A
205X
20AX
20EX
20IX
APL5320-13A
APL5320-17A
APL5320-21A
APL5320-25A
APL5320-29A
APL5320-33A
APL5320-285A
207X
20BX
20FX
20JX
20NX
20RX
20dX
APL5320-14A
APL5320-18A
APL5320-22A
APL5320-26A
APL5320-30A
APL5320-34A
APL5320-37A
208X
20CX
20GX
20KX
20OX
20SX
206X
APL5320-15A
APL5320-19A
APL5320-23A
APL5320-27A
APL5320-31A
APL5320-35A
APL5320-475A
209X
20DX
20HX
20LX
20PX
20TX
204X
20MX
20QX
20gX
APL5320-36A
Note: X - Code.
Copyright ã ANPEC Electronics Corp.
2
www.anpec.com.tw
Rev. A.9 - Mar., 2012
APL5320
Ordering and Marking Information (Cont.)
TDFN1.6x1.6-6
Product Name Marking Product Name Marking Product Name Marking Product Name Marking
205
X
207
X
208
X
209
X
APL5320-12QB
APL5320-16QB
APL5320-20QB
APL5320-24QB
APL5320-28QB
APL5320-32QB
APL5320-13QB
APL5320-17QB
APL5320-21QB
APL5320-25QB
APL5320-29QB
APL5320-33QB
APL5320-285QB
APL5320-14QB
APL5320-18QB
APL5320-22QB
APL5320-26QB
APL5320-30QB
APL5320-34QB
APL5320-37QB
APL5320-15QB
APL5320-19QB
APL5320-23QB
APL5320-27QB
APL5320-31QB
APL5320-35QB
APL5320-475QB
20A
X
20B
X
20C
X
20D
X
20E
X
20F
X
20G
X
20H
X
20I
X
20J
X
20K
X
20L
X
20M
X
20N
X
20O
X
20P
X
20Q
X
20R
X
20S
X
20T
X
20g
X
20d
X
206
X
204
X
APL5320-36QB
Note: X - Code.
SC-70-5
Product Name Marking Product Name Marking Product Name Marking Product Name Marking
APL5320-12S5
APL5320-16S5
APL5320-20S5
APL5320-24S5
APL5320-28S5
APL5320-32S5
APL5320-36S5
205
20A
20E
20I
AP5320-13S5
APL5320-17S5
APL5320-21S5
APL5320-25S5
APL5320-29S5
APL5320-33S5
APL5320-285S5
207
20B
20F
20J
20N
20R
20d
APL5320-14S5
APL5320-18S5
APL5320-22S5
APL5320-26S5
APL5320-30S5
APL5320-34S5
APL5320-37S5
208
20C
20G
20K
20O
20S
206
APL5320-15S5
APL5320-19S5
APL5320-23S5
APL5320-27S5
APL5320-31S5
APL5320-35S5
APL5320-475S5
209
20D
20H
20L
20P
20T
204
20M
20Q
20g
VTDFN1.2x1.6-4
Product Name Marking Product Name Marking Product Name Marking Product Name Marking
05
X
07
X
08
X
09
X
APL5320-12QF
APL5320-16QF
APL5320-20QF
APL5320-24QF
APL5320-28QF
APL5320-32QF
APL5320-13QF
APL5320-17QF
APL5320-21QF
APL5320-25QF
APL5320-29QF
APL5320-33QF
APL5320-285QF
APL5320-14QF
APL5320-18QF
APL5320-22QF
APL5320-26QF
APL5320-30QF
APL5320-34QF
APL5320-37QF
APL5320-15QF
APL5320-19QF
APL5320-23QF
APL5320-27QF
APL5320-31QF
APL5320-35QF
APL5320-475QF
0A
X
0B
X
0C
X
0D
X
0E
X
0F
X
0G
X
0H
X
0I
X
0J
X
0K
X
0L
X
0M
X
0N
X
0O
X
0P
X
0Q
X
0R
X
0S
X
0T
X
0g
X
0d
X
06
X
04
X
APL5320-36QF
Note : X - Code.
Copyright ã ANPEC Electronics Corp.
3
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Rev. A.9 - Mar., 2012
APL5320
Absolute Maximum Ratings (Note 1)
Symbol
Parameter
Rating
Unit
V
VIN
VIN to GND Voltage
-0.3 ~ 6.5
-0.3 ~ 6.5
VOUT
VSHDN
TJ
VOUT to GND Voltage
SHDN to GND Voltage
Maximum Junction Temperature
Storage Temperature
V
-0.3 ~ 6.5
-40 ~ 150
-65 ~ 150
260
V
oC
oC
oC
TSTG
TSDR
Maximum Lead Soldering Temperature, 10 Seconds
Note 1 : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Thermal Characteristics
Symbol
Parameter
Typical Value
Unit
Junction-to-Ambient Resistance in Free Air (Note 2)
SOT-23-5
TSOT-23-5
240
250
240
325
165
100
SOT-23-3
oC/W
qJA
SC-70-5
TDFN1.6x1.6-6
VTDFN1.2x1.6-4
Note 2 : qJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Recommended Operating Conditions (Note 3)
Symbol
Parameter
Range
Unit
VIN
VIN Input Voltage
SHDN Input Voltage
VOUT Output Current
Output Voltage
2.5 ~ 6
V
VSHDN
IOUT
2.5 ~ 6
0 ~300
V
mA
VOUT
COUT
TA
Fixed Voltage
1~22
Output Capacitor
mF
oC
oC
Ambient Temperature
Junction Temperature
-40 ~ 85
-40 ~ 125
TJ
Note 3 : Refer to the typical application circuit.
Electrical Characteristics
o
Unless otherwise specified, these specifications apply over VIN=VOUT+1V, CIN=COUT=1mF and TA=-40~85 C. Typical
values are at TA=25oC.
APL5320
Symbol
Parameter
Test Conditions
Unit
Min.
Typ.
Max.
UNDER-VOLTAGE LOCKAGE (UVLO) AND SUPPLY CURRENT
VIN UVLO Threshold Voltage
VIN UVLO Hysteresis
VIN rising, TA=-40~85oC
1.9
2.2
0.1
40
40
-
2.4
-
V
-
-
-
-
V
IOUT=0mA, VSHDN=5V
IOUT=300mA VSHDN=5V
VSHDN=0V, VIN= VOUT+1V
60
60
1
mA
mA
mA
IQ
Quiescent Current
IQSHDN
Shut Down Supply Current
Copyright ã ANPEC Electronics Corp.
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Rev. A.9 - Mar., 2012
APL5320
Electrical Characteristics (Cont.)
o
Unless otherwise specified, these specifications apply over VIN=VOUT+1V, CIN=COUT=1mF and TA=-40~85 C. Typical
values are at TA=25oC.
APL5320
Symbol
Parameter
Test Conditions
Unit
Min.
Typ.
Max.
OUTPUT VOLTAGE
IOUT=1mA, TA=25 oC
IOUT=1mA to 300mA, TA=-40~85oC
-2
-3
-
-
2
3
%
%
Output Voltage Accuracy
ΔVOUT%/ΔVIN, VOUT+0.3V<VIN<6V,
IOUT=1mA
REGLINE Line Regulation
-
-
-
-
0.2
0.6
%/V
%
ΔVOUT%, VIN= VOUT+1V,
0mA<IOUT<300mA
REGLOAD Load Regulation
VOUT=1.5V, IOUT=300mA
VOUT=2V, IOUT=300mA
VOUT=3V, IOUT=300mA
-
-
-
0.52
0.43
0.29
0.68
0.56
0.38
V
V
V
VDROP Dropout Voltage
OUTPUT VOLTAGE
PSRR Ripple Rejection
Output Noise
f=1kHz
-
-
-
-
-
70
63
-
-
-
-
-
dB
dB
COUT=1mF,
IOUT=50mA
f=10kHz
f=100kHz
f=10Hz to 100kHz, COUT=10mF, IOUT = 1mA
VSHDN=0V
35
dB
100
0.7
mVRMS
kW
VOUT Discharge Resistance
SHUT DOWN
High Threshold Voltage
VIN=2.5 to 6V
VIN=2.5 to 6V
VSHDN=5V
1.5
-
-
-
0.4
-
V
V
VSHDN
Low Threshold Voltage
SHDN Input Current
-
-
ISHDN
0.2
mA
PROTECTIONS
ILIMIT
Current-Limit Threshold
330
450
50
750
mA
mA
ms
oC
oC
ISHORT Short-Circuit Current
VOUT =0V
-
-
-
-
-
-
-
-
tSS
Soft-Start
60
VOUT rising from 0 to 90%, RLOAD=50W
TOTP
Over-Temperature Threshold
Over-Temperature Hysteresis
TJ rising
160
40
Copyright ã ANPEC Electronics Corp.
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Rev. A.9 - Mar., 2012
APL5320
Typical Operating Characteristics
Quiescent Current vs. Supply Voltage
Quiescent Current vs. Temperature
42
41
40
39
38
37
36
35
34
350
APL5320-12,
VIN=VEN=4.2V
300
250
200
150
100
50
0
-40 -25
0
25
50
75
100 125
0
1
2
3
4
5
6
Temperature (oC)
Supply Voltage (V)
PSRR vs. Frequency
Dropout Voltage vs. Output Current
0
-20
400
350
300
250
200
150
100
50
APL5320-30,
COUT=1mF
APL5320-12, VIN=4V,
COUT=1mF, IOUT=50mA
TJ=125oC
-40
TJ=25oC
-60
TJ=-40oC
-80
-100
0
100
1k
10k
100k
1M
300
0
100
200
Frequency (Hz)
Output Current (mA)
Output Noise
Current-Limit Threshold vs. Input Voltage
700
200
APL5320-12, IOUT=50mA,
VIN=VEN=4.2V(Battery)
650
600
550
500
450
400
100
0
-100
-200
0
20
40
60
80
100
2.5
3
3.5
4
4.5
5
5.5
6
Time (ms)
Input Voltage (V)
Copyright ã ANPEC Electronics Corp.
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Rev. A.9 - Mar., 2012
APL5320
Typical Operating Characteristics (Cont.)
Current-Limit Threshold vs. Temperature
Quiescent Current vs. Output Current
700
650
600
550
500
450
400
350
300
45
44.5
44
APL5320-12, COUT=1mF,
VIN=VEN=4.2V
43.5
43
42.5
42
-40 -25
0
25
50
75
100 125
0
50
100
150
200
250 300
Temperature (oC)
Output Current (mA)
SHDN Pin Threshold Voltage vs.
SupplyVoltage
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
SHDN Rising Threshold
SHDN Falling Threshold
6
2.5
3
3.5
4
4.5
5
5.5
Supply Voltage (V)
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Rev. A.9 - Mar., 2012
APL5320
Operating Waveforms
The test condition is VIN=4.2V, TA= 25oC unless otherwise specified.
Load Transient Response
Load Transient Response
VOUT
VOUT
1
1
IOUT
IOUT
2
2
VIN =4.2V, VOUT=1.2V, CIN =COUT =1mF,
VIN =4.2V, VOUT=1.2V, CIN =COUT =1mF,
IOUT =10mA to 300mA to 10mA (Rise/Falltim e=1ms)
IOUT =10mA to 150mA to 10mA (Rise/Falltim e=1ms)
CH1: VOUT, 50mV/Div, DC, Offset=1.2V
CH2: IOUT, 200mA/Div, DC
CH1: VOUT, 50mV/Div, DC, Offset=1.2V
CH2: IOUT, 100mA/Div, DC
TIME: 20ms/Div
TIME: 20ms/Div
Load Transient Response
Line Transient Response
VIN
VOUT
1
2
1
VOUT
IOUT
2
VIN =4.2V, VOUT=1.2V, CIN =COUT =1mF,
IOUT =10mA to 50mA to 10mA (Rise/Falltim e=1ms)
VIN =3.8V to 4.8V to 3.8V (Rise/Falltim e=4ms),
VOUT=1.2V, CIN =COUT =1mF, IOUT =100mA
CH1: VOUT, 20mV/Div, DC, Offset=1.2V
CH2: IOUT, 50mA/Div, DC
CH1: VIN, 500mV/Div, DC, Offset=3.8V
CH2: VOUT, 20mV/Div, DC, Offset=1.2V
TIME: 20ms/Div
TIME: 20ms/Div
Copyright ã ANPEC Electronics Corp.
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Rev. A.9 - Mar., 2012
APL5320
Operating Waveforms (Cont.)
The test condition is VIN=4.2V, TA= 25oC unless otherwise specified.
Line Transient Response
Line Transient Response
V
V
IN
IN
1
2
1
2
VOUT
VOUT
VIN =3.8V to 4.8V to 3.8V (Rise/Falltim e=4ms),
VOUT=1.2V, CIN =COUT =1mF, IOUT =50mA
VIN =3.8V to 4.8V to 3.8V (Rise/Falltim e=4ms),
VOUT=1.2V, CIN =COUT =1mF, IOUT =10mA
CH1: VIN, 500mV/Div, DC, Offset=3.8V
CH2: VOUT, 20mV/Div, DC, Offset=1.2V
CH1: VIN, 500mV/Div, DC, Offset=3.8V
CH2: VOUT, 20mV/Div, DC, Offset=1.2V
TIME: 20ms/Div
TIME: 20ms/Div
ExitingShutdown
Entering Shutdown
VSHDN
VSHDN
1
2
1
2
VOUT
VOUT
VIN =4.2V, VOUT=1.2V, CIN =COUT =1mF,
VIN =4.2V, VOUT=1.2V, CIN =COUT =1mF,
IOUT =10mA
IOUT =10mA
CH1: VSHDN, 2V/Div, DC
CH1: VSHDN, 2V/Div, DC
CH2: VOUT, 500mV/Div, DC
CH2: VOUT, 500mV/Div, DC
TIME: 10ms/Div
TIME: 20ms/Div
Copyright ã ANPEC Electronics Corp.
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Rev. A.9 - Mar., 2012
APL5320
Pin Description
PIN
NO.
FUNCTION
SOT-23-5/
NAME
TDFN
VTDFN
TSOT-23-5/ SOT-23-3
SC-70-5
1.6x1.6-6 1.2x1.6-4
1
2
3
1
3
6
4
2
VIN
Voltage Supply Input Pin.
Ground.
GND
Shut Down Control Pin. Logic high: enable; logic low: shutdown.
This pin can not be left floating.
3
-
1
3
SHDN
4
5
-
2, 5
4
-
NC
NC Pin.
2
1
VOUT
Regulator Output Pin.
Block Diagram
UVLO &
Shutdown
Logic
VIN
SHDN
Current-
Limit
-
+
Thermal
Shutdown
Foldback
VOUT
Current-Lim it
VREF
GND
Typical Application Circuit
APL5320
VOUT
VIN
VIN
VOUT
CIN
1mF
SHDN
COUT
1mF
GND
Enable
Shutdown
Copyright ã ANPEC Electronics Corp.
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Rev. A.9 - Mar., 2012
APL5320
Function Description
Internal Soft-Start
An internal soft-start function controls rising rate of the
output voltage to limit the surge current at start-up. The
typical soft-start interval is about 60ms.
Thermal Shutdown
A thermal shutdown circuit limits the junction tempera-
ture of APL5320. When the junction temperature exceeds
+160oC, a thermal sensor turns off the output PMOS, al-
lowing the device to cool down. The regulator regulates
the output again through initiation of a new soft-start cycle
after the junction temperature cools by 40oC.The thermal
shutdown is designed with a 40oC hysteresis to lower
the average junction temperature during continuous ther-
mal overload conditions, extending lifetime of the device.
For normal operation, device power dissipation should
be externally limited so that junction temperature will not
exceed 125oC.
Current-Limit with Current Foldback
The APL5320 monitors the current via the output PMOS
and limits the maximum current. When the output current
reaches the current-limit threshold, current-limit with cur-
rent foldback circuit starts to work to prevent load and
APL5320 from damages during overload or short-circuit
conditions. Typical foldback current is about 50mA.
Shutdown Control
The APL5320 has an active-low shutdown function. Forc-
ing SHDN high (>1.5V) enables the VOUT; forcing SHDN
low (<0.4V) disables the VOUT. The SHDN can not be left
floating. If it is not used, connect it to VIN for normal
operation.
Under-Voltage Lock Out (UVLO)
The APL5320 monitors the input voltage to prevent wrong
logic control. The UVLO function initiates a soft-start pro-
cess after input voltage exceeds its rising UVLO thresh-
old during power on. The UVLO function also shuts off
the output when the input voltage falls below it’s falling
threshold.
Copyright ã ANPEC Electronics Corp.
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Rev. A.9 - Mar., 2012
APL5320
Application Information
Input capacitor
Operation Region and Power Dissipation
The APL5320 requires proper input capacitors to supply
surge current during stepping load transients to prevent
the input rail from dropping. Because the parasitic induc-
tor from the voltage sources or other bulk capacitors to
the VIN limit the slew rate of the surge current, place the
Input capacitors near VIN as close as possible. Input
capacitors should be larger than 1mF and a minimum
ceramic capacitor of 1mF is necessary.
The APL5320 maximum power dissipation depends on
the thermal resistance and temperature difference be-
tween the die junction and ambient air. The TDFN1.6x1.6-6
package power dissipation PD across the device is:
PD = (TJ - TA) / qJA
where (TJ - TA) is the temperature difference between the
junction and ambient air. qJA is the thermal resistance
between Junction and ambient air. Assuming the TA=25oC
and maximum TJ=160oC (typical thermal limit threshold),
the maximum power dissipation is calculated as:
PD(max)=(160-25)/165=0.81(W)
Output Capacitor
The APL5320 needs a proper output capacitor to main-
tain circuit stability and improve transient response over-
temperature and current. In order to insure the circuit
stability, the proper output capacitor value should be larger
than 1mF. With X5R and X7R dielectrics, 1mF is sufficient
at all operating temperatures. Large output capacitor
value can reduce noise and improve load-transient re-
sponse and PSRR, Figure 1 shows the curves of allow-
able ESR range as the function of load current for various
output capacitor values.
For normal operation, do not exceed the maximum junc-
tion temperature rating of TJ=125oC. The calculated power
dissipation should be less than:
PD=(125-25)/165=0.6(W)
The GND provides an electrical connection to the ground
and channels heat away. Connect the GND to the ground
by using a large pad or a ground plane.
Layout Consideration
Figure 2 illustrates the layout. Below is a checklist for
your layout:
Region of Stable COUT ESR vs. Output Current
1. Please place the input capacitors close to the VIN.
2. Ceramic capacitors for load must be placed near the
load as close as possible.
10
APL5320-12
VIN=VEN=4.2V
CIN=COUT=1mF/X7R
1
3. To place APL5320 and output capacitors near the load
is good for performance.
Unstable Range
4. Large current paths, the bold lines in figure 2, must
have wide tracks.
0.1
Stable Range
VIN
VIN
0.01
VOUT
VOUT
SHDN
GND
ON
Simulation Verify
0.001
OFF
0
50
100
150
200
250
300
Output Current (mA)
Figure2. Large Current Paths Shown as Bold Lines
Figure1. Stable COUT ESR Range
Copyright ã ANPEC Electronics Corp.
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Rev. A.9 - Mar., 2012
APL5320
Application Information(Cont.)
Recommended Minimum Footprint
1.90
1.30
0.95
0.5
0.65
0.3
Unit:m m
Unit:m m
SOT-23-5/TSOT-23-5
SC-70-5
Therm alVia
Φ0.30m m
Therm alVia
Φ0.30m m
0.6
1.0
2.0
0.45
0.25
0.5
0.8
1.6
0.35
0.6
Unit:m m
VTDFN1.2x1.6-4
Unit:m m
TDFN1.6x1.6-6
Copyright ã ANPEC Electronics Corp.
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Rev. A.9 - Mar., 2012
APL5320
Package Information
SOT-23-5
D
e
SEE
VIEW A
b
c
e1
GAUGE PLANE
SEATING PLANE
L
VIEW A
SOT-23-5
S
Y
M
B
O
MILLIMETERS
INCHES
MIN.
MAX.
1.45
0.15
1.30
0.50
0.22
MIN.
MAX.
0.057
0.006
0.051
0.020
0.009
L
A
0.000
0.035
0.012
0.003
0.106
0.102
0.055
A1
A2
b
0.00
0.90
0.30
0.08
c
D
0.122
0.118
0.071
3.10
3.00
1.80
2.70
2.60
1.40
E
E1
e
e1
L
0.95 BSC
1.90 BSC
0.037 BSC
0.075 BSC
0.012
0.024
0.30
0.60
0
8
0
0
8
Note : 1. Follow JEDEC TO-178 AA.
2. Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
Copyright ã ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
14
www.anpec.com.tw
APL5320
Package Information
TSOT-23-5
D
e
SEE VIEW A
b
c
e1
GAUGE PLANE
SEATING PLANE
L
VIEW A
TSOT-23-5
S
Y
M
B
O
MILLIMETERS
INCHES
MIN.
0.70
0.01
0.70
0.30
0.08
MAX.
1.00
0.10
0.90
0.50
0.22
MIN.
MAX.
0.039
0.004
0.035
0.020
0.009
L
A
0.028
0.000
A1
A2
b
0.028
0.012
0.003
c
D
3.10
3.00
1.80
0.106
0.102
0.055
0.122
0.118
0.071
2.70
2.60
1.40
E
E1
e
e1
L
0.95 BSC
1.90BSC
0.037 BSC
0.075 BSC
0.012
0.024
0.30
0.60
8
0
0
0
8
Note : 1. Followed from JEDEC TO-178 AA.
2. Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per
side.
Copyright ã ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
15
www.anpec.com.tw
APL5320
Package Information
SC-70-5
D
e
SEE VIEW A
c
b
e1
GAUGE PLANE
SEATING PLANE
L
VIEW A
SC-70-5
S
Y
M
B
O
L
MILLIMETERS
MIN.
INCHES
MAX.
1.10
0.10
1.00
0.30
0.25
2.20
2.40
1.35
MIN.
MAX.
0.043
0.004
0.040
0.012
0.010
0.087
0.095
0.053
A
0.80
0.00
0.80
0.15
0.08
1.90
2.00
1.15
0.031
0.000
0.031
0.006
0.003
A1
A2
b
c
D
0.075
0.079
0.045
E
E1
e
0.65 BSC
1.30 BSC
0.026 BSC
0.051 BSC
e1
L
0.006
0o
0.018
8o
0.15
0.45
8o
0o
0
Note : 1. Followed from JEDEC MO-223 AB.
2. Dimension D and E1 do not include mold flash, protrusions or gate burrs.
Mold flash, protrusion or gate burrs shall not exceed 6 mil per side.
Copyright ã ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
16
www.anpec.com.tw
APL5320
Package Information
SOT-23-3
D
e
SEE
VIEW A
c
b
e1
GAUGE PLANE
SEATING PLANE
L
VIEW A
SOT-23-3
S
Y
M
B
O
MILLIMETERS
MIN. MAX.
INCHES
MIN.
MAX.
0.057
0.006
0.051
0.020
0.009
L
A
1.45
0.15
1.30
0.50
0.22
0.000
0.035
0.012
0.003
A1
A2
b
0.00
0.90
0.30
0.08
c
D
3.10
3.00
1.80
2.70
2.60
1.40
0.106
0.102
0.055
0.122
0.118
0.071
E
E1
e
e1
L
0.95 BSC
1.90 BSC
0.037 BSC
0.075 BSC
0.012
0.024
0.30
0.60
0
0
8
0
8
Note : Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
Copyright ã ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
17
www.anpec.com.tw
APL5320
Package Information
TDFN1.6x1.6-6
D
A
Pin 1
A1
D2
A3
Pin 1 Corner
e
S
Y
TDFN1.6x1.6-6
M
B
O
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
0.031
0.002
L
A
0.70
0.00
0.80
0.05
0.028
0.000
A1
A3
b
0.20 REF
0.008 REF
0.008
0.061
0.037
0.061
0.022
0.012
0.065
0.041
0.065
0.026
0.20
1.55
0.95
1.55
0.55
0.30
1.65
1.05
1.65
D
D2
E
E2
0.65
e
K
L
0.50 BSC
0.020 BSC
0.008
0.007
-
0.20
0.19
-
0.011
0.29
Copyright ã ANPEC Electronics Corp.
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Rev. A.9 - Mar., 2012
APL5320
Package Information
VTDFN1.2x1.6-4
D
A
Pin 1 Cirner
D2
K
L
VTDFN1.2x1.6-4
S
Y
M
B
O
MILLIMETERS
MIN. MAX.
INCHES
MIN.
MAX.
0.024
0.014
0.065
0.030
0.049
0.041
L
A
0.50
0.25
0.60
0.35
1.65
0.75
1.25
1.05
0.020
0.010
0.061
0.026
0.045
0.037
b
D
1.55
0.65
1.15
0.95
D2
E
E2
e
0.60 BSC
0.024 BSC
0.004
0.008
0.012
L
0.10
0.20
0.30
K
Copyright ã ANPEC Electronics Corp.
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Rev. A.9 - Mar., 2012
APL5320
Carrier Tape & Reel Dimensions
P0
P2
P1
OD0
A
K0
A0
A
OD1
B
B
SECTION A-A
SECTION B-B
d
T1
Application
SOT-23-5
A
H
T1
8.4+2.00 13.0+0.50
-0.00 -0.20
P2 D0
C
d
D
W
E1
8.0±0.30 1.75±0.10
A0 B0
F
3.5±0.05
K0
178.0±2.00 50 MIN.
1.5 MIN.
D1
20.2 MIN.
P0
4.0±0.10
A
P1
4.0±0.10
H
T
1.5+0.10
-0.00
0.6+0.00
-0.40
2.0±0.05
1.0 MIN.
d
3.20±0.20 3.10±0.20 1.50±0.20
Application
TSOT-23-5
Application
SOT-23-3
T1
C
D
20.2 MIN.
T
W
E1
8.0±0.30 1.75±0.10
A0 B0
F
3.5±0.05
K0
8.4+2.00 13.0+0.50
-0.00 -0.20
178.0±2.00 50 MIN.
1.5 MIN.
D1
P0
4.0±0.10
A
P1
4.0±0.10
H
P2 D0
1.5+0.10
-0.00
0.6+0.00
-0.40
2.0±0.05
1.0 MIN.
d
3.20±0.20 3.10±0.20 1.50±0.20
T1
C
D
20.2 MIN.
T
W
E1
8.0±0.30 1.75±0.10
A0 B0
F
3.5±0.05
K0
8.4+2.00 13.0+0.50
-0.00 -0.20
178.0±2.00 50 MIN.
1.5 MIN.
D1
P0
P1
P2 D0
1.5+0.10
-0.00
0.6+0.00
-0.40
4.0±0.10
4.0±0.10
2.0±0.05
1.0 MIN.
3.20±0.20 3.10±0.20 1.50±0.20
(mm)
Copyright ã ANPEC Electronics Corp.
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Rev. A.9 - Mar., 2012
APL5320
Carrier Tape & Reel Dimensions (Cont.)
Application
A
H
T1
8.4+2.00 13.0+0.50
-0.00 -0.20
P2 D0
C
d
1.5 MIN.
D1
D
W
E1
F
178.0±2.00 50 MIN.
20.2 MIN. 8.0±0.30 1.75±0.10 3.50±0.05
SC-70-5
P0
4.0±0.10
A
P1
4.0±0.10
H
T
A0
B0
K0
1.5+0.10
-0.00
0.6+0.00
-0.40
2.0±0.05
1.00 MIN.
d
2.40±0.20 2.40±0.20 1.20±0.20
Application
TDFN1.6x1.6-6
Application
VTDFN1.2x1.6-4
T1
C
D
W
E1
F
3.5±0.05
K0
8.4+2.00 13.0+0.50
-0.00 -0.20
178.0±2.00 50 MIN.
1.5 MIN.
D1
20.2 MIN. 8.0±0.30 1.75±0.10
P0
4.0±0.10
A
P1
4.0±0.10
H
P2 D0
T
A0
B0
1.5+0.10
-0.00
0.6+0.00
-0.40
2.0±0.05
1.5 MIN.
d
1.70±0.20 1.70±0.20 0.90±0.20
E1
T1
C
D
W
F
8.4+2.00 13.0+0.50
-0.00 -0.20
178.0±2.00 50 MIN.
1.5 MIN.
D1
20.2 MIN. 8.0±0.20 1.75±0.10 3.50±0.05
P0
P1
P2 D0
T
A0
B0
K0
1.5+0.10
-0.00
0.6+0.00
-0.4
4.0±0.10
4.0±0.10
2.0±0.05
1.5 MIN.
1.4 MIN
1.8 MIN
0.75±0.20
(mm)
Devices Per Unit
Package Type
Unit
Quantity
SOT-23-5
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
3000
3000
3000
3000
3000
3000
TSOT-23-5
SOT-23-3
SC-70-5
TDFN1.6x1.6-6
VTDFN1.2x1.6-4
Taping Direction Information
(T)SOT-23-5
USER DIRECTION OF FEED
Copyright ã ANPEC Electronics Corp.
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Rev. A.9 - Mar., 2012
APL5320
Taping Direction Information (Cont.)
SOT-23-3
USER DIRECTION OF FEED
SC-70-5
USER DIRECTION OF FEED
TDFN1.6x1.6-6
USER DIRECTION OF FEED
Copyright ã ANPEC Electronics Corp.
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Rev. A.9 - Mar., 2012
APL5320
Taping Direction Information (Cont.)
VTDFN1.2x1.6-4
USER DIRECTION OF FEED
Classification Profile
Copyright ã ANPEC Electronics Corp.
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Rev. A.9 - Mar., 2012
APL5320
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
Preheat & Soak
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
Temperature min (Tsmin
)
Temperature max (Tsmax
)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
3 °C/second max.
3 °C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
183 °C
60-150 seconds
217 °C
60-150 seconds
Peak package body Temperature
(Tp)*
See Classification Temp in table 1
20** seconds
See Classification Temp in table 2
30** seconds
Time (tP)** within 5°C of the specified
classification temperature (Tc)
Average ramp-down rate (Tp to Tsmax
)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Volume mm3
350
Package
Thickness
<2.5 mm
³ 2.5 mm
Volume mm3
<350
235 °C
220 °C
220 °C
220 °C
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
Volume mm3
Volume mm3
350-2000
260 °C
Volume mm3
<350
260 °C
260 °C
250 °C
>2000
260 °C
245 °C
245 °C
1.6 mm – 2.5 mm
³ 2.5 mm
250 °C
245 °C
Reliability Test Program
Test item
SOLDERABILITY
HOLT
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
Description
5 Sec, 245°C
1000 Hrs, Bias @ Tj=125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
PCT
TCT
HBM
MM
VMM≧200V
10ms, 1tr≧100mA
Latch-Up
Copyright ã ANPEC Electronics Corp.
24
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Rev. A.9 - Mar., 2012
APL5320
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright ã ANPEC Electronics Corp.
Rev. A.9 - Mar., 2012
25
www.anpec.com.tw
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