APL5312_09 [ANPEC]
Ultra-Low-Noise, High PSRR, Low-Dropout, 300mA Linear Regulator; 超低噪声，高PSRR ，低压差， 300毫安线性稳压器
| 型号： | APL5312_09 |
| 厂家： | 
ANPEC ELECTRONICS COROPRATION |
| 描述： | Ultra-Low-Noise, High PSRR, Low-Dropout, 300mA Linear Regulator |
| 文件： | 总15页 (文件大小：238K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
APL5312
Ultra-Low-Noise, High PSRR, Low-Dropout, 300mA Linear Regulator
Features
General Description
The APL5312 is an ultra low noise, low dropout linear
regulator, which operates from 2.3V to 6V input voltage
and delivers up to 300mA. Typical dropout voltage is only
290mV at 300mA loading. Designed for use in RF
applications, the high PSRR 74dB and low noise 36mVRMS
makes it an ideal choice.
·
·
·
Wide Operating Voltage: 2.3V~6V
Low Dropout Voltage: 290mV @ 3V/300mA
Fixed Output Voltages: 1.5V~3.5V with Step 100mV,
2.85V
·
·
·
·
·
·
·
·
·
·
Guaranteed 300mA Output Current
High PSRR: 74dB before 10kHz
Low Output Noise: 36mVRMS at 100Hz to 100kHz
Current-Limit Protection
Design with an internal P-channel MOSET pass element,
the APL5312 maintains a low supply current, indepen-
dent of the load current and dropout voltage. Other fea-
tures include thermal-shutdown protection and current-
limit protection to ensure specified output current and
controlled short-circuit current. The APL5312 regulator
comes in a miniature SOT-23-5 and SC-70-5 package.
Controlled Short Circuit Current: 50mA
Over-Temperature Protection
Stable with 1mF Capacitor for Any Load
Excellent Load/Line Transient
SOT-23-5 and SC-70-5 Packages
Lead Free and Green Devices Available
(RoHS Compliant)
Pin Configuration
SOT-23-5/SC-70-5
1
2
3
VIN
VOUT
BP
5
4
Applications
GND
·
·
·
·
Cellular Phones
SHDN
Portable and Battery-Powered Equipment
Wireless LANs
GPS
APL5312
Ordering and Marking Information
Package Code
APL5312
B : SOT-23-5 S5 : SC-70-5
Operating Ambient Temperature Range
I : -40 to 85oC
Assembly Material
Handling Code
Handling Code
TR : Tape & Reel
Voltage Code
15 : 1.5V 30 : 3.0V
Assembly Material
Temperature Range
Package Code
Voltage Code
G : Halogen and Lead Free Device
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright ã ANPEC Electronics Corp.
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Rev. A.4 - Jun., 2009
APL5312
Ordering and Marking Information (Cont.)
SOT-23-5 packages
Product Name Marking Product Name Marking Product Name Marking Product Name
Marking
33CX
33GX
33KX
APL5312-15B
APL5312-19B
APL5312-23B
APL5312-27B
APL5312-31B
APL5312-35B
339X
33DX
33HX
33LX
33PX
33TX
APL5312-16B
APL5312-20B
APL5312-24B
APL5312-28B
APL5312-32B
APL5312-285B
33AX
33EX
33IX
APL5312-17B
APL5312-21B
APL5312-25B
APL5312-29B
APL5312-33B
33BX
33FX
33JX
33NX
33RX
APL5312-18B
APL5312-22B
APL5312-26B
APL5312-30B
APL5312-34B
33MX
33QX
33dX
33OX
33SX
SC-70-5 packages
Product Name Marking Product Name Marking Product Name Marking Product Name Marking
APL5312-15S5
APL5312-19S5
APL5312-23S5
APL5312-27S5
APL5312-31S5
APL5312-35S5
339
33D
33H
33L
33P
33T
APL5312-16S5
APL5312-20S5
APL5312-24S5
APL5312-28S5
APL5312-32S5
APL5312-285S5
33A
33E
33I
APL5312-17S5
APL5312-21S5
APL5312-25S5
APL5312-29S5
APL5312-33S5
33B
33F
33J
33N
33R
APL5312-18S5
APL5312-22S5
APL5312-26S5
APL5312-30S5
APL5312-34S5
33C
33G
33K
33O
33S
33M
33Q
33d
Absolute Maximum Ratings (Note 1)
Symbol
VIN, VOUT
SHDN/BP
TJ
Parameter
Rating
6.5
Unit
V
Input Voltage or Out Voltage
VOUT Shutdown Control Pin/Bypass Signal Pin
Operating Junction Temperature
6.5
V
°C
°C
°C
0 to 125
-65 to +150
260
TSTG
Storage Temperature Range
TSDR
Maximum Lead Temperature Soldering, 10 Seconds
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Thermal Characteristics
Symbol
Parameter
Rating
Unit
Thermal Resistance-Junction to Ambient (Note 2)
SOT-23-5
SC-70-5
240
325
oC/W
qJA
Power Dissipation, TA = 25 oC (Note 3)
PD
SOT-23-5
SC-70-5
410
310
mW
Note 2 : qJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Note 3 : When mounted on a (Copper foil area 50%, 45x45x1.6tmm) glass epoxy board.
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Rev. A.4 - Jun., 2009
APL5312
Electrical Characteristics
Unless otherwise noted these specifications apply over full temperature, VIN = VOUT+1V, CIN = COUT = 1m F, TA = -40 to 85°C. Typical
values refer to TA = 25°C.
APL5312
Symbol
Parameter
Input Voltage
Test Conditions
Unit
Min.
Typ.
-
Max.
6
VIN
2.3
V
%
VOUT
Output Voltage Accuracy
Output Voltage Range
Circuit Current Limit
VIN = 5V
-2
-
2
1.5
-
3.5
550
160
160
-
V
ILIMIT
IQ
450
500
120
120
300
0.1
0.8
520
430
290
73
mA
IOUT = 0mA
-
-
-
-
-
-
-
-
-
-
-
-
Quiescent Current
mA
IOUT = 300mA
IOUT
Load Current
mA
%
REGLINE Line Regulation
REGLOAD Load Regulation
VOUT+0.5V<VIN<6V, IOUT = 10mA
VIN = VOUT+1V, 0mA<IOUT<300mA
VOUT =1.5V, IOUT = 300mA
VOUT = 2V, IOUT = 300mA
0.3
1.5
680
560
380
-
%
VDROP
Dropout Voltage (Note 4)
mV
dB
VOUT = 3V, IOUT = 300mA
f = 1kHz, CBP=10nF, IOUT=10mA
f = 10kHz, CBP=10nF, IOUT = 10mA
f = 100kHz, CBP = 10nF, IOUT = 10mA
VOUT = 0V
Ripple Rejection
Short Current
PSRR
ISHORT
74
-
55
-
50
-
mA
f = 100Hz to 100kHz, CBP = 10nF,
IOUT = 10mA
Noise
-
36
-
-
mVRMS
High Threshold Voltage
1.6
VIN+0.3
VSHDN
V
Low Threshold Voltage
-0.3
-
-
0.4
1
Shutdown Input Bias Current
0.1
mA
mA
ISHDN
VSHDN = VIN
IQSHDN
Shutdown Supply Current
-
0.1
1
SHDN = Low, VIN = VOUT+1V
VOUT = 90%, RLOAD = 50W
TEXIT
Shutdown Exit Delay
-
-
100
160
-
-
mS
°C
Over Temperature Shutdown
OTS
Over Temperature Shutdown
Hysteresis
°C
-
-
20
-
-
Output Voltage Temperature
Coefficient
TJ = -40~125°C
ppm/°C
TC
100
Output Capacitor
ESR
-
1
-
-
mF
COUT
0.025
1
W
Note 4 : Dropout voltage definition: VIN-VOUT when VOUT is 2% below the value of VOUT for VIN= VOUT +1V.
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Rev. A.4 - Jun., 2009
APL5312
Typical Operating Characteristics
Quiescent Current vs. Ambient Temperature
Quiescent Current vs. Output Current
180
160
140
120
100
80
125
120
115
110
105
100
VIN=5.5V
VIN=4.5V
60
-40
-15
10
35
60
85
0
50
100
150
200
250
300
Ambient Temperature (°C)
Output Current (mA)
Quiescent Current vs. Input Voltage
Dropout Voltage vs.Output Current
VOUT=2.5V
200
180
160
140
120
100
80
400
350
300
250
200
150
100
50
TA=85 oC
TA=25 oC
60
40
20
0
0
0
1
2
3
4
5
6
0
50
100
150
200
250
300
Input Voltage (V)
Output Current (mA)
Dropout Voltage vs. Output Current
Shutdown Exit Delay
140
120
100
80
600
500
400
300
200
100
0
CBP=10nF
VOUT=1.5V
60
VOUT=2.2V
40
VOUT=3.3V
20
0
0
50
100
150
200
250
300
1.5
1.8
2.1
2.4
2.7
3
3.3
Output Current (mA)
Output Voltage (V)
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Rev. A.4 - Jun., 2009
APL5312
Typical Operating Characteristics (Cont.)
PSRR vs. Frequency
Current Limit vs. Input Voltage
560
-20
IOUT=10mA
540
-30
TA=25oC
TA=85oC
520
-40
-50
-60
-70
-80
500
480
460
440
420
400
VIN=5V
VIN=4.5V
-90
-100
-110
4
4.5
5
5.5
6
20
100
1k
10k
100k 200k
Frequency (Hz)
Input Voltage (V)
Maximun Power Dissipation vs. Ambient
Temperature
Output Noise vs. BP Capacitance
160
140
120
100
80
450
400
350
300
250
200
150
100
SOT-23-5
SC-70-5
60
IOUT=100mA
40
IOUT=10mA
20
50
0
0
1
10
100
0
25
50
75
100
125
BP Capacitance (nF)
Ambient Temperature (°C)
Region of Stable COUT ESR vs. Load Current
100
10
VOUT=2.5V
CIN=COUT=1mF, Y5V
Instable
1
0.1
0.01
Stable
Instable
0
50
100
150
200
250
300
Output Current (mA)
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Rev. A.4 - Jun., 2009
APL5312
Typical Operating Characteristics (Cont.)
Load Transient
Line Transient
V
(50mV/div)
OUT
V =4.5V~5.5V
IN
IOUT(1~300mA)
V
(50mV/div)
OUT
T =1ms
r
I=10mA
OUT
Time (0.1ms/div)
Time (0.1ms/div)
Exiting Shutdown Waveform
Entering Shutdown Delay
IOU =100mA
T
C =10nF
BP
IOUT=100mA
CBP=10nF
SHDN (1V/div)
SHDN (1V/div)
VOUT (1V/div)
VOUT (1V/div)
Time (50ms/div)
Time (0.1ms/div)
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Rev. A.4 - Jun., 2009
APL5312
Pin Description
PIN
I/O
FUNCTION
NO.
1
NAME
VIN
I
Voltage supply input pin
GND pin
2
GND
SHDN
BP
3
I
I
Shutdown control pin, low = off, high = normal
Bypass signal pin in fixed output type device
Regulator output pin
4
5
VOUT
O
Block Diagram
VIN
Thermal Shutdown
& Current Limit
SHDN
Shutdown
VREF
_
BP
MOS Driver
+
VOUT
GND
Typical Application Circuit
VIN
VOUT
BP
APL5312
SHDN
COUT
CIN
1mF
GND
1mF
CBP
10nF
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Rev. A.4 - Jun., 2009
APL5312
Application Information
Output Voltage Selection
rent can reduce to 0.1mA. The SHDN pin cannot be floating,
a floating SHDN pin may cause an indeterminate state
on the output. If it is no use, connect to VIN for normal
operation.
The APL5312 are supplied with factory-set output volt-
ages from 1.5V to 3.5V.
Capacitor Selection and Regulation Stability
Input-Output (Dropout) Voltage
The APL5312 uses at least a 1mF capacitor on the input.
This capacitor can use Aluminum, Tantalum, or Ceramic
capacitors. Input capacitor with large value and low ESR
provides better PSRR and line-transient response. The
output capacitor also can use Aluminum, Tantalum, or
Ceramic capacitor, and its proper values is at least 1mF,
ESR must be above 25mW. Large output capacitor val-
ues can reduce noise and improve load-transient
response, stability, and PSRR. With X5R and Y5V
dielectrics, 1mF is sufficient at all operating temperatures.
The selection of output capacitor’s is important because
it with COUT form a zero to provide the sufficient phase
margin (see the Figure COUT ESR vs. Load Current).
The minimum input-output voltage differential (dropout)
determines the lowest usable supply voltage. The drop-
out voltage is a function of drain-to-source on resistance
multiplied by the load current.
Current Limit
APL5312 includes a current-limit circuitry for linear
regulator. The current-limit protection, which senses the
current flowing to the P-channel MOSFET, and controls
the output voltage. The point where limiting occurs is
IOUT =500mA. The output can be shortened to the ground
for an indefinite amount of time without damaging to the
part.
Thermal Protection
Bypass Capacitor
Thermal protection limits total power dissipation in the
APL5312. When the junction temperature exceeds
+160°C, the thermal sensor generates a logic signal to
turn off the pass element and let IC to cool. When the IC’s
junction temperature cools down by 20°C, the thermal
sensor will turn the pass element on again, resulting in a
pulsed output during continuous thermal protection. Ther-
mal protection is designed to protect the IC in the event of
fault conditions.
Use a 10nF bypass capacitor at BP for low-output voltage
noise. The leakage current going into the BP pin should
be less than 10nA. Increasing the capacitance slightly
decreases the output noise. Value above 0.1mF and be-
low 1nF are not recommended (see the Figure Output
Noise vs. BP Capacitance).
Noise, PSRR, and Load-Transient Response
The APL5312 is designed to deliver ultra-low noise and
high PSRR, as well as low dropout and low quiescent
currents in battery–powered systems. When operating
from sources other than batteries, improve PSRR and
transient response can be achieved by increasing input
and output capacitors, and bypass capacitor to form the
passive filtering techniques (see Output Noise vs. BP
Capacitance).
Operating Region and Power Dissipation
The thermal resistance of the case and circuit board,
ambient and junction air temperature, and the rate of air
flow all control the APL5312’s maximum power
dissipation. The power dissipation across the device is
P = IOUT (VIN-VOUT). The maximum power dissipation is:
PMAX = (TJ - TA) / (qJC + qCA
qJA = qJC + qCA
)
Shutdown
The APL5312 has an active high enable function. Force
SHDN high (>1.6V) enables the VOUT, SHDN low (<0.4V) dis-
ables the VOUT. Enter the shutdown mode, it also causes
the output voltage to discharge through a 500W resis-
tance to ground. In shutdown mode, the quiescent cur-
where TJ - TA is the temperature difference between the
junction and ambient air.
qJC is the thermal resistance of the package, qCA is the
thermal resistance through the printed circuit board, cop-
per traces, and other materials to the surrounding air, qJA
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Rev. A.4 - Jun., 2009
APL5312
Application Information (Cont.)
Operating Region and Power Dissipation (Cont.)
is the thermal resistance between Junction and ambient
air. For continual operation, do not exceed the absolute
maximum junction Temperature rating of TJ = 125°C.
For example:
The SOT-23-5 package has maximum power dissipa-
tion 300mW at TA= 55°C, relatively 225mW at SC-70-5
package (see Maximum Power Dissipation vs. Ambient
Temperature).
VIN = 5V, IOUT = 250mA, VOUT = 3.3V,
PD = (5-3.3)V x 150mA = 255mW
According the power dissipation issue, we should adapt
the SOT-23-5 package. It could reduce the thermal
resistance to maintain the IC longer life.
The GND pin provides an electrical connection to the
ground and channeling heat away. The printed circuit
board (PCB) forms a heat sink and dissipates most of
the heat into ambient air.
Recommended Minimum Footprint
SOT-23-5
0.076
SC-70-5
0.052
0.026
0.016
Unit : Inch
0.038
0.02
Unit : Inch
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Rev. A.4 - Jun., 2009
APL5312
Package Information
SOT-23-5
D
e
SEE
VIEW A
b
c
e1
GAUGE PLANE
SEATING PLANE
L
VIEW A
SOT-23-5
S
Y
M
B
O
L
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
0.057
0.006
0.051
0.020
0.009
A
1.45
0.15
1.30
0.50
0.22
3.10
3.00
1.80
0.000
0.035
0.012
0.003
0.106
0.102
0.055
A1
A2
b
0.00
0.90
0.30
0.08
c
D
0.122
0.118
0.071
2.70
2.60
1.40
E
E1
e
e1
L
0.95 BSC
1.90 BSC
0.037 BSC
0.075 BSC
0.012
0.024
0.30
0.60
0
8
0
0°
8°
Note : 1. Follow JEDEC TO-178 AA.
2. Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
Copyright ã ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
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APL5312
Package Information
SC-70-5
D
e
SEE VIEW A
c
b
e1
GAUGE PLANE
SEATING PLANE
L
VIEW A
SC-70-5
S
Y
M
B
O
L
MILLIMETERS
MIN.
INCHES
MAX.
1.10
0.10
1.00
0.30
0.25
2.20
2.40
1.35
MIN.
MAX.
0.043
0.004
0.040
0.012
0.010
0.087
0.095
0.053
A
0.80
0.031
0.000
0.031
0.006
0.003
A1
A2
b
0.00
0.80
0.15
0.08
1.90
2.00
1.15
c
D
0.075
0.079
0.045
E
E1
e
0.65 BSC
1.30 BSC
0.026 BSC
0.051 BSC
e1
L
0.006
0o
0.018
8o
0.15
0.45
8o
0o
0
Note : 1. Followed from JEDEC MO-223 AB.
2. Dimension D and E1 do not include mold flash, protrusions or gate burrs.
Mold flash, protrusion or gate burrs shall not exceed 6 mil per side.
Copyright ã ANPEC Electronics Corp.
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APL5312
Carrier Tape & Reel Dimensions
P0
P2
P1
OD0
A
K0
A0
A
OD1
B
B
SECTION A-A
SECTION B-B
d
T1
Application
SOT-23-5
Application
SC-70-5
A
H
T1
C
d
D
W
E1
8.0±0.30 1.75±0.10
A0 B0
F
3.5±0.05
K0
8.4+2.00
-0.00
13.0+0.50
-0.20
178.0±2.00 50 MIN.
1.5 MIN.
D1
20.2 MIN.
P0
4.0±0.10
A
P1
4.0±0.10
H
P2
2.0±0.05
T1
D0
T
1.5+0.10
-0.00
0.6+0.00
-0.40
1.0 MIN.
d
3.20±0.20 3.10±0.20 1.50±0.20
C
D
20.2 MIN.
T
W
E1
8.0±0.30 1.75±0.10
A0 B0
F
3.50±0.05
K0
8.4+2.00
-0.00
13.0+0.50
-0.20
178.0±2.00 50 MIN.
1.5 MIN.
D1
P0
P1
P2
D0
1.5+0.10
-0.00
0.6+0.00
-0.40
4.0±0.10
4.0±0.10
2.0±0.05
1.00 MIN.
2.40±0.20 2.40±0.20 1.20±0.20
(mm)
Devices Per Unit
Package Type
SOT-23-5
Unit
Quantity
Tape & Reel
Tape & Reel
3000
3000
SC-70-5
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Rev. A.4 - Jun., 2009
APL5312
Taping Direction Information
SOT-23-5
USER DIRECTION OF FEED
SC-70-5
USER DIRECTION OF FEED
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Rev. A.4 - Jun., 2009
APL5312
Classification Profile
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
Preheat & Soak
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
Temperature min (Tsmin
)
Temperature max (Tsmax
)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
3 °C/second max.
3°C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
183 °C
60-150 seconds
217 °C
60-150 seconds
Peak package body Temperature
(Tp)*
See Classification Temp in table 1
20** seconds
See Classification Temp in table 2
30** seconds
Time (tP)** within 5°C of the specified
classification temperature (Tc)
Average ramp-down rate (Tp to Tsmax
)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
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Rev. A.4 - Jun., 2009
APL5312
Classification Reflow Profiles (Cont.)
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Volume mm3
350
Package
Thickness
<2.5 mm
³ 2.5 mm
Volume mm3
<350
235 °C
220 °C
220 °C
220 °C
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
Volume mm3
Volume mm3
350-2000
260 °C
Volume mm3
<350
260 °C
260 °C
250 °C
>2000
260 °C
245 °C
245 °C
1.6 mm – 2.5 mm
³ 2.5 mm
250 °C
245 °C
Reliability Test Program
Test item
SOLDERABILITY
HOLT
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
Description
5 Sec, 245°C
1000 Hrs, Bias @ 125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
PCT
TCT
HBM
MM
VMM≧200V
10ms, 1tr≧100mA
Latch-Up
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright ã ANPEC Electronics Corp.
Rev. A.4 - Jun., 2009
15
www.anpec.com.tw
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