APL5312-22S5I-TRL [ANPEC]
Ultra-Low-Noise, High PSRR, Low-Dropout, 300mA Linear Regulator; 超低噪声，高PSRR ，低压差， 300毫安线性稳压器
| 型号： | APL5312-22S5I-TRL |
| 厂家： | 
ANPEC ELECTRONICS COROPRATION |
| 描述： | Ultra-Low-Noise, High PSRR, Low-Dropout, 300mA Linear Regulator |
| 文件： | 总15页 (文件大小：258K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
APL5312
Ultra-Low-Noise, High PSRR, Low-Dropout, 300mA Linear Regulator
Features
General Description
The APL5312 is a ultra low noise, low dropout linear
regulator, which operate from 2.3V to 6V input voltage
and deliver up to 300mA. Typical dropout voltage is
only 290mV at 300mA loading. Designed for use in
RF applications, the high PSRR 74dB and low noise
36mVRMS makes it an ideal choice.
·
·
·
Wide Operating Voltage: 2.3V~6V
Low Dropout Voltage: 290mV @ 3V/300mA
Fixed Output Voltages: 1.5V~3.5V
with step 100mV, 2.85V
·
·
·
Guaranteed 300mA Output Current
High PSRR: 74dB before 10KHz
Low Output Noise: 36mVRMS at 100Hz
to 100KHz
Design with an internal P-channel MOSET pass
element, the APL5312 maintain a low supply current,
independent of the load current and dropout voltage.
Other features include thermal-shutdown protection
and current limit protection to ensure specified output
current and controlled short-circuit current. The
APL5312 regulator come in a miniature SOT23-5 and
SC70-5 package.
·
·
·
·
·
Current Limit Protection
Controlled Short Circuit Current: 50mA
OverTemperature Protection
Stable with 1mF Capacitor for Any Load
Excellent Load/Line Transient
·
·
SOT23-5 and SC70-5 Packages
Pin Configuration
Lead FreeAvailable (RoHSCompliant)
SOT23-5/
SC70-5
Applications
1
2
3
V IN
GND
V OUT
BP
5
4
·
·
·
·
Cellular Phones
Portable and Battery-Powered Equipment
SHDN
Wireless LANs
GPS
APL5312
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
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Rev. A.1 - Sep., 2005
APL5312
Ordering and Marking Information
Package Code
B : SOT23-5
APL5312
S5 : SC70-5
Operating Ambient Temp. Range
Lead Free Code
Handling Code
°
I : -40 to 85 C
Handling Code
TR : Tape & Reel
Voltage Code
Temp. Range
Package Code
Voltage Code
15 : 1.5V
30 : 3.0V
Lead Free Code
L : Lead Free Device
Blank : Original Device
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate
termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering
operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C
for MSL classification at lead-free peak reflow temperature.
SOT23-5 packages
Product Name Marking Product Name Marking Product Name Marking Product Name Marking
APL5312-15/B 339X
APL5312-19/B 33DX APL5312-20/B 33EX APL5312-21/B 33FX APL5312-22/B
APL5312-23/B 33HX APL5312-24/B 33IX APL5312-25/B 33JX APL5312-26/B
APL5312-27/B 33LX APL5312-28/B 33MX APL5312-29/B 33NX APL5312-30/B
APL5312-31/B 33PX APL5312-32/B 33QX APL5312-33/B 33RX APL5312-34/B
APL5312-16/B 33AX APL5312-17/B 33BX APL5312-18/B
33CX
33GX
33KX
33OX
33SX
APL5312-35/B 33TX APL5312-285/B
33a X
SC70-5 packages
Product Name Marking Product Name Marking Product Name Marking Product Name Marking
APL5312-15/S5
APL5312-19/S5
APL5312-23/S5
APL5312-27/S5
APL5312-31/S5
APL5312-35/S5
339 APL5312-16/S5 33A APL5312-17/S5
33D APL5312-20/S5 33E APL5312-21/S5
33B APL5312-18/S5 33C
33F
33J
APL5312-22/S5 33G
APL5312-26/S5 33K
33H APL5312-24/S5
33I
APL5312-25/S5
33L APL5312-28/S5 33M APL5312-29/S5
33P APL5312-32/S5 33Q APL5312-33/S5
33N APL5312-30/S5 33O
33R APL5312-34/S5 33S
APL5312-285/S
33T
a
33
Pin Description
PIN
I/O
Description
No.
1
Name
Voltage supply input pin
GND pin
IN
V
I
2
GND
SHDN
BP
Shutdown control pin, low = off, high = normal
Bypass signal pin in fixed output type device
Regulator output pin
3
I
I
4
OUT
5
V
O
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Rev. A.1 - Sep., 2005
APL5312
Block Diagram
VIN
ThermalShutdown
& Current Limit
SHDN
BP
Shutdown
_
+
VREF
MOSDriver
VOUT
GND
Absolute Maximum Ratings
Symbol
Parameter
Rating
6.5
Unit
IN
OUT
V , V
Input Voltage or Out Voltage
V
V
OUT
SHDN/BP V
Shutdown Control Pin/Bypass Signal Pin
6.5
Thermal Resistance-Junction to Ambient (Note)
°
C /W
TH,JA
R
SOT23-5
SC70-5
240
325
A
°
Power Dissipation, T = 25 C (Note)
PD
410
310
mW
SOT23-5
SC70-5
°
C
J
T
Operating Junction Temperature
Storage Temperature Range
0 to 125
-65 to +150
260
°
C
STG
T
°
C
L
T
Lead Temperature (Soldering, 10 second)
Note: When mounted on a (Copper foil area 50%, 45x45x1.6tmm) glass epoxy board.
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Rev. A.1 - Sep., 2005
APL5312
Electrical Characteristics
Unless otherwise noted these specifications apply over full temperature, VIN = VOUT+1V, CIN = COUT = 1m F,
TA = -40 to 85°C .Typical values refer to TA = 25°C.
APL5312
Symbol
Parameter
Input Voltage
Test Condition
Unit
Min. Typ. Max.
VIN
2.3
-2
6
V
%
VOUT Output Voltage Accuracy
Output Voltage Range
VIN = 5V
2
1.5
450
3.5
550
160
160
V
ILIMIT Circuit Current Limit
500
120
120
300
0.1
mA
IOUT = 0mA
IQ
Quiescent Current
m
A
IOUT = 300mA
IOUT
Load Current
mA
%
REGLINE Line Regulation
REGLOAD Load Regulation
VOUT+0.5V<VIN<6V, IOUT = 10mA
0.3
1.5
VIN = VOUT+1V,
0mA<IOUT<300mA
0.8
%
VOUT =1.5V, IOUT = 300mA
VOUT = 2V, IOUT = 300mA
VOUT = 3V, IOUT = 300mA
f = 1kHz, CBP=10nF, IOUT=10mA
520
430
290
73
680
560
380
VDROP Dropout Voltage (Note)
mV
f = 10kHz, CBP=10nF,
74
PSRR Ripple Rejection
ISHORT Short Current
dB
OUT
I
= 10mA
f = 100KHz, CBP = 10nF,
IOUT = 10mA
55
50
36
VOUT = 0V
mA
f = 100Hz to 100kHz,
CBP = 10nF, IOUT = 10mA
Noise
m
VRMS
en
High Threshold Voltage
VSHDN
1.6
VIN+0.3
V
Low Threshold Voltage
-0.3
0.4
1
ISHDN Shutdown Input Bias Current VSHDN = VIN
0.1
0.1
m
A
SHDN = Low,
IQSHDN Shutdown Supply Current
VIN = VOUT+1V
1
m
A
TEXIT Shutdown Exit Delay
W
100
160
m
S
VOUT = 90%, RLOAD = 50
°
C
Over Temperature Shutdown
OTS
Over Temperature Shutdown
Hysteresis
°
C
20
Output Voltage Temperature
Coefficient
°
TJ = -40~125 C
ppm/
°
C
TC
100
1
Output Capacitor
ESR
m
F
COUT
0.025
1
W
Note: Dropout voltage definition: VIN-VOUT when VOUT is 2% below the value of VOUT for VIN= VOUT +1V.
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APL5312
Typical Application Circuit
VIN
VOUT
BP
SHDN
COUT
CIN
GND
m
F
1
mF
1
CBP
10 nF
Typical Characteristics
Quiescent Current vs. Output Current
Quiescent Current vs. Ambient Temperature
125
180
160
140
120
100
80
120
115
110
105
100
VIN=5.5V
VIN=4.5V
60
0
50
100
150
200
250
300
-40
-15
10
35
60
85
Output Current (mA)
Ambient Temperature (°C)
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APL5312
Typical Characteristics (Cont.)
Quiescent Current vs. Input Voltage
Dropout Voltage vs.Output Current
VOUT=2.5V
400
350
300
250
200
150
100
50
200
180
160
140
IOUT=0mA
120
100
80
60
40
20
0
°
TA=85 C
TA=25 C
°
0
0
50
100
150
200
250
300
0
1
2
3
4
5
6
Input Voltage (V)
Output Current (mA)
Dropout Voltage vs. Output Current
LoadTransient
600
500
400
300
200
100
0
VOUT(50mv/div)
VOUT=1.5V
VOUT=2.2V
IOUT(1~300mA)
VOUT=3.3V
Tr=1 S
m
0
50
100
150
200
250
300
Output Current (mA)
Time(0.1ms/div)
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APL5312
Typical Characteristics (Cont.)
LineTransient
ExitingShutdown Waveform
IOUT=100mA
CBP=10nF
VIN=4.5V~5.5V
SHDN(1V/div)
VOUT(1V/div)
VOUT(50mv/div)
IOUT=10mA
Time(0.1ms/div)
Time(50us/div)
Entering ShutdownDelay
Shutdown Exit Delay
140
120
100
80
IOUT=100mA
CBP=10nF
CBP=10nF
SHDN(1V/div)
60
40
20
VOUT(1V/div)
0
1.5
1.8
2.1
2.4
2.7
3
3.3
Time(0.1ms/div)
Output Voltage (V)
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APL5312
Typical Characteristics (Cont.)
PSRR vs. Frequency
Current Limit vs. Input Volatge
560
540
520
500
480
460
440
420
400
T
-20
IOUT=10mA
-30
-40
-50
TA=25 C
°
-60
-70
-80
VIN=5V
°
TA=85 C
VIN=4.5V
-90
-100
-110
4
4.5
5
5.5
6
20
100
1k
10k
100k 200k
Frequency (Hz)
Input Voltage (V)
Maximun Power Dissipation vs.
AmbientTemperature
Output Noise vs. BP Capacitance
160
450
400
350
300
250
200
150
100
50
140
120
100
80
SOT23-5
60
IOUT=100mA
IOUT=10mA
SC70-5
40
20
0
0
1
10
100
0
25
50
75
100
125
BP Capacitance (nF)
Ambient Temperature (°C)
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Rev. A.1 - Sep., 2005
APL5312
Typical Characteristics (Cont.)
Region of Stable COUT ESR vs.
LoadCurrent
100
10
Instable
1
VOUT=2.5V
CIN=COUT=1uF,Y5V
0.1
Stable
Instable
0.01
0
50
100
150
200
250
300
Output Current (mA)
Application Information
vs. Load Current).
Output Voltage Selection
BypassCapacitor
The APL5312 are supplied with factory-set output
voltages from 1.5V to 3.5V.
Use a 10nF bypass capacitor at BP for low-output
voltage noise. The leakage current going into the BP
pin should be less than 10nA. Increasing the capacitance
slightly decreases the output noise. Value above 0.1mF
and below 1nF are not recommended (see the Figure
Output Noise vs. BP Capacitance).
Capacitor Selection and Regulation Stability
The APL5312 uses at least a 1mF capacitor on the
input. This capacitor can use Aluminum, Tantalum or
Ceramic capacitors. Input capacitor with large value
and low ESR provides better PSRR and line-transient
response. TheoutputcapacitoralsocanuseAluminum,
Tantalum or Ceramic capacitor, and its proper values
is at least 1mF, ESR must be above 25mW. Large
output capacitor values can reduce noise and improve
load-transientresponse, stability, andPSRR. WithX5R
and Y5V dielectrics, 1mF is sufficient at all operating
temperatures. The selection of output capacitor’s is
important because it with COUT form a zero to provide
the sufficient phase margin (see the Figure COUT ESR
Noise, PSRR, and Load-Transient Response
The APL5312 is designed to deliver ultra-low noise
and high PSRR, as well as low dropout and low
quiescent currents in battery–powered systems.
When operating from sources other than batteries,
improve PSRR and transient response can be
achieved by increasing input and output capacitors,
and bypass capacitor to from the passive filtering
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Rev. A.1 - Sep., 2005
APL5312
Application Information (Cont.)
protection. Thermal protection is designed to protect
Noise, PSRR, and Load-Transient Response
(Cont.)
the IC in the event of fault conditions.
techniques (see the Figure Output Noise vs. BP
Capacitance).
Operating Region and Power Dissipation
The thermal resistance of the case and circuit board,
ambient and junction air temperature, and the rate of
air flow all control the APL5312’s maximum power
dissipation. The power dissipation across the device
is P = IOUT (VIN-VOUT). The maximum power dissipation
is:
Shutdown
TheAPL5312hasanactivehighenablefunction. Force
SHDN high (>1.6V) enables the VOUT, SHDN low (<0.4V)
disables the VOUT. Enter the shutdown mode, it also
causes the output voltage to discharge through a 500W
resistance to ground. In shutdown mode, the
quiescent current can reduce to 0.1uA. The SHDN
pin cannot be floating, a floating SHDN pin may cause
an indeterminate state on the output. If it is no use,
connect to VIN for normal operation.
PMAX = (TJ - TA) / (qJC + qCA )
qJA = qJC + qCA
where TJ -TA is the temperature difference between the
junction and ambient air.
qJC is the thermal resistance of the package, qCA is the
thermal resistance through the printed circuit board,
copper traces, and other materials to the surrounding
air, qJA = is the thermal resistance between Junction
and ambient air. For continual operation, do not exceed
the absolute maximum junction Temperature rating of
TJ = 125°C.
Input-Output (Dropout) Voltage
Theminimuminput-outputvoltagedifferential(dropout)
determines the lowest usable supply voltage. The
dropout voltage is a function of drain-to-source on
resistance multiplied by the load current.
Current Limit
APL5312 includes a current-limit circuitry for linear
regulator. The current limit protection, which sense
the current flows the P-channel MOSFET, and con-
trols the output voltage. The point where limiting oc-
curs is IOUT = 500mA . The output can be shorted to
groundforanindefiniteamountoftimewithoutdamaging to
the part.
For example:
The SOT23-5 package has maximum power dissipation
300mW at TA= 55°C, relatively 225mW at SC70-5
package (see the Figure Maximum Power Dissipation
vs. AmbientTemperature).
VIN = 5V, IOUT = 250mA, VOUT = 3.3V,
PD = (5-3.3)V x 150mA = 255mW
Thermal Protection
According the power dissipation issue, we should adapt
the SOT23-5 package. It could reduce the thermal
resistance to maintain the IC longer life.
Thermal protection limits total power dissipation in the
APL5312. When the junction temperature exceeds
TJ = +160°C, the thermal sensor generate a logic sig-
nal to turn off the pass element and let IC to cool.
The GND pin provides an electrical connection to
ground and channeling heat away. The printed circuit
board (PCB) forms a heat sink and dissipates most of
the heat into ambient air.
When the IC’s junction temperature cools by 20°C,
the thermal sensor will turn the pass element on again,
resulting in a pulsed output during continuous thermal
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APL5312
Packaging Information
SOT-23-5
e1
5
4
3
E1
E
1
2
e
b
D
A2
L 1
A
a
A1
L 2
L
Millimeters
Inches
Dim
Min.
Max.
1.45
0.15
1.30
0.55
3.00
3.00
1.70
Min.
0.037
0.002
0.035
0.0138
0.110
0.102
0.059
Max.
0.057
0.006
0.051
0.0217
0.118
0.118
0.067
A
A1
A2
b
0.95
0.05
0.90
0.35
2.8
D
E
2.6
E1
e
1.5
0.037
0.075
0.95
1.90
e1
L
0.014
0.022
0.35
0.55
L1
L2
a
0.20 BSC
0.008 BSC
0.020
0.028
0.5
0.7
0°
10°
0°
10°
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Rev. A.1 - Sep., 2005
APL5312
Packaging Information
SC70-5
D
θ
e1
e
L
E1
E
θ1
L1
b
0.20
C
A1
A2
A
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min.
0.80
0.00
0.80
0.15
0.08
1.90
1.15
2.00
Max.
1.10
0.10
1.00
0.30
0.25
2.15
1.35
2.20
Min.
Max.
0.043
0.004
0.039
0.012
0.010
0.084
0.053
0.086
A
A1
A2
b
0.031
0.000
0.031
0.008
0.003
0.074
0.045
0.078
c
D
E
E1
e
0.65TYP
0.53REF
0.026TYP
0.021PEF
e1
L
1.20
1.40
0.047
0.055
L1
q
0.26
0°
0.46
8°
0.010
0°
0.018
8°
q1
4°
10°
4°
10°
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Rev. A.1 - Sep., 2005
APL5312
Physical Specifications
Terminal Material
Lead Solderability
Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn
Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition (IR/Convection or VPR Reflow)
tp
TP
Critical Zone
TL to TP
Ramp-up
TL
tL
Tsmax
Tsmin
Ramp-down
ts
Preheat
25
°
t 25 C to Peak
Time
Classification Reflow Profiles
Profile Feature
Average ramp-up rate
(TL to TP)
Sn-Pb Eutectic Assembly
Pb-Free Assembly
°
°
3 C/second max.
3 C/second max.
Preheat
°
°
150 C
100 C
-
-
-
Temperature Min (Tsmin)
Temperature Max (Tsmax)
Time (min to max) (ts)
°
°
150 C
200 C
60-120 seconds
60-180 seconds
Time maintained above:
°
°
183 C
217 C
-
Temperature (TL)
Time (tL)
60-150 seconds
60-150 seconds
-
Peak/Classificatioon Temperature (Tp)
See table 1
See table 2
°
Time within 5 C of actual
10-30 seconds
20-40 seconds
Peak Temperature (tp)
Ramp-down Rate
°
°
6 C/second max.
6 C/second max.
6 minutes max.
8 minutes max.
°
Time 25 C to Peak Temperature
Notes: All temperatures refer to topside of the package .Measured on the body surface.
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Rev. A.1 - Sep., 2005
APL5312
Classification Reflow Profiles(Cont.)
Table 1. SnPb Entectic Process – Package Peak Reflow Temperatures
Package Thickness
Volume mm3
<350
Volume mm3
350
<2.5 mm
°
°
225 +0/-5 C
240 +0/-5 C
³
°
°
2.5 mm
225 +0/-5 C
225 +0/-5 C
Table 2. Pb-free Process – Package Classification Reflow Temperatures
Package Thickness
Volume mm3
<350
Volume mm3
350-2000
Volume mm3
>2000
<1.6 mm
1.6 mm – 2.5 mm
³ 2.5 mm
260 +0°C*
260 +0°C*
250 +0°C*
260 +0°C*
250 +0°C*
245 +0°C*
260 +0°C*
245 +0°C*
245 +0°C*
*Tolerance: The device manufacturer/supplier shall assure process compatibility up to and
including the stated classification temperature (this means Peak reflow temperature +0°C.
For example 260°C+0°C) at the rated MSL level.
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
Method
MIL-STD-883D-2003
MIL-STD-883D-1005.7
JESD-22-B,A102
Description
245°C, 5 SEC
1000 Hrs Bias @125°C
168 Hrs, 100%RH, 121°C
TST
ESD
Latch-Up
MIL-STD-883D-1011.9
MIL-STD-883D-3015.7
JESD 78
°
°
-65 C~150 C, 200 Cycles
VHBM > 2KV, VMM > 200V
10ms, 1tr > 100mA
Carrier Tape
t
D
P
Po
E
F
P1
Bo
W
Ko
Ao
D1
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Rev. A.1 - Sep., 2005
APL5312
Carrier Tape (Cont.)
T2
J
C
A
B
T1
Application
SOT23-5
A
178±1
F
B
C
J
T1
72 ± 1.0 13.0 + 0.2 2.5 ± 0.15 8.4 ± 2
D1 Po P1
T2
1.5± 0.3
Ao
W
P
4 ± 0.1
Ko
E
8.0+ 0.3
- 0.3
1.75± 0.1
D
Bo
t
3.5 ± 0.05 1.5 +0.1
1.5 +0.1 4.0 ± 0.1 2.0 ± 0.1 3.15 ± 0.1 3.2± 0.1 1.4± 0.1
0.2±0.03
E
Application
SC70-5
A
B
C
J
T1
14.4 ± 0.4 13.0 + 0.2 1.15 ± 0.1 12. ±0.2 2.8± 0.2
D1 Po P1 Ao
T2
W
P
8.0+ 0.3
- 0.1
178±1
4 ± 0.1
1.75± 0.1
F
D
Bo
Ko
t
3.5 ± 0.05 1.55± 0.05 1.00 +0.25 4.0 ± 0.1 2.0 ± 0.05 2.4 ± 0.1 2.4± 0.1 1.19± 0.1 0.25±0.013
(mm)
Cover Tape Dimensions
Application
SOT23-5
SC70-5
Carrier Width
Cover Tape Width
Devices Per Reel
8
8
5.3
5.3
3000
3000
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
7F, No. 137, Lane 235, Pac Chiao Rd.,
Hsin Tien City, Taipei Hsien, Taiwan, R. O. C.
Tel : 886-2-89191368
Fax : 886-2-89191369
Copyright ã ANPEC Electronics Corp.
Rev. A.1 - Sep., 2005
15
www.anpec.com.tw
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