A62S6308AM-70SF [AMICC]
SRAM;
| 型号： | A62S6308AM-70SF |
| 厂家： | 
AMIC TECHNOLOGY |
| 描述： | SRAM 静态存储器 |
| 文件： | 总16页 (文件大小：167K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
A62S6308A Series
Preliminary
64K X 8 BIT LOW VOLTAGE CMOS SRAM
Document Title
64K X 8 BIT LOW VOLTAGE CMOS SRAM
Revision History
Rev. No. History
Issue Date
Remark
0.0
Initial issue
May 31, 2011
Preliminary
PRELIMINARY (May, 2011, Version 0.0)
AMIC Technology, Corp.
A62S6308A Series
Preliminary
64K X 8 BIT LOW VOLTAGE CMOS SRAM
Features
Power supply range: 2.7V to 3.6V
Access times:55/70 ns (max.)
Current:
All inputs and outputs are directly TTL-compatible
Common I/O using three-state output
Output enable and two chip enable inputs for easy
application
A62S6308A series: Operating: 30mA (max.)
Data retention voltage: 2V (min.)
Standby: 5μA (max.)
Available in 32-pin SOP, TSOP, sTSOP (8
13.4mm) forward type packages
All Pb-free (Lead-free) products are RoHS compliant
X
Extended operating temperature range: 0°C to 70°C
for -S series, -40°C to +85°C for -SU series
Full static operation, no clock or refreshing required
General Description
The A62S6308A is a low operating current 524,288-bit
static random access memory organized as 65,536 words
by 8 bits and operates on a low power supply voltage
from 2.7V to 3.6V.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
Two chip enable inputs are provided for POWER-DOWN
and a device enable and an output enable input are
included for easy interfacing.
Data retention is guaranteed at a power supply voltage as
low as 2V.
Pin Configurations
SOP
TSOP/(sTSOP)
(forward type)
1
32
31
30
VCC
A15
CE2
NC
NC
A14
A12
A7
2
3
4
5
6
A11
A9
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
2
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
29
28
27
WE
A13
A8
A8
3
A13
WE
CE2
A15
VCC
NC
NC
A14
A12
A7
4
5
A6
6
A5
7
8
26
25
24
23
22
A9
7
A62S6308AV
(A62S6308AX)
8
A4
A11
OE
A10
CE1
9
A3
9
10
11
12
13
14
15
16
A2
10
A1
A0
11
12
13
21
20
19
18
17
I/O7
I/O6
I/O5
I/O4
I/O3
A6
A1
A5
A2
I/O0
A4
A3
I/O1
I/O2
14
15
16
GND
PRELIMINARY (May, 2011, Version 0.0)
1
AMIC Technology, Corp.
A62S6308A Series
Block Diagram
A0
VCC
GND
ROW
512 X 1024
A13
A14
A15
DECODER
MEMORY ARRAY
I/O0
SENSE AMPS
INPUT DATA
CIRCUIT
I/O7
CE2
CE1
OE
CONTROL
CIRCUIT
WE
Pin Descriptions - SOP
Pin Description - TSOP/sTSOP
Pin No.
Symbol
Description
Pin No.
Symbol
Description
1,2
NC
No Connection
1 - 4, 7,
11 - 20, 31
A0 - A15
Address Inputs
Write Enable
3 - 12, 23,
25 - 28, 31
A0 - A15
Address Inputs
5
WE
CE2
VCC
NC
13 - 15,
17 - 21
6
8
Chip Enable
I/O0 - I/O7
Data Inputs/Outputs
Power Supply
No Connection
16
22
GND
CE1
OE
Ground
9, 10
Chip Enable
21 - 23,
25 - 29
I/O0 - I/O7
Data Inputs/Outputs
24
29
Output Enable
Write Enable
24
30
GND
CE1
OE
Ground
WE
CE2
VCC
Chip Enable
30
32
Chip Enable
32
Output Enable
Power Supply
PRELIMINARY (May, 2011, Version 0.0)
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AMIC Technology, Corp.
A62S6308A Series
Recommended DC Operating Conditions
(TA = 0°C to +70°C, or -40°C to +85°C)
Symbol
VCC
GND
VIH
Parameter
Supply Voltage
Min.
2.7
0
Typ.
Max.
Unit
V
3.0
3.6
Ground
0
-
0
V
Input High Voltage
Input Low Voltage
Output Load
2.2
-0.3
-
VCC + 0.3
V
VIL
-
+0.6
30
1
V
CL
-
pF
-
TTL
Output Load
-
-
Absolute Maximum Ratings*
*Comments
VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to + 4.6V
IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC + 0.5V
Operating Temperature, Topr . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . 0°C to +70°C, or -40°C to +85°C
Storage Temperature, Tstg . .. . . . . . . . -55°C to + 125°C
Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . . 0.7W
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification is
not implied or intended. Exposure to the absolute
maximum rating conditions for extended periods may
affect device reliability.
DC Electrical Characteristics (TA = 0°C to +70°C or -40°C to +85°C, VCC = 2.7V to 3.6V, GND = 0V)
Symbol
Parameter
Min.
Max.
Unit
Conditions
Input Leakage Current
-
1
VIN = GND to VCC
⎜ILI⎥
μA
CE1 = VIH or CE2 = VIL or
Output Leakage Current
-
-
-
1
3
⎜ILO⎥
ICC
μA
mA
mA
OE = VIH or WE = VIL
VI/O = GND to VCC
CE1 = VIL, CE2 = VIH
II/O = 0mA
Active Power Supply Current
Min. Cycle, Duty = 100%
ICC1
30
CE1 = VIL, CE2 = VIH
II/O = 0mA
Dynamic Operating Current
CE1 = VIL, CE2 = VIH
VIH = VCC, VIL = 0V
f = 1MHZ, II/O = 0mA
ICC2
-
3
mA
PRELIMINARY (May, 2011, Version 0.0)
3
AMIC Technology, Corp.
A62S6308A Series
DC Electrical Characteristics (continued)
Symbol
Parameter
Min.
Max.
Unit
Conditions
VCC ≤ 3.3V
CE1 = VIH or CE2 = VIL
ISB
-
0.5
mA
Standby Power
VCC ≤ 3.3V
Supply Current
≥ VCC - 0.2V or CE2 ≤ 0.2V
VIN ≥ 0V
CE1
ISB1
-
5
μA
VOL
VOH
Output Low Voltage
Output High Voltage
-
0.4
-
V
V
IOL = 2.1mA
IOH = -1.0mA
2.2
Truth Table
Mode
CE2
X
I/O Operation
High Z
High Z
High Z
DOUT
Supply Current
CE1
H
OE
X
WE
X
ISB, ISB1
Standby
X
L
X
X
ISB, ISB1
Output Disable
Read
L
L
L
H
H
L
H
ICC, ICC1, ICC2
ICC, ICC1, ICC2
ICC, ICC1, ICC2
H
H
Write
H
X
L
DIN
Note: X = H or L
Capacitance (TA = 25°C, f = 1.0MHz)
Symbol
CIN*
Parameter
Min.
Max.
Unit
pF
Conditions
VIN = 0V
Input Capacitance
6
8
CI/O*
Input/Output Capacitance
pF
VI/O = 0V
* These parameters are sampled and not 100% tested.
PRELIMINARY (May, 2011, Version 0.0)
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AMIC Technology, Corp.
A62S6308A Series
AC Characteristics (TA = 0°C to +70°C or -40°C to +85°C, VCC = 2.7V to 3.6V)
A62S6308A-55S/SU
A62S6308A-70S/SU
Unit
Symbol
Parameter
Min.
Max.
Min.
Max.
Read Cycle
tRC
Read Cycle Time
55
-
-
70
-
-
ns
ns
ns
tAA
Address Access Time
55
55
70
70
tACE1
-
-
CE1
CE2
Chip Enable Access Time
tACE2
tOE
-
-
55
30
-
-
-
70
35
-
ns
ns
ns
Output Enable to Output Valid
Chip Enable to Output in Low Z
tCLZ1
10
10
CE1
CE2
tCLZ2
tOLZ
10
5
-
-
10
5
-
-
ns
ns
ns
Output Enable to Output in Low Z
Chip Disable to Output in High Z
tCHZ1
0
20
0
25
CE1
CE2
tCHZ2
tOHZ
tOH
0
0
5
20
20
-
0
0
25
25
-
ns
ns
ns
Output Disable to Output in High Z
Output Hold from Address Change
10
Read Cycle
tWC
Write Cycle Time
55
50
0
-
-
70
60
0
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCW
Chip Enable to End of Write
Address Setup Time
tAS
-
-
tAW
Address Valid to End of Write
Write Pulse Width
50
40
0
-
60
50
0
-
tWP
-
-
tWR
Write Recovery Time
-
-
tWHZ
tDW
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
0
25
-
0
25
-
25
0
30
0
tDH
-
-
tOW
5
-
5
-
Notes: tCHZ1, tCHZ2, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are
not referred to output voltage levels.
PRELIMINARY (May, 2011, Version 0.0)
5
AMIC Technology, Corp.
A62S6308A Series
Timing Waveforms
Read Cycle 1(1, 2, 4)
t
RC
Address
t
AA
t
OH
t
OH
D
OUT
Read Cycle 2 (1, 3, 4, 6)
CE1
t
ACE1
5
CLZ1
t
5
CHZ1
t
D
OUT
Read Cycle 3 (1, 4, 7 ,8)
CE2
t
ACE2
5
CHZ2
t
5
CLZ2
t
D
OUT
PRELIMINARY (May, 2011, Version 0.0)
6
AMIC Technology, Corp.
A62S6308A Series
Timing Waveforms (continued)
Read Cycle 4 (1)
t
RC
Address
t
AA
OE
t
OE
tOH
5
OLZ
t
CE1
t
ACE1
5
CHZ1
5
CLZ1
t
t
CE2
5
OHZ
t
ACE2
t
5
CHZ2
t
5
CLZ2
t
D
OUT
Notes: 1. WE is high for Read Cycle.
2. Device is continuously enabled CE1 = VIL and CE2 = VIH.
3. Address valid prior to or coincident with CE1 transition low.
4. OE = VIL.
5. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested.
6. CE2 is high.
7. CE1 is low.
8. Address valid prior to or coincident with CE2 transition high.
PRELIMINARY (May, 2011, Version 0.0)
7
AMIC Technology, Corp.
A62S6308A Series
Timing Waveforms (continued)
Write Cycle 1(6)
(Write Enable Controlled)
t
WC
Address
3
WR
t
AW
t
5
CW
t
(4)
(4)
CE1
CE2
1
2
tWP
t
AS
WE
t
DW
tDH
D
IN
t
WHZ
t
OW
D
OUT
PRELIMINARY (May, 2011, Version 0.0)
8
AMIC Technology, Corp.
A62S6308A Series
Timing Waveforms (continued)
Write Cycle 2
(Chip Enable Controlled)
t
WC
Address
3
tWR
t
AW
5
CW
t
CE1
CE2
(4)
(4)
1
AS
t
5
CW
t
2
t
WP
WE
t
DW
t
DH
D
IN
7
WHZ
t
D
OUT
Notes: 1. tAS is measured from the address valid to the beginning of Write.
2. A Write occurs during the overlap (tWP) of a low CE1, a high CE2 and a low WE .
3. tWR is measured from the earliest of CE1 or WE going high or CE2 going low to the end of the Write cycle.
4. If the CE1 low transition or the CE2 high transition occurs simultaneously with the WE low transition or after
the WE transition, outputs remain in a high impedance state.
5. tCW is measured from the later of CE1 going low or CE2 going high to the end of Write.
6. OE is continuously low. ( OE = VIL)
7. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested.
PRELIMINARY (May, 2011, Version 0.0)
9
AMIC Technology, Corp.
A62S6308A Series
AC Test Conditions
Input Pulse Levels
0.4V to 2.4V
5 ns
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
1.5V
See Figures 1 and 2
TTL
TTL
C
L
CL
30pF
5pF
* Including scope and jig.
* Including scope and jig.
Figure 1. Output Load
Figure 2. Output Load for tCLZ1,
tCLZ2, tOHZ, tOLZ, tCHZ1,
tCHZ2, tWHZ, and tOW
Data Retention Characteristics (TA = 0°C to +70°C or -40°C to +85°C)
Symbol
Parameter
Min.
Max.
Unit
Conditions
VDR1
2.0
3.6
V
CE1 ≥ VCC - 0.2V
VCC for Data Retention
VDR2
2.0
-
3.6
1*
V
CE2 ≤ 0.2V
VCC = 2.0V
CE1 ≥ VCC - 0.2V
VIN ≥ 0V
ICCDR1
μA
Data Retention Current
VCC = 2.0V
CE2 ≤ 0.2V
ICCDR2
-
1*
μA
VIN ≥ 0V
tCDR
tR
Chip Disable to Data Retention Time
Operation Recovery Time
0
-
-
ns
ns
tRC
See Retention Waveform
VCC Rise Time from Data Retention Voltage
to Operating Voltage
tVR
5
-
ms
* A62S6308A-55S/70S
A62S6308A-55SU/70SU
ICCDR: Max. 1μA at TA = 0°C to +40°C
ICCDR: Max. 1μA at TA = 0°C to +40°C
PRELIMINARY (May, 2011, Version 0.0)
10
AMIC Technology, Corp.
A62S6308A Series
Low VCC Data Retention Waveform (1) ( CE1 Controlled)
DATA RETENTION MODE
VCC
CE1
2.7V
2.7V
t
CDR
t
R
VDR ≥ 2V
t
VR
V
IH
VIH
CE1
≥ VDR - 0.2V
Low VCC Data Retention Waveform (2) (CE2 Controlled)
DATA RETENTION MODE
VCC
CE2
2.7V
2.7V
t
CDR
t
R
VDR ≥ 2V
t
VR
VIL
VIL
CE2 < 0.2V
PRELIMINARY (May, 2011, Version 0.0)
11
AMIC Technology, Corp.
A62S6308A Series
Ordering Information
Part No.
Access Time (ns)
Operating Current
Max. (mA)
Standby Current
Package
Max. (μA)
A62S6308AM-55SF
A62S6308AM-55SUF
A62S6308AV-55SF
A62S6308AV-55SUF
A62S6308AX-55SF
A62S6308AX-55SUF
A62S6308AM-70SF
A62S6308AM-70SUF
A62S6308AV-70SF
A62S6308AV-70SUF
A62S6308AX-70SF
A62S6308AX-70SUF
32L Pb-Free SOP
32L Pb-Free SOP
32L Pb-Free TSOP
32L Pb-Free TSOP
32L Pb-Free sTSOP
32L Pb-Free sTSOP
32L Pb-Free SOP
32L Pb-Free SOP
32L Pb-Free TSOP
32L Pb-Free TSOP
32L Pb-Free sTSOP
32L Pb-Free sTSOP
55
30
5
70
30
5
PRELIMINARY (May, 2011, Version 0.0)
12
AMIC Technology, Corp.
A62S6308A Series
Package Information
SOP (W.B.) 32L Outline Dimensions
unit: inches/mm
32
17
θ
L
16
1
b
Detail F
D
L
E
e
S
y
See Detail F
Seating Plane
Dimensions in inches
Dimensions in mm
Symbol
Min
Nom
-
Max
0.118
-
Min
Nom
-
Max
A
A1
A2
b
-
-
3.00
-
0.004
0.101
0.014
0.006
-
-
0.10
2.57
0.36
0.15
-
-
0.106
0.016
0.008
0.805
0.445
0.050
0.556
0.031
0.055
-
0.111
0.020
0.012
0.817
0.450
0.056
0.566
0.039
0.063
0.036
0.004
10°
2.69
0.41
0.20
20.45
11.30
1.27
14.12
0.79
1.40
-
2.82
0.51
0.31
20.75
11.43
1.42
14.38
0.99
1.60
0.91
0.10
10°
c
D
E
0.440
0.044
0.546
0.023
0.047
-
11.18
1.12
13.87
0.58
1.19
-
e
HE
L
LE
S
y
-
-
-
-
0°
-
0°
-
θ
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
PRELIMINARY (May, 2011, Version 0.0)
13
AMIC Technology, Corp.
A62S6308A Series
Package Information
TSOP 32L TYPE I (8 X 20mm) Outline Dimensions
unit: inches/mm
D
θ
L
L
E
H
D
Detail "A"
Detail "A"
y
S
b
Dimensions in inches
Dimensions in mm
Symbol
Min
-
Nom
Max
Min
Nom
Max
A
A1
A2
b
-
0.047
0.006
0.041
0.011
0.008
0.728
0.319
-
-
1.20
0.15
1.05
0.27
0.20
18.50
8.10
0.002
0.037
0.007
0.004
0.720
-
-
0.039
0.009
-
0.05
0.95
0.18
0.11
18.30
-
-
1.00
0.22
-
c
D
E
0.724
0.315
0.020 BSC
0.787
0.020
0.032
-
18.40
8.00
0.50 BSC
20.00
0.50
0.80
-
e
HD
L
0.779
0.795
0.024
-
19.80
20.20
0.60
-
0.016
0.40
LE
S
-
-
-
-
0.020
0.003
5°
0.50
0.08
5°
y
-
-
-
-
-
-
θ
0°
0°
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
PRELIMINARY (May, 2011, Version 0.0)
14
AMIC Technology, Corp.
A62S6308A Series
Package Information
sTSOP 32L TYPE I (8 X 13.4mm) Outline Dimensions
unit: inches/mm
θ
L
L
E
D
1
D
Detail "A"
Detail "A"
0.076MM
S
b
SEATING PLANE
Dimensions in inches
Dimensions in mm
Symbol
Min
-
Nom
-
Max
Min
Nom
-
Max
-
A
A1
A2
b
0.049
-
1.25
-
-
-
0.002
0.037
0.007
0.05
0.95
0.17
0.039
0.008
0.041
0.009
1.00
1.05
0.23
0.158
8.10
0.20
c
0.0056 0.0059 0.0062 0.142
0.150
8.00
E
0.311
0.315
0.020 TYP
0.528
0.319
7.90
e
0.50 TYP
13.40
11.80
0.50
D
D1
L
0.520
0.461
0.012
0.535
0.469
0.028
13.20
11.70
0.30
13.60
11.90
0.70
0.465
0.020
LE
S
0.0275 0.0315 0.0355 0.700
0.0109 TYP
0.800
0.278 TYP
3°
0.900
θ
0°
3°
5°
0°
5°
Notes:
1. The maximum value of dimension D1 includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
PRELIMINARY (May, 2011, Version 0.0)
15
AMIC Technology, Corp.
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