AM29LV004BT-80FE [AMD]
4 Megabit (512 K x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory; 4兆位（ 512K的×8位） CMOS 3.0伏只引导扇区闪存
| 型号： | AM29LV004BT-80FE |
| 厂家： | 
AMD |
| 描述： | 4 Megabit (512 K x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory |
| 文件： | 总6页 (文件大小：42K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ADVANCE INFORMATION
Am29LV004B
4 Megabit (512 K x 8-Bit)
CMOS 3.0 Volt-only Boot Sector Flash Memory
DISTINCTIVE CHARACTERISTICS
■ Single power supply operation
■ Unlock Bypass Program Command
— Full voltage range: 2.7 to 3.6 volt read and write
operations for battery-powered applications
— Reduces overall programming time when
issuing multiple program command sequences
— Regulated voltage range: 3.0 to 3.6 volt read and
write operations and for compatibility with high
performance 3.3 volt microprocessors
■ Top or bottom boot block configurations
available
■ Embedded Algorithms
■ Manufactured on 0.35 µm process technology
— Compatible with 0.5 µm Am29LV004 device
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
■ High performance
— Embedded Program algorithm automatically
writes and verifies data at specified addresses
— Full voltage range: access times as fast as 80 ns
— Regulated voltage range: access times as fast
as 70 ns
■ Minimum 1,000,000 write cycle guarantee per
sector
■ Ultra low power consumption (typical values at
■ Package option
5 MHz)
— 40-pin TSOP
— 200 nA Automatic Sleep mode current
— 200 nA standby mode current
— 7 mA read current
■ Compatibility with JEDEC standards
— Pinout and software compatible with single-
power supply Flash
— 15 mA program/erase current
— Superior inadvertent write protection
■ Flexible sector architecture
■ Data# Polling and toggle bits
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
seven 64 Kbyte sectors
— Provides a software method of detecting
program or erase operation completion
— Supports full chip erase
— Sector Protection features:
■ Ready/Busy# pin (RY/BY#)
A hardware method of locking a sector to
prevent any program or erase operations within
that sector
— Provides a hardware method of detecting
program or erase cycle completion
■ Erase Suspend/Erase Resume
Sectors can be locked in-system or via
programming equipment
— Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
■ Hardware reset pin (RESET#)
— Hardware method to reset the device to reading
array data
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Publication# 21522 Rev: A Amendment/0
Issue Date: January 1998
Refer to AMD’s Website (www.amd.com) for the latest information.
A D V A N C E I N F O R M A T I O N
GENERAL DESCRIPTION
The Am29LV004B is an 4 Mbit, 3.0 volt-only Flash
memory organized as 524,288 bytes. The device is
offered in a 40-pin TSOP package. The byte-wide (x8)
data appears on DQ7–DQ0. This device requires only
a single, 3.0 volt VCC supply to perform read, program,
and erase operations. A standard EPROM pro-
grammer can also be used to program and erase the
device.
executing the erase operation. During erase, the device
automatically times the erase pulse widths and verifies
proper cell margin.
The host system can detect whether a program or
erase operation is complete by observing the RY/BY#
pin, or by reading the DQ7 (Data# Polling) and DQ6
(toggle) status bits. After a program or erase cycle has
been completed, the device is ready to read array data
or accept another command.
This device is manufactured using AMD’s 0.35 µm
process technology, and offers all the features and ben-
efits of the Am29LV004, which was manufactured using
0.5 µm process technology. In addition, the
Am29LV004B features unlock bypass programming
and in-system sector protection/unprotection.
The sector erase architecture allows memory sectors
to be erased and reprogrammed without affecting the
data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection measures include a low
The standard device offers access times of 70, 80, 90,
and 120 ns, allowing high speed microprocessors to
operate without wait states. To eliminate bus contention
the device has separate chip enable (CE#), write
enable (WE#) and output enable (OE#) controls.
detector that automatically inhibits write opera-
VCC
tions during power transitions. The hardware sector
protection feature disables both program and erase
operations in any combination of the sectors of mem-
ory. This can be achieved in-system or via program-
ming equipment.
The device requires only a single 3.0 volt power sup-
ply for both read and write functions. Internally gener-
ated and regulated voltages are provided for the
program and erase operations.
The Erase Suspend feature enables the user to put
erase on hold for any period of time to read data from,
or program data to, any sector that is not selected for
erasure. True background erase can thus be achieved.
The device is entirely command set compatible with the
JEDEC single-power-supply Flash standard. Com-
mands are written to the command register using stan-
dard microprocessor write timings. Register contents
serve as input to an internal state-machine that con-
trols the erase and programming circuitry. Write cycles
also internally latch addresses and data needed for the
programming and erase operations. Reading data out
of the device is similar to reading from other Flash or
EPROM devices.
The hardware RESET# pin terminates any operation
in progress and resets the internal state machine to
reading array data. The RESET# pin may be tied to the
system reset circuitry. A system reset would thus also
reset the device, enabling the system microprocessor
to read the boot-up firmware from the Flash memory.
The device offers two power-saving features. When ad-
dresses have been stable for a specified amount of
time, the device enters the automatic sleep mode.
The system can also place the device into the standby
mode. Power consumption is greatly reduced in both
these modes.
Device programming occurs by executing the program
command sequence. This initiates the Embedded
Program algorithm—an internal algorithm that auto-
matically times the program pulse widths and verifies
proper cell margin. The Unlock Bypass mode facili-
tates faster programming times by requiring only two
write cycles to program data instead of four.
AMD’s Flash technology combines years of Flash
memory manufacturing experience to produce the
highest levels of quality, reliability and cost effective-
ness. The device electrically erases all bits within
a sector simultaneously via Fowler-Nordheim tun-
neling. The data is programmed using hot electron
injection.
Device erasure occurs by executing the erase command
sequence. This initiates the Embedded Erase algo-
rithm—an internal algorithm that automatically prepro-
grams the array (if it is not already programmed) before
2
Am29LV004B
A D V A N C E I N F O R M A T I O N
PRODUCT SELECTOR GUIDE
Family Part Number
Am29LV004B
Regulated Voltage Range: V =3.0–3.6 V
-70R
CC
Speed Options
Full Voltage Range: V = 2.7–3.6 V
-80
-90
90
90
35
-120
120
120
50
CC
Max access time, ns (t
)
70
70
30
80
80
30
ACC
Max CE# access time, ns (t
)
CE
Max OE# access time, ns (t
)
OE
Note: See “AC Characteristics” for full specifications.
BLOCK DIAGRAM
DQ0–DQ7
RY/BY#
V
CC
Sector Switches
V
SS
Erase Voltage
Generator
Input/Output
Buffers
RESET#
State
Control
WE#
Command
Register
PGM Voltage
Generator
Data
Latch
Chip Enable
Output Enable
Logic
STB
CE#
OE#
Y-Decoder
Y-Gating
STB
V
Detector
Timer
CC
Cell Matrix
X-Decoder
A0–A18
21522A-1
Am29LV004B
3
A D V A N C E I N F O R M A T I O N
CONNECTION DIAGRAMS
A17
VSS
NC
A16
A15
A14
A13
A12
A11
A9
1
2
3
4
5
6
7
8
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
NC
A10
DQ7
DQ6
DQ5
DQ4
VCC
VCC
A8
WE#
RESET#
NC
RY/BY#
A18
A7
9
10
11
12
13
14
15
16
17
18
19
20
Standard TSOP
NC
DQ3
DQ2
DQ1
DQ0
OE#
VSS
A6
A5
A4
A3
A2
A1
CE#
A0
A17
VSS
NC
NC
1
2
3
4
5
6
7
8
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
A16
A15
A14
A13
A12
A11
A9
A10
DQ7
DQ6
DQ5
DQ4
VCC
VCC
NC
DQ3
DQ2
DQ1
DQ0
A8
9
WE#
RESET#
NC
RY/BY#
A18
A7
A6
A5
A4
A3
10
11
12
13
14
15
16
17
18
19
20
Reverse TSOP
CE#
VSS
CE#
A0
A2
A1
21522A-2
4
Am29LV004B
A D V A N C E I N F O R M A T I O N
PIN CONFIGURATION
LOGIC SYMBOL
A0–A18
= 19 addresses
19
DQ0–DQ7 = 8 data inputs/outputs
A0–A18
8
CE#
=
=
=
=
=
=
Chip enable
DQ0–DQ7
OE#
Output enable
WE#
Write enable
CE#
OE#
RESET#
RY/BY#
VCC
Hardware reset pin, active low
Ready/Busy# output
WE#
RESET#
3.0 volt-only single power supply
(see Product Selector Guide for speed
options and voltage supply tolerances)
RY/BY#
VSS
NC
=
=
Device ground
Pin not connected internally
21522A-3
Am29LV004B
5
A D V A N C E I N F O R M A T I O N
ORDERING INFORMATION
Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combi-
nation) is formed by a combination of the elements below.
Am29LV004B
T
-70R
E
C
OPTIONAL PROCESSING
Blank = Standard Processing
B = Burn-in
(Contact an AMD representative for more information)
TEMPERATURE RANGE
C = Commercial (0°C to +70°C)
I = Industrial (–40°C to +85°C)
E = Extended (–55°C to +125°C)
PACKAGE TYPE
E
=
40-Pin Thin Small Outline Package (TSOP)
Standard Pinout (TS 040)
F
=
40-Pin Thin Small Outline Package (TSOP)
Reverse Pinout (TSR040)
SPEED OPTION
See Product Selector Guide and Valid Combinations
BOOT CODE SECTOR ARCHITECTURE
T = Top Sector
B = Bottom Sector
DEVICE NUMBER/DESCRIPTION
Am29LV004B
4 Megabit (512 K x 8-Bit) CMOS Flash Memory
3.0 Volt-only Read, Program, and Erase
Valid Combinations
Valid Combinations
Valid Combinations list configurations planned to be sup-
ported in volume for this device. Consult the local AMD sales
office to confirm availability of specific valid combinations and
to check on newly released combinations.
Am29LV004BT-70R,
Am29LV004BB-70R
EC, EI, FC, FI
Am29LV004BT-80,
Am29LV004BB-80
Am29LV004BT-90,
Am29LV004BB-90
EC, EI, EE, FC, FI, FE
Am29LV004BT-120,
Am29LV004BB-120
Trademarks
Copyright © 1998 Advanced Micro Devices, Inc. All rights reserved.
AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc.
Product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
6
Am29LV004B
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