ACS756SCB-100B-PSF-T [ALLEGRO]

Analog Circuit,;
ACS756SCB-100B-PSF-T
型号: ACS756SCB-100B-PSF-T
厂家: ALLEGRO MICROSYSTEMS    ALLEGRO MICROSYSTEMS
描述:

Analog Circuit,

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ACS756xCB  
Fully Integrated, Hall Effect-Based Linear Current Sensor IC  
with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor  
Not for New Design  
These parts are in production but have been determined to be  
NOT FOR NEW DESIGN. This classification indicates that sale of  
this device is currently restricted to existing customer applications.  
The device should not be purchased for new design applications  
because obsolescence in the near future is probable. Samples are no  
longer available.  
Date of status change: June 5, 2017  
Recommended Substitutions:  
For existing customer transition, and for new customers or new appli-  
cations, use ACS770xCB.  
NOTE: For detailed information on purchasing options, contact your  
local Allegro field applications engineer or sales representative.  
Allegro MicroSystems, LLC reserves the right to make, from time to time, revisions to the anticipated product life cycle plan  
for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The  
information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no respon-  
sibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.  
ACS756xCB  
Fully Integrated, Hall-Effect-Based Linear Current Sensor IC  
with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor  
FEATURES AND BENEFITS  
DESCRIPTION  
• Industry-leading noise performance through proprietary  
amplifier and filter design techniques  
The Allegro ACS756 family of current sensor ICs provides  
economicalandprecisesolutionsforACorDCcurrentsensing  
in industrial, automotive, commercial, and communications  
systems.Thedevicepackageallowsforeasyimplementationby  
the customer. Typical applications include motor control, load  
detection and management, power supplies, and overcurrent  
fault protection.  
• Total output error 0.8% at TA= 25°C  
• Small package size, with easy mounting capability  
• Monolithic Hall IC for high reliability  
Ultra-low power loss:100 µΩ internal conductor resistance  
• 3 kVRMS minimum isolation voltage from  
pins 1-3 to pins 4-5  
The device consists of a precision, low-offset linear Hall  
circuit with a copper conduction path located near the die.  
Applied current flowing through this copper conduction path  
generates a magnetic field which the Hall IC converts into a  
proportionalvoltage.Deviceaccuracyisoptimizedthroughthe  
close proximity of the magnetic signal to the Hall transducer.  
A precise, proportional voltage is provided by the low-offset,  
chopper-stabilized BiCMOS Hall IC, which is programmed  
for accuracy at the factory.  
• 3.0 to 5.0 V, single supply operation  
• 3 µs output rise time in response to step input current  
• 20 or 40 mV/A output sensitivity  
• Output voltage proportional to AC or DC currents  
• Factory-trimmed for accuracy  
• Extremely stable output offset voltage  
• Nearly zero magnetic hysteresis  
TÜV America  
Certificate Number:  
U8V 15 05 54214 037  
UL Certified File  
No.: US-29755-UL  
Theoutputofthedevicehasapositiveslope(>VCC/2)whenan  
increasingcurrentflowsthroughtheprimarycopperconduction  
path (from terminal 4 to terminal 5), which is the path used  
forcurrentsampling.Theinternalresistanceofthisconductive  
path is 100 µΩ typical, providing low power loss.  
PACKAGE: 5-pin package (suffix CB)  
The thickness of the copper conductor allows survival of the  
device at up to 5× overcurrent conditions. The terminals of the  
conductive path are electrically isolated from the signal leads  
PFF  
Not to scale  
Continued on the next page…  
Leadform  
Leadform  
+5 V  
1
2
4
VCC  
IP+  
CBYP  
0.1 µF  
ACS756  
IP  
GND  
CF  
5
IP–  
3
VIOUT  
VOUT  
RF  
Typical Application  
The ACS756 outputs an analog signal (VOUT) that varies linearly with the uni- or bi-directional AC or DC primary sampled current, IP,  
within the range specified. CF is for optimal noise management, with values that depend on the application.  
December 5, 2018  
ACS756xCB-DS, Rev. 6  
MCO-0000202  
Fully Integrated, Hall-Effect-Based Linear Current Sensor IC  
with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor  
ACS756xCB  
DESCRIPTION (continued)  
(pins 1 through 3). This allows the ACS756 family of sensor ICs The device is fully calibrated prior to shipment from the factory.  
to be used in applications requiring electrical isolation without the TheACS75x family is lead (Pb) free.All leads are plated with 100%  
use of opto-isolators or other costly isolation techniques.  
matte tin, and there is no Pb inside the package. The heavy gauge  
leadframe is made of oxygen-free copper.  
Selection Guide  
TOP  
Primary Sampled  
Current , IP (A)  
Part Number [1]  
(°C)  
Packing [2]  
ACS756SCA-050B-PFF-T [3]  
ACS756SCB-050B-PFF-T  
ACS756SCA-100B-PFF-T [3]  
ACS756SCB-100B-PFF-T  
ACS756SCB-100B-PSF-T  
ACS756KCA-050B-PFF-T [3]  
ACS756KCB-050B-PFF-T  
–20 to 85  
–20 to 85  
–20 to 85  
–20 to 85  
–20 to 85  
–40 to 125  
–40 to 125  
±50  
±50  
±100  
±100  
±100  
±50  
34 per tube  
±50  
[1] Additional leadform options available for qualified volumes  
[2] Contact Allegro for additional packing options.  
[3] Part variant is discontinued. Samples are no longer available. For new customers or new applications, please contact Allegro.  
Date of status change: December 5, 2016.  
SPECIFICATIONS  
Absolute Maximum Ratings  
Characteristic  
Symbol  
VCC  
Notes  
Rating  
8
Units  
Forward Supply Voltage  
V
V
V
V
Reverse Supply Voltage  
Forward Output Voltage  
Reverse Output Voltage  
VRCC  
–0.5  
28  
VIOUT  
VRIOUT  
–0.5  
Voltage applied between pins 1-3 and 4-5; tested at 3000  
VAC for 1 minute according to  
UL standard 60950-1  
Working Voltage for Reinforced Isolation  
Working Voltage for Basic Isolation  
VWORKING-R  
353  
500  
VDC/Vpk  
VDC/Vpk  
Voltage applied between pins 1-3 and 4-5; tested at 3000  
VAC for 1 minute according to  
VWORKING-B  
UL standard 60950-1  
Output Source Current  
Output Sink Current  
IOUT(Source)  
IOUT(Sink)  
VIOUT to GND  
VCC to VIOUT  
Range K  
3
mA  
mA  
°C  
1
–40 to 125  
–20 to 85  
165  
Nominal Operating Ambient Temperature  
TOP  
Range S  
°C  
Maximum Junction  
TJ(max)  
Tstg  
°C  
Storage Temperature  
–65 to 165  
°C  
2
Allegro MicroSystems, LLC  
955 Perimeter Road  
Manchester, NH 03103-3353 U.S.A.  
www.allegromicro.com  
Fully Integrated, Hall-Effect-Based Linear Current Sensor IC  
with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor  
ACS756xCB  
+5 V  
VCC  
IP+  
To all subcircuits  
VIOUT  
Amp  
Out  
0.1 µF  
Temperature  
Coefficient  
Gain  
Offset  
Trim Control  
GND  
IP–  
Functional Block Diagram  
Terminal List Table  
IP+  
IP–  
4
5
Number  
Name  
VCC  
GND  
VIOUT  
IP+  
Description  
3
2
1
VIOUT  
GND  
VCC  
1
2
3
4
5
Device power supply terminal  
Signal ground terminal  
Analog output signal  
Terminal for current being sampled  
Terminal for current being sampled  
Pinout Diagram  
IP–  
3
Allegro MicroSystems, LLC  
955 Perimeter Road  
Manchester, NH 03103-3353 U.S.A.  
www.allegromicro.com  
Fully Integrated, Hall-Effect-Based Linear Current Sensor IC  
with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor  
ACS756xCB  
COMMON OPERATING CHARACTERISTICS [1]: Over full range of TOP and VCC = 5 V, unless otherwise specified  
Characteristic  
Supply Voltage [2]  
Symbol  
Test Conditions  
Min.  
Typ.  
5.0  
10  
Max.  
5.5  
14  
Units  
VCC  
3
V
Supply Current  
ICC  
VCC = 5.0 V, output open  
mA  
µs  
Power On Time  
tPO  
TA = 25°C  
35  
Rise Time  
tr  
IP = three-quarter scale of IP+, TA = 25°C, COUT = 0.47 nF  
3
µs  
Internal Bandwidth [3]  
Output Load Resistance  
Output Load Capacitance  
Primary Conductor Resistance  
Symmetry  
BWi  
–3 dB; IP is 10 A peak-to-peak; 100 pF from VIOUT to GND  
120  
kHz  
kΩ  
nF  
RLOAD(MIN)  
CLOAD(MAX)  
RPRIMARY  
ESYM  
VIOUT to GND  
VIOUT to GND  
TA = 25°C  
4.7  
10  
100  
100  
µΩ  
%
Over half-scale of Ip  
98.5  
101.5  
Bidirectional 0 A Output  
Magnetic Offset Error  
Ratiometry  
VOUT(QBI)  
IERROM  
VRAT  
IP = 0 A, TA = 25°C  
VCC / 2  
±0.20  
100  
V
A
IP = 0 A, after excursion of 100 A  
VCC = 4.5 to 5.5 V  
%
µs  
Propagation Time  
tPROP  
TA = 25°C, COUT = 100 pF,  
1
[1] Device is factory-trimmed at 5 V, for optimal accuracy.  
[2] Devices are programmed for maximum accuracy at 5.0 V VCC levels. The device contains ratiometry circuits that accurately alter the 0 A Output Voltage and Sensitivity  
level of the device in proportion to the applied VCC level. However, as a result of minor nonlinearities in the ratiometry circuit additional output error will result when VCC  
varies from the 5 V VCC level. Customers that plan to operate the device from a 3.3 V regulated supply should contact their local Allegro sales representative regarding  
expected device accuracy levels under these bias conditions.  
[3] Guaranteed by design.  
4
Allegro MicroSystems, LLC  
955 Perimeter Road  
Manchester, NH 03103-3353 U.S.A.  
www.allegromicro.com  
Fully Integrated, Hall-Effect-Based Linear Current Sensor IC  
with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor  
ACS756xCB  
ACS756KCB-050 PERFORMANCE CHARACTERISTICS [1]: TOP = –40°C to 125°C, VCC= 5 V, unless otherwise specified  
Characteristic  
Symbol  
Test Conditions  
Min.  
–50  
Typ.  
Max.  
50  
Units  
Primary Sampled Current  
IP  
A
SensTA  
SensTOP  
VNOISE  
ELIN(HT)  
ELIN(LT)  
VOE(TA)  
Half scale of IP applied for 5 ms, TA = 25°C  
Half scale of IP applied for 5 ms  
40  
mV/A  
mV/A  
mV  
%
Sensitivity  
Noise [2]  
37.2  
42.8  
TA= 25°C, 10 nF on VIOUT pin to GND  
Up to full scale of IP, IP applied for 5 ms, TOP = 25°C to 125°C  
Up to full scale of IP, IP applied for 5 ms, TOP = –40°C to 25°C  
IP = 0 A, TA = 25°C  
10  
–1  
1
Nonlinearity  
–1.8  
1.8  
%
±2  
mV  
mV  
mV  
%
Electrical Offset Voltage [3]  
Total Output Error [4]  
VOE(TOP)HT IP = 0 A, TOP = 25°C to 125°C  
VOE(TOP)LT IP = 0 A, TOP = –40°C to 25°C  
–30  
–60  
–7.5  
–7.5  
30  
60  
7.5  
7.5  
ETOT(HT)  
ETOT(LT)  
Over full scale of IP, IP applied for 5 ms, TOP = 25°C to 125°C  
Over full scale of IP, IP applied for 5 ms, TOP = –40°C to 25°C  
%
[1] Device may be operated at higher primary current levels, IP, and ambient temperatures, TOP, provided that the Maximum Junction Temperature, TJ(max), is not exceeded.  
[2] 6σ noise voltage.  
[3]  
V
drift is referred to ideal VOE = 2.5 V at 0 A.  
OE(TOP)  
[4] Percentage of IP, with IP = 25 A. Output filtered.  
ACS756SCB-050 PERFORMANCE CHARACTERISTICS [1]: TOP = –20°C to 85°C, VCC= 5 V, unless otherwise specified  
Characteristic  
Symbol  
Test Conditions  
Min.  
–50  
Typ.  
Max.  
50  
Units  
Primary Sampled Current  
IP  
A
SensTA  
Half scale of IP applied for 5 ms, TA = 25°C  
40  
mV/A  
mV/A  
mV  
%
Sensitivity  
Noise [2]  
SensTOP Half scale of IP applied for 5 ms  
38.3  
41.7  
VNOISE  
ELIN(HT)  
ELIN(LT)  
VOE(TA)  
TA= 25°C, 10 nF on VIOUT pin to GND  
10  
Up to full scale of IP, IP applied for 5 ms, TOP = 25°C to 85°C  
Up to full scale of IP, IP applied for 5 ms, TOP = –20°C to 25°C  
IP = 0 A, TA = 25°C  
–1  
1
Nonlinearity  
–1  
1
%
±2  
mV  
mV  
mV  
%
Electrical Offset Voltage [3]  
Total Output Error [4]  
VOE(TOP)HT IP = 0 A, TOP = 25°C to 85°C  
VOE(TOP)LT IP = 0 A, TOP = –20°C to 25°C  
–30  
–30  
–5  
30  
30  
5
ETOT(HT)  
ETOT(LT)  
Over full scale of IP, IP applied for 5 ms, TOP = 25°C to 85°C  
Over full scale of IP, IP applied for 5 ms, TOP = –20°C to 25°C  
–5  
5
%
[1] Device may be operated at higher primary current levels, IP, and ambient temperatures, TOP, provided that the Maximum Junction Temperature, TJ(max), is not exceeded.  
[2] 6σ noise voltage.  
[3]  
V
drift is referred to ideal VOE = 2.5 V at 0 A.  
OE(TOP)  
[4] Percentage of IP, with IP = 25 A. Output filtered.  
5
Allegro MicroSystems, LLC  
955 Perimeter Road  
Manchester, NH 03103-3353 U.S.A.  
www.allegromicro.com  
Fully Integrated, Hall-Effect-Based Linear Current Sensor IC  
with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor  
ACS756xCB  
ACS756SCB-100 PERFORMANCE CHARACTERISTICS [1]: TOP = –20°C to 85°C, VCC= 5 V, unless otherwise specified  
Characteristic  
Symbol  
Test Conditions  
Min.  
–100  
Typ.  
Max.  
100  
Units  
Primary Sampled Current  
IP  
A
SensTA  
SensTOP  
VNOISE  
ELIN(HT)  
ELIN(LT)  
VOE(TA)  
Half scale of IP applied for 5 ms, TA = 25°C  
Half scale of IP applied for 5 ms  
20  
mV/A  
mV/A  
mV  
%
Sensitivity  
Noise [2]  
18.2  
21.8  
TA= 25°C, 10 nF on VIOUT pin to GND  
Up to full scale of IP, IP applied for 5 ms, TOP = 25°C to 85°C  
Up to full scale of IP, IP applied for 5 ms, TOP = –20°C to 25°C  
IP = 0 A, TA = 25°C  
6
– 1.75  
– 1  
1.75  
1
Nonlinearity  
%
±2  
mV  
mV  
mV  
%
Electrical Offset Voltage [3]  
Total Output Error [4]  
VOE(TOP)HT IP = 0 A, TOP = 25°C to 85°C  
VOE(TOP)LT IP = 0 A, TOP = –20°C to 25°C  
–30  
–30  
–8  
30  
30  
8
ETOT(HT)  
ETOT(LT)  
Over full scale of IP, IP applied for 5 ms, TOP = 25°C to 85°C  
Over full scale of IP, IP applied for 5 ms, TOP = –20°C to 25°C  
–7  
7
%
[1] Device may be operated at higher primary current levels, IP, and ambient temperatures, TOP, provided that the Maximum Junction Temperature, TJ(max), is not exceeded.  
[2] 6σ noise voltage.  
[3]  
V
drift is referred to ideal VOE = 2.5 V at 0 A.  
OE(TOP)  
[4] Percentage of IP, with IP = 25 A. Output filtered.  
6
Allegro MicroSystems, LLC  
955 Perimeter Road  
Manchester, NH 03103-3353 U.S.A.  
www.allegromicro.com  
Fully Integrated, Hall-Effect-Based Linear Current Sensor IC  
with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor  
ACS756xCB  
DEFINITIONS OF ACCURACY CHARACTERISTICS  
The ratiometric change (%) in the quiescent voltage output is  
defined as:  
Sensitivity (Sens)  
The change in device output in response to a 1A change through  
the primary conductor. The sensitivity is the product of the mag-  
netic circuit sensitivity (G/A) and the linear IC amplifier gain  
(mV/G). The linear IC amplifier gain is programmed at the factory  
to optimize the sensitivity (mV/A) for the half-scale current of the  
device.  
VIOUTQ(V  
VIOUTQ(5V)  
)
CC  
VIOUTQ(V)  
× 100%  
=
VCC  
5 V  
and the ratiometric change (%) in sensitivity is defined as:  
Sens(V  
Sens(5V)  
)
CC  
Sens(V)  
× 100%  
=
VCC  
5 V  
Noise (VNOISE  
)
The noise floor is derived from the thermal and shot noise  
observed in Hall elements. Dividing the noise (mV) by the sensi-  
tivity (mV/A) provides the smallest current that the device is able  
to resolve.  
Quiescent Output Voltage (V  
)
IOUT(Q)  
The output of the device when the primary current is zero. For  
a unipolar supply voltage, it nominally remains at VCC ⁄ 2. Thus,  
VCC = 5 V translates into VIOUT(Q) = 2.5 V. Variation in VOUT(Q)  
can be attributed to the resolution of the Allegro linear IC quies-  
cent voltage trim, magnetic hysteresis, and thermal drift.  
Nonlinearity (ELIN  
)
The degree to which the voltage output from the IC varies in  
direct proportion to the primary current through its half-scale  
amplitude. Nonlinearity in the output can be attributed to the  
saturation of the flux concentrator approaching the half-scale cur-  
rent. The following equation is used to derive the linearity:  
Electrical Offset Voltage (VOE)  
The deviation of the device output from its ideal quiescent value  
of VCC ⁄ 2 due to nonmagnetic causes.  
Magnetic Offset Error (IERROM  
)
) [ {  
V
VIOUT(Q)  
gain × % sat (  
IOUT_half-scale amperes  
2 (VIOUT_quarter-scale amperes VIOUT(Q)  
100  
1–  
{
[
)
The magnetic offset is due to the residual magnetism (remnant  
field) of the core material. The magnetic offset error is highest  
when the magnetic circuit has been saturated, usually when the  
device has been subjected to a full-scale or high-current overload  
condition. The magnetic offset is largely dependent on the mate-  
rial used as a flux concentrator. The larger magnetic offsets are  
observed at the lower operating temperatures.  
where  
∆ gain = the gain variation as a function of temperature  
changes from 25°C,  
% sat = the percentage of saturation of the flux concentra-  
tor, which becomes significant as the current being sampled  
approaches half-scale ±IP , and  
Total Output Error (ETOT  
)
VIOUT_half-scale amperes = the output voltage (V) when the  
sampled current approximates half-scale ±IP .  
The maximum deviation of the actual output from its ideal value,  
also referred to as accuracy, illustrated graphically in the output  
voltage versus current chart on the following page.  
Symmetry (ESYM  
)
The degree to which the absolute voltage output from the IC  
varies in proportion to either a positive or negative half-scale pri-  
mary current. The following equation is used to derive symmetry:  
E
TOT is divided into four areas:  
• 0 A at 25°C. Accuracy at the zero current flow at 25°C,  
without the effects of temperature.  
VIOUT_+ half-scale amperes VIOUT(Q)  
100  
VIOUT(Q) VIOUT_–half-scale amperes  
0 A over Δ temperature. Accuracy at the zero current flow  
including temperature effects.  
Ratiometry  
• Half-scale current at 25°C. Accuracy at the the half-scale current  
at 25°C, without the effects of temperature.  
The device features a ratiometric output. This means that the qui-  
escent voltage output, VIOUTQ, and the magnetic sensitivity, Sens, Half-scale current over Δ temperature. Accuracy at the half-scale  
are proportional to the supply voltage, VCC  
.
current flow including temperature effects.  
7
Allegro MicroSystems, LLC  
955 Perimeter Road  
Manchester, NH 03103-3353 U.S.A.  
www.allegromicro.com  
Fully Integrated, Hall-Effect-Based Linear Current Sensor IC  
with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor  
ACS756xCB  
DEFINITIONS OF DYNAMIC RESPONSE CHARACTERISTICS  
Power-On Time (tPO)  
When the supply is ramped to its operating voltage, the device  
requires a finite time to power its internal components before  
responding to an input magnetic field.  
Power-On Time, tPO , is defined as the time it takes for the output  
voltage to settle within ±10% of its steady state value under an  
applied magnetic field, after the power supply has reached its  
minimum specified operating voltage, VCC(min), as shown in the  
chart at right.  
Rise Time (tr)  
The time interval between a) when the device reaches 10% of its  
full scale value, and b) when it reaches 90% of its full scale value.  
The rise time to a step response is used to derive the bandwidth  
of the device, in which ƒ(–3 dB) = 0.35/tr. Both tr and tRESPONSE  
are detrimentally affected by eddy current losses observed in the  
conductive IC ground plane.  
Power-On TIme (tPO  
)
Primary Current  
I (%)  
90  
Propagation Delay (tPROP  
)
The time required for the device output to reflect a change in  
the primary current signal. Propagation delay is attributed to  
inductive loading within the linear IC package, as well as in the  
inductive loop formed by the primary conductor geometry. Propa-  
gation delay can be considered as a fixed time offset and may be  
compensated.  
Transducer Output  
10  
0
t
Increasing VIOUT(V)  
Rise Time, t  
r
Accuracy  
Over Temp erature  
Rise TIme (tr)  
Accuracy  
25°C Only  
Average  
V
IOUT  
Primary Current  
I (%)  
90  
Accuracy  
Over Temp erature  
Accuracy  
25°C Only  
IP(min)  
–IP (A)  
+IP (A)  
Half Scale  
IP(max)  
Transducer Output  
0 A  
0
t
Propagation Time, tPROP  
Accuracy  
25°C Only  
Propagation Delay (tPROP  
)
Accuracy  
Over Temp erature  
Decreasing VIOUT(V)  
Output Voltage versus Sampled Current  
Total Output Error at 0 A and at Half-Scale Current  
8
Allegro MicroSystems, LLC  
955 Perimeter Road  
Manchester, NH 03103-3353 U.S.A.  
www.allegromicro.com  
Fully Integrated, Hall-Effect-Based Linear Current Sensor IC  
with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor  
ACS756xCB  
CHOPPER STABILIZATION TECHNIQUE  
Chopper Stabilization is an innovative circuit technique that is  
result of this chopper stabilization approach, the output voltage  
used to minimize the offset voltage of a Hall element and an asso- from the Hall IC is desensitized to the effects of temperature and  
ciated on-chip amplifier. Allegro’s Chopper Stabilization tech-  
nique nearly eliminates Hall IC output drift induced by tempera-  
ture or package stress effects. This offset reduction technique is  
based on a signal modulation-demodulation process. Modulation  
is used to separate the undesired DC offset signal from the mag-  
netically induced signal in the frequency domain. Then, using  
a low-pass filter, the modulated DC offset is suppressed while  
the magnetically induced signal passes through the filter. As a  
mechanical stress. This technique produces devices that have an  
extremely stable Electrical Offset Voltage, are immune to thermal  
stress, and have precise recoverability after temperature cycling.  
This technique is made possible through the use of a BiCMOS  
process that allows the use of low-offset and low-noise amplifiers  
in combination with high-density logic integration and sample  
and hold circuits.  
Regulator  
Clock/Logic  
Low-Pass  
Filter  
Hall Element  
Amp  
Concept of Chopper Stabilization Technique  
9
Allegro MicroSystems, LLC  
955 Perimeter Road  
Manchester, NH 03103-3353 U.S.A.  
www.allegromicro.com  
Fully Integrated, Hall-Effect-Based Linear Current Sensor IC  
with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor  
ACS756xCB  
PACKAGE OUTLINE DRAWINGS  
For Reference Only – Not for Tooling Use  
(Reference DWG-9111 & DWG-9110)  
Dimensions in millimeters – NOT TO SCALE  
Dimensions exclusive of mold flash, gate burs, and dambar protrusions  
Exact case and lead configuration at supplier discretion within limits shown  
14.0 0.2  
0.5  
3.5 0.2  
1º 2ꢀ  
R1  
4.0 0.2  
R2  
3.0 0.2  
R3  
1.50 0.10  
5
4
A
0.5  
B
3
4
17.5 0.2  
21.4  
13.00 0.10  
Branded  
Face  
4.40 0.10  
0.8  
1.5  
1.9 0.2  
0.51 0.10  
2.9 0.2  
1
2
3
+0.060  
–0.030  
1.91  
0.381  
5º 5ꢀ  
3.5 0.2  
10.00 0.10  
B
PCB Layout Reference View  
NNNNNNN  
TTT-AAA  
7.00 0.10  
LLLLLLL  
YYWW  
A
B
C
Dambar removal intrusion  
Perimeter through-holes recommended  
Branding scale and appearance at supplier discretion  
1
C
Standard Branding Reference View  
N = Device part number  
T = Temperature code  
A = Amperage range  
L = Lot number  
Y = Last two digits of year of  
manufacture  
W = Week of manufacture  
= Supplier emblem  
Package CB, 5-Pin, Leadform PFF  
10  
Allegro MicroSystems, LLC  
955 Perimeter Road  
Manchester, NH 03103-3353 U.S.A.  
www.allegromicro.com  
Fully Integrated, Hall-Effect-Based Linear Current Sensor IC  
with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor  
ACS756xCB  
For Reference Only – Not for Tooling Use  
(Reference DWG-9111, DWG-9110)  
Dimensions in millimeters – NOT TO SCALE  
Dimensions exclusive of mold flash, gate burs, and dambar protrusions  
Exact case and lead configuration at supplier discretion within limits shown  
14.0 0.2  
4.0 0.2  
3.0 0.2  
0.8  
5
4
1.5  
1.50 0.10  
1.91  
B
PCB Layout Reference View  
2.75 0.10  
A
23.50 0.5  
NNNNNNN  
TTT-AAA  
13.00 0.10  
4.40 0.10  
Branded  
Face  
LLLLLLL  
YYWW  
1.9 0.2  
0.51 0.10  
2.9 0.2  
C
Standard1Branding Reference View  
1
2
3
+0.060  
–0.030  
N = Device part number  
T = Temperature code  
A = Amperage range  
L = Lot number  
0.381  
5º 5ꢀ  
3.5 0.2  
Y = Last two digits of year of  
manufacture  
W = Week of manufacture  
= Supplier emblem  
10.00 0.10  
7.00 0.10  
A
B
C
Dambar removal intrusion  
Perimeter through-holes recommended  
Branding scale and appearance at supplier discretion  
Package CB, 5-Pin, Leadform PSF  
11  
Allegro MicroSystems, LLC  
955 Perimeter Road  
Manchester, NH 03103-3353 U.S.A.  
www.allegromicro.com  
Fully Integrated, Hall-Effect-Based Linear Current Sensor IC  
with 3 kVRMS Voltage Isolation and a Low-Resistance Current Conductor  
ACS756xCB  
REVISION HISTORY  
Number  
Date  
Description  
1
2
3
4
5
6
December 16, 2014  
February 9, 2015  
June 4, 2015  
Initial Release  
Added TUV/UL Certification info  
Added CA package NND information and CB package to selection guide  
Updated CA package variant to discontinued status  
Updated product status  
December 5, 2016  
June 7, 2017  
September 18, 2018 Added -PSF package option  
December 5, 2018 Updated TUV/UL Certification  
Copyright ©2018, Allegro MicroSystems, LLC  
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to  
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that  
the information being relied upon is current.  
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of  
Allegro’s product can reasonably be expected to cause bodily harm.  
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its  
use; nor for any infringement of patents or other rights of third parties which may result from its use.  
Copies of this document are considered uncontrolled documents.  
For the latest version of this document, visit our website:  
www.allegromicro.com  
12  
Allegro MicroSystems, LLC  
955 Perimeter Road  
Manchester, NH 03103-3353 U.S.A.  
www.allegromicro.com  

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