A3909GLYTR-T [ALLEGRO]
Voice Coil Motor Controller, 1A, PDSO10, LEAD FREE, MSOP-10;
| 型号： | A3909GLYTR-T |
| 厂家： | 
ALLEGRO MICROSYSTEMS |
| 描述： | Voice Coil Motor Controller, 1A, PDSO10, LEAD FREE, MSOP-10 驱动器 |
| 文件： | 总10页 (文件大小：267K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
A3909
Dual Full Bridge Motor Driver
Description
Features and Benefits
• Low RDS(on) outputs
The A3909 is a dual full bridge motor driver, designed for
12 V medium power applications. The outputs are rated for
operation through a power supply range of 4 to 18 V, and
capable of up to 1 A per phase.
• Drives two DC motors or single stepper motor
• Low power standby (Sleep) mode with zero current drain
• Thermal shutdown protection
• Parallel operation option for 1.8 A, single DC motor
• Overcurrent protection:
Paralleling the outputs is possible for higher amperage single
DC motor applications.
▫ Output to supply short
▫ Output to GND short
▫ Output load short
Thefourinputs(IN1toIN4)cancontrolDCmotorsinforward,
reverse, brake, and coast modes, or a bipolar stepper motor in
full- and half-step modes.
TheA3909issuppliedina10-pinMSOPpackagewithexposed
thermal pad (suffix LY) and a 10-pin SSOP (suffix LN) for
wave solder applications. Both packages are lead (Pb) free
with 100% matte-tin leadframe plating.
Packages:
10-pin MSOP
with exposed thermal pad
10-pin SSOP
(LN package)
(LY package)
Not to scale
Functional Block Diagram
Load Supply
Load Supply
VBB
VBB
Control
Logic
IN1
IN2
OUT1
OUT2
OUT1
OUT2
TSD
UVLO
OCP
Disable
VBB
GND
GND
VBB
Control
Logic
IN3
IN4
OUT3
OUT4
OUT3
OUT4
TSD
UVLO
OCP
Disable
VBB
GND
PAD
Configuration
for driving
2 DC motors
Configuration
for parallel operation
at 1.8 A
LY package
A3909-DS
A3909
Dual Full Bridge Motor Driver
Selection Guide
Part Number
Package
Packing
A3909GLNx-T*
10-pin SSOP
3000 pieces per 13-in. reel
10-pin MSOP with
exposed thermal pad
A3909GLYTR-T
4000 pieces per 13-in. reel
*Contact Allegro Sales for availability of this package option.
Absolute Maximum Ratings*
Characteristic
Symbol
VBB
Notes
Rating
18
Unit
V
Supply Voltage
Logic Input Voltage Range
Output Current
VIN
–0.3 to 6
1
V
IOUT
V
Output Voltage
VOUT
TA
–0.3 to VBB + 1
–40 to 105
150
V
Operating Ambient Temperature
Maximum Junction Temperature
Storage Temperature
G temperature range
ºC
ºC
ºC
TJ(max)
Tstg
–55 to 150
Thermal Characteristics may require derating at maximum conditions, see application information
Characteristic
Symbol
Test Conditions*
Value Unit
LN package (estimated), on 1-layer PCB with copper limited
to pin area
LY package, on 2-layer PCB with 2.260 in.2 of copper area
each side
130
48
ºC/W
ºC/W
Package Thermal Resistance
RθJA
*Additional thermal information available on the Allegro website.
Terminal List Table
Number
Name
Function
Pin-out Diagram
1
2
IN1
Logic input
IN2
Logic input
IN1
IN2
10
9
OUT1
OUT2
GND
1
2
3
4
5
3
VBB
IN3
Input supply
Logic input
PAD
(LY
package)
4
VBB
IN3
8
5
IN4
Logic input
7
OUT3
OUT4
IN4
6
6
OUT4
OUT3
GND
OUT2
OUT1
PAD
Motor terminal
Motor terminal
Ground
7
LN and LY packages
8
9
Motor terminal
Motor terminal
10
–
(LY package) Exposed thermal pad
Allegro MicroSystems, LLC
115 Northeast Cutoff
2
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A3909
Dual Full Bridge Motor Driver
ELECTRICAL CHARACTERISTICS* Valid at TA = 25°C; unless otherwise specified
Characteristic
Symbol
Test Conditions
Min.
4
Typ.
–
Max.
18
8
Unit
V
VBB Voltage Range
VBB
–
4
mA
μA
Ω
VBB Supply Current
IBB
Standby Mode
–
<1
1.6
2.7
1.12
0.48
–
10
2
I = 1 A, TJ = 25°C, VBB = 12 V
I = 1 A, TJ = 25°C, VBB = 4 V
–
Total Driver On-Resistance (Sink +
Source)
RDS(on)tot
–
3.5
–
Ω
Source Driver On-Resistance
Sink Driver On-Resistance
Input Logic Low Level
Input Logic Low Level
Input Logic High Level
Input Hysteresis
RDS(on)src I = 1 A, TJ = 25°C, VBB = 12 V
–
Ω
RDS(on)snk I = 1 A, TJ = 25°C, VBB = 12 V
–
–
Ω
VIL(Standby) All inputs low
–
0.4
0.8
–
V
VIL
VIH
–
–
V
2
–
V
VHYS
100
–
300
100
3.6
300
1
500
150
3.95
500
1.5
180
–
mV
μA
V
Logic Input Current
IIN
VBBUVLO VBB rising
VBBHYS
VIN = 5 V (Pull down = 50 kΩ)
VBB UVLO
–
VBB UVLO Hysteresis
Standby Timer
100
–
mV
ms
°C
°C
tSTB
TJTSD
ΔTJ
IN1 = IN2 = IN3 = IN4 < VIL(Standby)
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Temperature increasing
150
–
165
20
Recovery = TJTSD – ΔTJ
*Specified limits are tested at a single temperature and assured through operating temperature range by design and characterization.
Allegro MicroSystems, LLC
115 Northeast Cutoff
3
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A3909
Dual Full Bridge Motor Driver
Motor Operation Truth Table
Stepper Motor
IN1
0
IN2
0
IN3
0
IN4
0
OUT1
Off
H
OUT2
Off
L
OUT3
Off
H
OUT4
Off
L
Function
Sleep Mode Sleep Mode
1
0
1
0
Step 1
Step 1
Step 2
Step 3
Step 4
Step 5
Step 6
Step 7
Step 8
0
0
1
0
Off
L
Off
H
H
L
–
Step 2
–
0
1
1
0
H
L
0
1
0
0
L
H
Off
L
Off
H
0
1
0
1
L
H
Step 3
–
0
0
0
1
Off
H
Off
L
L
H
1
0
0
1
L
H
Step 4
–
1
0
0
0
H
L
Off
Off
DC Motors (Dual)
IN1 or IN3
IN2 or IN4
OUT1
OUT2
OUT3
OUT4
Function
High Impedance
(Sleep Mode) / Coast
0
0
Off
Off
Off
Off
1
0
1
1
H
L
L
L
H
L
H
L
L
L
H
L
Forward
Reverse
Brake
0
1
DC Motor (Single, Paralleled)
IN1 or IN3
IN2 or IN4
OUT1
OUT2
OUT3
OUT4
Function
High Impedance
(Sleep Mode) / Coast
0
0
Off
Off
Off
Off
1
0
1
1
H
L
L
L
H
L
H
L
L
L
H
L
Forward
Reverse
Brake
0
1
DC Motor (External PWM)
IN1 or IN3
IN2 or IN4
OUT1
OUT2
OUT3
OUT4
Function
Forward
1
0
0
0
1
1
0
1
0
0
1
0
0
1
1
1
H
Off
L
L
Off
H
H
Off
L
L
Off
H
Fast Decay
Reverse
Off
H
Off
L
Off
H
Off
L
Fast Decay
Forward
L
L
L
L
Slow Decay
Reverse
L
H
L
H
L
L
L
L
Slow Decay
NOTE: 0 = logic low with VINx < VIN(0)(max), 1 = logic high with VINx > VIN(1)(min), H = voltage high, source driver on, L = voltage low, sink driver on
Allegro MicroSystems, LLC
115 Northeast Cutoff
4
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A3909
Dual Full Bridge Motor Driver
Functional Description
turned on. If the current exceeds 1.8 A for longer than 2 μs, then
a fault condition is asserted. The sink driver utilizes a drain-to-
source voltage monitor. If the voltage exceeds 2 V for longer than
2 μs, the fault condition is asserted.
Device Operation
The 3909 is designed to operate two DC motors or a single
stepper motor. The outputs are PMOS source drivers combined
with low RDS(on) DMOS sink drivers.
Protection circuitry includes internal thermal shutdown, protec-
tion against shorted loads, and against outputs shorted to GND
or supply. Undervoltage lockout prevents damage by keeping the
outputs off until the driver has enough voltage to operate nor-
mally.
When a fault occurs, the IC immediately disables both sides of
the full bridge where the fault occurred. The full bridge input
commands will be ignored for a 2 ms period before being allowed
to retry. Each channel has independent overcurrent protection.
During OCP events, the absolute ratings may be exceeded for a
short period of time before the outputs are disabled.
A low power standby (Sleep) mode is activated when all inputs
are low for longer than 1 ms. Sleep mode disables all of the cir-
cuitry making the IC ideal for battery operated applications.
Thermal Shutdown
If the die temperature increases to TJTSD , then all outputs are dis-
abled until the internal temperature falls below a hysteresis level,
Overcurrent Protection (OCP)
The A3909 is protected against accidental shorts or motor outputs
to ground and supply, as well as a shorted load condition. For
the source drivers, the current is monitored after the MOSFET is
TTSDHYS, of 20°C. Internal UVLO is detected on VBB to prevent
output drivers from turning on when below the UVLO threshold.
DC Motor Timing Diagram
tSTANDBY
IN1
IN2
OUT1
OUT2
Current (12)
2
3
4
5
6
7
1) Low power standby (Sleep) mode (I = 0)
5) Fast decay PWM
6) Coast
BB
2) On, reverse – 100% d
uty cycle
3) On, forward – 100% duty cycle
4) Slow decay PWM
7) Low power standby (Sleep) mode
after t (I = 0)
STANBY BB
Allegro MicroSystems, LLC
115 Northeast Cutoff
5
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A3909
Dual Full Bridge Motor Driver
Stepper Motor Timing Diagram
tSTANDBY
IN1
IN2
OUT1
OUT2
Current (12)
2
3
4
5
6
7
IN1
IN2
IN3
IN4
Current (12)
Current (34)
1
2
3
4
1
2
3
4
5
6
7
8
1
I
(2/4)
I
(2/4)
2
1
3
2
1
4
5
8
7
I (1/3)
I(1/3)
3
4
6
Full Step
Half Step
Allegro MicroSystems, LLC
115 Northeast Cutoff
6
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A3909
Dual Full Bridge Motor Driver
Application Information
A3909
1
2
10
9
IN1
IN2
VBB
IN3
IN4
OUT1
OUT2
GND
System
Controller
PAD
(LY package)
DC Motor
Load
Supply
3
4
8
7
OUT3
OUT4
5
6
Configuration for parallel operation with 1.8 A output current capability
LN package board
LY package board via layout for thermal dissipation
V
BB
OUT1
OUT2
OUT3
OUT4
IN1
IN4
50 kΩ
6.5 V
GND
V
BB
IN2
IN3
VBB
50 kΩ
21 V
21V
Input Output Pin Structures
Allegro MicroSystems, LLC
115 Northeast Cutoff
7
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A3909
Dual Full Bridge Motor Driver
Package LN, 10-Pin SSOP
4.90 ±0.20
0° to 8°
1.00
0.65
10
10
0.21 ±0.04
2.25
3.90 ±0.10 6.00 ±0.20
4.95
A
1.05 (REF)
1.27
0.40
1
2
2
1
Branded Face
PCB Layout Reference View
C
1.55 ±0.20
0.25
0.10
0.45
0.30
NNNNNNN
YYWW
LLLL
1.00
BSC
1
For Reference Only; not for tooling use
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
Standard Branding Reference View
B
N = Device part number
= Supplier emblem
Y = Last two digits of year of manufacture
W = Week of manufacture
L = Lot number
A
B
C
Terminal #1 mark area
Branding scale and appearance at supplier discretion
Reference land pattern layout. All pads a minimum of 0.20 mm from all
adjacent pads; adjust as necessary to meet application process
requirements and PCB layout tolerances; when mounting on a multilayer
PCB, thermal vias near the pin lands can improve thermal dissipation
(reference EIA/JEDEC Standard JESD51-7)
Allegro MicroSystems, LLC
115 Northeast Cutoff
8
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A3909
Dual Full Bridge Motor Driver
Package LY, 10-Pin MSOP
With Exposed Thermal Pad
0.50
0.30
1.65
10
3.00 ±0.10
0° to 6°
10
0.15 ±0.05
3.00 ±0.10
4.88 ±0.20
1.73 4.60
A
0.53 ±0.10
0.25
1
1
2
1
1.98
2
Seating Plane
Gauge Plane
1.98 MIN
C
For Reference Only; not for tooling use (reference JEDEC MO-187BA-T)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
B
1.73
A
B
C
Terminal #1 mark area
Exposed thermal pad (bottom surface)
Reference land pattern layout (reference IPC7351 SOP50P490X110-11M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
10
0.86 ±0.05
SEATING
PLANE
0.27
0.18
0.50
REF
0.05
0.15
Allegro MicroSystems, LLC
115 Northeast Cutoff
9
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A3909
Dual Full Bridge Motor Driver
Copyright ©2013, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, LLC
115 Northeast Cutoff
10
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
相关型号：
A390J15C0GH5TAA
Ceramic Capacitor, Multilayer, Ceramic, 100V, 5% +Tol, 5% -Tol, C0G, 30ppm/Cel TC, 0.000039uF, Through Hole Mount, AXIAL LEADED, ROHS COMPLIANT
VISHAY
A390J15C0GH5UAA
Ceramic Capacitor, Multilayer, Ceramic, 100V, 5% +Tol, 5% -Tol, C0G, 30ppm/Cel TC, 0.000039uF, Through Hole Mount, AXIAL LEADED, ROHS COMPLIANT
VISHAY
©2020 ICPDF网 联系我们和版权申明