A3250LLT [ALLEGRO]
Analog Circuit, 1 Func, PSSO3, TO-243AA, SOT-89, 3 PIN;
| 型号： | A3250LLT |
| 厂家： | 
ALLEGRO MICROSYSTEMS |
| 描述： | Analog Circuit, 1 Func, PSSO3, TO-243AA, SOT-89, 3 PIN |
| 文件： | 总15页 (文件大小：354K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
A3250 and A3251
Field-Programmable, Chopper-Stabilized
Unipolar Hall-Effect Switches
Features and Benefits
Description
▪ Chopper stabilization for stable switchpoints throughout
operating temperature range
The A3250 and A3251 are field-programmable, chopper-
stabilized, unipolar Hall-effect switches designed for use in
high-temperature applications. These devices use a chop-
per-stabilization technique to eliminate offset inherent in
single-element devices.
▪ Externally programmable operate point (through VCC
pin)
▪ On-board voltage regulator for 4.2 V to 24 V operation
▪ On-chip protection against:
The A3250 and A3251 are externally programmable
devices. The devices have a wide range of programmabil-
ity of the magnetic operate point (BOP) while the hysteresis
remains fixed. This advanced feature allows for optimiza-
tion of the sensor switchpoint and can drastically reduce
the effects of variations found in a production environment,
such as magnet and device placement tolerances.
▫ Supply transients
▫ Output short-circuits
▫ Reverse-battery condition
These devices provide on-chip transient protection. A Zener
clamp on the power supply protects against overvoltage
conditions on the supply line. These devices also include
short-circuit protection on the output.
Package: 3 pin SOT89 (suffix LT) and
3 pin SIP (suffix UA)
The output of the A3250 switches LOW when subjected
to a south-polarity magnetic field with a flux density that
exceeds the threshold for BOP, and switches HIGH when the
Continued on the next page…
Not to scale
Functional Block Diagram
VCC
Program/Lock
Programming
Logic
Regulator
Offset Adjust
VOUT
Amp
Current Limit
Low-Pass
Filter
GND
3250-DS Rev. 3
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250 and
A3251
Description (continued)
field drops below the magnetic release point, BRP. The output of
the A3251 has the opposite polarity, switching HIGH in a south-
polarity magnetic field that BOP, and switching LOW when the
Three package styles provide a magnetically optimized package
for most applications. Type LT is a miniature SOT89/TO-243AA
surface mount package that is thermally enhanced with an
exposed ground tab, and type UA is a three-lead ultramini SIP
for through-hole mounting. The packages are lead (Pb) free, with
100% matte tin plated leadframes (suffix, –T).
field drops below BRP
.
The other differences in the devices are the power-on state. The
A3250 powers-on in the HIGH state, while the A3251 powers-on
in the LOW state.
Selection Guide
VOUT
TA
(ºC)
Part Number
Pb-free1
Packing2
Package
Power-On Running3
A3250ELT-T
A3250ELTTR-T
A3250EUA-T
A3250LLT-T
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Bulk, 500 pieces/bag
7-in. reel, 1000 pieces/reel
Bulk, 500 pieces/bag
Surface mount
SIP through hole
Surface mount
SIP through hole
Surface mount
SIP through hole
Surface mount
SIP through hole
–40 to 85
–40 to 150
–40 to 85
–40 to 150
High
High
Low
Low
Low
Low
High
High
Bulk, 500 pieces/bag
A3250LLTTR-T
A3250LUA-T
A3251ELT-T
A3251ELTTR-T
A3251EUA-T
A3251LLT-T
7-in. reel, 1000 pieces/reel
Bulk, 500 pieces/bag
Bulk, 500 pieces/bag
7-in. reel, 1000 pieces/reel
Bulk, 500 pieces/bag
Bulk, 500 pieces/bag
A3251LLTTR-T
A3251LUA-T
7-in. reel, 1000 pieces/reel
Bulk, 500 pieces/bag
1Pb-based variants are being phased out of the product line.
a. Certain variants cited in this footnote are in production but have been determined to be LAST TIME BUY. This classification indicates that sale of this
device is currently restricted to existing customer applications. The device should not be purchased for new design applications because obsolescence in
the near future is probable. Samples are no longer available. Status change: October 31, 2006. Deadlilne for receipt of LAST TIME BUY ORDERS: April
27, 2007. These variants include: A3250ELT, A3250ELTTR, A3250EUA, A3251ELT, A3251ELTTR, A3251EUA, A3251LLT, A3251LLTTR, and
A3251LUA.
b. Certain variants cited in this footnote are in production but have been determined to be NOT FOR NEW DESIGN. This classification
indicates that sale of this device is currently restricted to existing customer applications. The device should not be purchased for new
design applications because obsolescence in the near future is probable. Samples are no longer available. Status change: May 1, 2006.
These variants include: A3250LLT, A3250LLTTR, A3250LUA.
2
Contact Allegro for additional packing options.
3
In south polarity magnetic field of sufficient strength.
Absolute Maximum Ratings
Characteristic
Symbol
VCC
VRCC
VZ
Notes
Rating
26.5
Units
V
Supply Voltage
Reverse Supply Voltage
Zener Overvoltage
Output Current
–18
V
30
V
IOUT
B
20
mA
G
Magnetic Flux Density
Unlimited
–40 to 85
–40 to 150
165
Range E
Range L
ºC
ºC
ºC
ºC
Operating Ambient Temperature
TA
Maximum Junction Temperature
Storage Temperature
TJ(max)
Tstg
–65 to 170
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
2
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250 and
A3251
OPERATING CHARACTERISTICS valid over operating TA and VCC, unless otherwise specified
Characteristic
ELECTRICAL CHARACTERISTICS
Supply Voltage1
Symbol
Test Conditions
Min.
Typ.
Max.
Units
VCC
VOUT(sat)
IOFF
Running mode
4.2
–
–
24
400
10
V
Output Saturation Voltage
Output Leakage Current
IOUT = 20 mA; Switch state = ON
VOUT = 24 V; Switch state = OFF
A3250; B<BRP; VOUT = HIGH
A3251; B>BOP; VOUT = HIGH
A3250; B>BOP; VOUT = LOW
175
–
mV
μA
–
–
4.0
4.0
6.0
7.0
7.0
10.0
mA
mA
mA
ICC(off)
–
Supply Current
–
ICC(on)
A3251; B<BRP; VOUT = LOW
RLOAD = 820 Ω, CLOAD = 10 pF
RLOAD = 820 Ω, CLOAD = 10 pF
–
–
–
6.0
–
10.0
5.0
mA
μs
Output Rise Time
Output Fall Time
tr
tf
–
5.0
μs
Chopping Frequency
Power-Up Time
fC
ton
–
–
340
20
–
50
120
–
kHz
μs
VOUT = HIGH
Output Current Limit1,2
IOUT(lim)
Short-circuit protection
A3250; B < BRP, t > ton
A3251; B < BRP, t > ton
60
–
90
mA
mV
mV
HIGH
LOW
Power-On State
POS
–
–
MAGNETIC CHARACTERISTICS
Initial Operate Point
BOP
–20
–35
5.0
13
–
50
35
35
35
G
G
G
G
Temperature Drift of BOP
ΔBOP
BOP ≤ 500 gauss
Package TA range = J
Package TA range = L
18
13
Hysteresis (BOP – BRP
)
Bhys
5.0
PROGRAMMING CHARACTERISTICS
Programmable BOP Values3
Number of Programming Bits
Resolution
BOP(prog)
50
–
–
6
≥350
G
Bit
Bit
G
Switchpoint set
–
–
–
–
Programming lock
–
1
BRES
–
7.0
TRANSIENT PROTECTION CHARACTERISTICS
Supply Zener Voltage
Supply Zener Current
Reverse Battery Current
VZ
IZ
28
–
–
–
–
–
V
VCC = 28 V
13
mA
mA
IRCC
VRCC = –18 V, TJ < TJ(max)
–
–5.0
1 Do not exceed TJ(max): Additional information on power derating is provided in the applications section.
2 Short-circuit protection is not intended for continuous operation; permanent damage may result.
3
Device can be used below 50 G but is not guaranteed to be a unipolar switch. It is the responsibility of the programmer to verify that the desired
switchpoint has been achieved.
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
3
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250 and
A3251
Typical Characterization Data
All data are taken with A3250 devices, the average of 3 lots, 30 pieces per lot
Average BOP vs. TA
Program Code: 1, VCC = 12 V
Average BRP vs. TA
Program Code: 1, VCC = 12 V
10
5
30
25
20
15
10
5
0
-5
-10
-15
-20
0
-5
-50
-20
10
40
70
100
130
160
-50
-20
10
40
70
100
130
160
TA (°C)
TA (°C)
Average BOP vs. TA
Program Code: 8, VCC = 12 V
Average BRP vs. TA
Program Code: 8, VCC = 12 V
60
50
40
30
20
75
70
65
60
55
50
45
40
-50
-20
10
40
70
100
130
160
-50
-20
10
40
70
100
130
160
T
A (°C)
TA (°C)
Average BOP vs. TA
Program Code: 16, VCC = 12 V
Average BRP vs. TA
Program Code: 16, VCC = 12 V
110
105
100
95
130
125
120
115
110
105
100
90
85
80
-50
-20
10
40
TA (°C)
70
100
130
160
-50
-20
10
40
TA (°C)
70
100
130
160
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
4
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250 and
A3251
Typical Characterization Data
All data are taken with A3250 devices, the average of 3 lots, 30 pieces per lot
Average Bhys vs. Temperature
Program Code: 1, VCC = 12 V
Average Bhys vs. Temperature
Program Code: 16, VCC = 12 V
35
30
25
20
15
10
5
35
30
25
20
15
10
5
0
0
-50
-20
10
40
A (°C)
70
100
130
160
-50
-20
10
40
TA (°C)
70
100
130
160
T
Average Bhys vs. Temperature
Program Code: 8, VCC = 12 V
Average BOP vs. Temperature
-40°C to 25°C and 150°C to 25°C
30
35
20
10
30
25
20
15
10
5
0
Code 1
Code 8
Code 16
-10
-20
-30
0
-50
-20
10
40
A (°C)
70
100
130
160
-40°C to 25°C
150°C to 25°C
T
A (°C)
T
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
5
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250 and
A3251
Typical Characterization Data
All data are taken with A3250 devices, the average of 3 lots, 30 pieces per lot
Average ICC(on) vs. Temperature
Average ICC(off) vs. Temperature
10
8
10
8
ICC(off) @ 3.8 V
ICC(off) @ 12.0 V
ICC(off) @ 26.5 V
6
6
4
4
ICC(on) @ 3.8 V
ICC(on) @ 12.0 V
ICC(on) @ 26.5 V
2
2
0
-50
0
-20
10
40
70
100
130
160
-50
-20
10
40
70
100
130
160
TA (°C)
TA (°C)
Average VOUT(SAT) vs. Temperature
VCC = 3.8 V, Iout = 20 mA
280
260
240
220
200
180
160
140
-50
-20
10
40
70
100
130
160
T
A (°C)
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
6
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250 and
A3251
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic
Symbol
Test Conditions
Value
Units
Package UA, 1-layer PCB with copper limited to solder pads
165
ºC/W
RθJA
Package Thermal Resistance
Package LT, 1-layer PCB with copper limited to solder pads
Package LT, 2-layer PCB with 0.94 in2 copper each side
180
78
ºC/W
ºC/W
Power Dissipation
Power Derating Curve
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1900
1800
V
CC(max)
1700
1600
1500
1400
1300
1200
1100
1000
900
800
700
600
500
1-layer PCB, Package LT
(RθJA = 180 ºC/W)
1-layer PCB, Package UA
(RθJA = 165 ºC/W)
2-layer PCB, Package LT
(RθJA = 78 ºC/W)
400
300
200
100
V
CC(min)
0
20
40
60
80
100
120
140
160
180
20
40
60
80
100
120
140
160
180
Temperature (°C)
T
(ºC)
Hysteresis Curves
A3250
A3251
Hysteresis of ΔVOUT
Switching Due to ΔB
Hysteresis of ΔVOUT
Switching Due to ΔB
V+
V+
VOUT(off)
VOUT(off)
VOUT(on)(sat)
VOUT(on)(sat)
B+
B+
BHYS
BHYS
Output voltage in relation to sensed magnetic flux density in a south polarity magnetic
field of sufficient strength. Transition through BOP must precede transition through BRP
.
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
7
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250 and
A3251
Functional Description
Chopper-Stabilized Technique
signal is separated from the magnetically-induced signal in the
frequency domain. The offset (and any low-frequency noise)
component of the signal can be seen as signal distortion added
after the signal modulation process has taken place. Therefore,
the dc offset is not modulated and remains a low-frequency
component. Consequently, the signal demodulation process acts
as a modulation process for the offset, causing the magnetically-
induced signal to recover its original spectrum at baseband while
the dc offset becomes a high-frequency signal. Then, the signal
passes using a low-pass filter, while the modulated dc offset is
suppressed.
The Hall sensor is based on a Hall element, a small sheet of
semiconductor material in which a constant bias current flows
when a constant voltage source is applied. The output takes the
form of a voltage measured across the width of the Hall element,
and has negligible value in the absence of a magnetic field.
When a magnetic field is applied with flux lines at right angles
to the current in the Hall element, a small signal voltage directly
proportional to the strength of the magnetic field occurs at the
output of the Hall element.
This small signal voltage is disproportionally small relative to
the offset produced at the input of the device. This makes it very
difficult to process the signal and maintain an accurate, reliable
output over the specified temperature and voltage range. There-
fore, it is important to reduce any distortion of the signal that
could be amplified when the signal is processed.
The advantage of this approach is significant offset reduction,
which desensitizes the Hall IC against the effects of temperature
and mechanical stress. The disadvantage is that this technique
features a demodulator that uses a sample-and-hold block to
store and recover the signal. This sampling process can slightly
degrade the SNR (signal-to-noise ratio) by producing replicas of
the noise spectrum at the baseband. This degradation is a function
of the ratio between the white noise spectrum and the sampling
frequency. The effect of the degradation of the SNR is higher
jitter, also known as signal repeatability. However, the jitter in a
continuous-time device can be 5X that of the A3250/A3251.
Chopper stabilization is a unique approach used to minimize
input offset on the Hall IC. This technique removes a key
source of output drift due to temperature and mechanical stress,
and produces a 3X reduction in offset in comparison to other,
conventional methods.
This offset reduction chopping technique is based on a sig-
nal modulation-demodulation process. The undesired offset
Regulator
Amp
Chopper stabilization circuit (dynamic quadrature offset cancellation)
Allegro MicroSystems, Inc.
8
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Field-Programmable, Chopper-Stabilized,
A3250 and
A3251
Unipolar Hall-Effect Switches
V+
Programming Protocol
V
PH
The operate switchpoint, BOP, can be field-programmed. To do
so, a coded series of voltage pulses through the VCC pin is used
to set bitfields in onboard registers. The effect on the device
output can be monitored, and the registers can be cleared and
set repeatedly until the required BOP is achieved. To make the
setting permanent, bitfield-level solid state fuses are blown, and
finally, a device-level fuse is blown, blocking any further cod-
V
PM
V
PL
T
d(P)
0
ing. It is not necessary to program the release switchpoint, BRP
because the difference between BOP and BRP, referred to as the
hysteresis, BHYS, is fixed.
,
T
d(0)
T
d(1)
t
Figure 1. Pulse amplitudes and durations
The range of values between BOP(min) and BOP(max) is scaled to
64 increments. The actual change in magnetic flux (G) repre-
sented by each increment is indicated by BRES (see the Operating
Characteristics table; however, testing is the only method for
verifying the resulting BOP). For programming, the 64 incre-
ments are individually identified using 6 data bits, which are
physically represented by 6 bitfields in the onboard registers.
By setting these bitfields, the corresponding calibration value is
programmed into the device.
Additional information on device programming and program-
ming products is available on www. allegromicro.com. Program-
ming hardware is available for purchase, and programming
software is available free of charge.
Code Programming. Each bitfield must be individually set. To
do so, a pulse sequence must be transmitted for each bitfield that
is being set to 1. If more than one bitfield is being set to 1, all
pulse sequences must be sent, one after the other, without allow-
ing VCC to fall to zero (which clears the registers).
Three voltage levels are used in programming the device: a low
voltage, VPL , a minimum required to sustain register settings; a
mid-level voltage, VPM , used to increment the address counter
in the device; and a high voltage, VPH , used to separate sets of
VPM pulses (when short in duration) and to blow fuses (when
long in duration). A fourth voltage level, essentially 0 V, is used
to clear the registers between pulse sequences. The pulse values
are shown in the Programming Protocol Characteristics table and
in figure 1.
The same pulse sequence is used to provisionally set bitfields as
is used to permanently set bitfield-level fuses. The only differ-
ence is that when provisionally setting bitfields, no fuse-blowing
pulse is sent at the end of the pulse sequence.
PROGRAMMING PROTOCOL CHARACTERISTICS, TA = 25ºC, unless otherwise noted
Characteristic
Symbol
VPL
Test Conditions
Min.
4.5
10
Typ.
5.0
11
Max.
5.5
12
Units
Minimum voltage range during programming
V
V
V
Programming Voltage1
VPM
VPH
23
25
26
Programming Current2
Pulse Width
IPP
td(0)
td(1)
Maximum supply current during programming
OFF time between programming bits
–
500
–
–
–
–
mA
ꢀs
20
20
Pulse duration (ON time) for enable, address, fuse
blowing or lock bits
–
ꢀs
td(P)
tr
Pulse duration (ON time) for fuse blowing
VPL to VPM; VPL to VPH
100
11
5
300
–
–
–
–
ꢀs
ꢀs
ꢀs
Pulse Rise Time
Pulse Fall Time
tf
VPM to VPL; VPH to VPL
–
1Programming voltages are measured at the VCC pin.
2A bypass capacitor with a minimum capacitance of 0.1 μF must be connected from VCC to the GND pin of the device in order to provide
the current necessary to blow the fuse.
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
9
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250 and
A3251
The pulse sequences consist of the following groups of pulses:
vertently setting the bitfield to 1. Instead, blowing the device-
level fuse protects the 0 bitfields from being accidentally set in
the future.
1. An enable sequence.
2. A bitfield address sequence.
When provisionally trying the calibration value, one pulse
sequence is used, using decimal values. The sequence for setting
the value 510 is shown in figure 2.
3. When permanently setting the bitfield, a long VPH fuse-blow-
ing pulse. (Note: Blown bit fuses cannot be reset.)
4. When permanently setting the bitfield, the level of VCC must
be allowed to drop to zero between each pulse sequence, in
order to clear all registers. However, when provisionally set-
ting bitfields, VCC must be maintained at VPL between pulse
sequences, in order to maintain the prior bitfield settings while
preparing to set additional bitfields.
When permanently setting values, the bitfields must be set indi-
vidually, and 510 must be programmed as binary 101. Bit 3 is
set to 1 (0001002, which is 410), then bit 1 is set to 1 (0000012,
which is 110). Bit 2 is ignored, and so remains 0.Two pulse
sequences for permanently setting the calibration value 5 are
shown in figure 3. The final VPH pulse is maintained for a longer
period, enough to blow the corresponding bitfield-level fuse.
Bitfields that are not set are evaluated as zeros. The bitfield-level
fuses for 0 value bitfields are never blown. This prevents inad-
V+
V
PH
V
PM
V
PL
0
Enable
Address
Clear
t
Optional
Monitoring
Try 5
10
Figure 2. Pulse sequence to provisionally try calibration value 5.
V+
V
PH
V
PM
V
PL
0
Address
Blow
Enable
Address
Blow
Enable
Encode 00100 (4
2
)
Encode 00001 (1
10
)
10
2
t
Figure 3. Pulse sequence to permanently encode calibration value 5 (101 binary, or
bitfield address 3 and bitfield address 1).
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
10
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250 and
A3251
V+
V
PH
Enabling Addressing Mode. The first segment of code is a
keying sequence used to enable the bitfield addressing mode. As
shown in figure 4, this segment consists of one short VPH pulse,
seven or more VPM pulses, and one short VPH pulse, with no
supply interruptions. This sequence is designed to prevent the
device from being programmed accidentally, such as by noise on
the supply line.
V
PM
V
PL
0
Minimum 7 pulses
t
Figure 4. Addressing mode enable pulse sequence
V+
V
PH
Address 1
Address 2
Address Selection. After addressing mode is enabled, the
target bitfield address, is indicated by a series of VPM pulses,
as shown in figure 3. When provisionally trying a value, this
sequence is followed by a short VPH pulse, which serves to
delimit the address and set the corresponding bitfield. When
permanently setting a bitfield, the VPH pulse is continued for a
longer period of time, suffienct to not only set the bitfield to 1,
but also to blow the bitfield fuse.
Address n ( ≤ 63)
V
PM
V
PL
0
t
Figure 5. Pulse sequence to select addresses
V+
Falling edge of final B address digit
OP
V
PH
Lock Bit Programming. After the desired BOP calibration value
is programmed, and all of the corresponding bitfield-level fuses
are blown, the device-level fuse should be blown. To do so, the
lock bit (bitfield address 65) should be encoded as 1 and have
its fuse blown. This is done in the same manner as permanently
setting the other bitfields, as shown in figure 6.
V
PM
V
PL
7 pulses
Enable
65 pulses
0
Address
Blow
Encode Lock Bit
t
Figure 6. Pulse sequence to encode lock bit
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
11
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250 and
A3251
Application Information
For additional general application information, visit the Allegro
MicroSystems Web site at www. allegromicro.com.
Typical Application Circuit
RS
100 Ω
5V
It is strongly recommended that an external ceramic bypass
capacitor, CBYP, in the range of 0.01 μF to 0.1 μF be connected
between the VCC pin and the supply and GND pin to reduce
both external noise and noise generated by the chopper-stabiliza-
tion technique. (The diagram at the right shows CBYP at 0.1 μF.)
CBYP should be installed so that the traces that connect it to the
A3250/A3251 are no greater than 5 mm in length. (For program-
ming the device, the capacitor may be further away from the
device, including mounting on the board used for programming
the device.)
A
VCC
RL
1.2 kΩ
VSupply
VOUT
CBYP
A3250/A3251
0.1 μF
GND
A
Maximum separation 5 mm
from CBYP to device
A
The series resistor RS, in combination with CBYP creates a filter
for EMI pulses. (Additional information on EMC is provided
on the Allegro MicroSystems Web site.) RS will have a drop
of approximately 800 mV. This must be taken into consider-
ation when determining the minimum VCC requirement for the
A3250/A3251. The pull-up resistor, RL, should be chosen to
limit the current through the output transistor; do not exceed the
maximum continuous output current of the device.
Typical application circuit
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
12
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250 and
A3251
Power Derating
Example: Reliability for VCC at TA=150°C, package UA, using
minimum-K PCB.
The device must be operated below the maximum junction
temperature of the device, TJ(max). Under certain combinations of
peak conditions, reliable operation may require derating sup-
plied power or improving the heat dissipation properties of the
application. This section presents a procedure for correlating
factors affecting operating TJ. (Thermal data is also available on
the Allegro MicroSystems Web site.)
Observe the worst-case ratings for the device, specifically:
RθJA=165°C/W, TJ(max) =165°C, VCC(max)= 24 V, and
ICC(max) = 10 mA.
Calculate the maximum allowable power level, PD(max). First,
invert equation 3:
The Package Thermal Resistance, RθJA, is a figure of merit sum-
marizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity,
K, of the printed circuit board, including adjacent devices and
traces. Radiation from the die through the device case, RθJC, is
relatively small component of RθJA. Ambient air temperature,
TA, and air motion are significant external factors, damped by
overmolding.
ΔTmax = TJ(max) – TA = 165°C–150°C = 15°C
This provides the allowable increase to TJ resulting from internal
power dissipation. Then, invert equation 2:
PD(max) = ΔTmax ÷RθJA =15°C÷165 °C/W=91mW
Finally, invert equation 1 with respect to voltage:
VCC(est) = PD(max) ÷ ICC(max) = 91mW÷10mA=9 V
The result indicates that, at TA, the application and device can
The effect of varying power levels (Power Dissipation, PD), can
be estimated. The following formulas represent the fundamental
relationships used to estimate TJ, at PD.
dissipate adequate amounts of heat at voltages ≤VCC(est)
.
Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reli-
able operation between VCC(est) and VCC(max) requires enhanced
RθJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and
VCC(max) is reliable under these conditions.
PD = VIN
I
(1)
×
IN
ΔT = PD
R
(2)
θJA
×
TJ = TA + ΔT
(3)
For example, given common conditions such as: TA= 25°C,
VCC = 12 V, ICC = 4 mA, and RθJA = 165 °C/W, then:
PD = VCC
I
= 12 V 4 mA = 48 mW
×
×
CC
ΔT = PD
R
= 48 mW 165 °C/W = 8°C
×
×
θJA
TJ = TA + ΔT = 25°C + 8°C = 33°C
A worst-case estimate, PD(max), represents the maximum allow-
able power level (VCC(max), ICC(max)), without exceeding TJ(max)
at a selected RθJA and TA.
,
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
13
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250 and
A3251
Package LT, 3-Pin SOT89
4.60 .181
4.40 .173
1.83 .072
.064
1.62
B
1.14 .0450
NOM
2.24 .0880
NOM
2.60 .102
2.29 .090
1.20 .047
0.89 .035
4.25 .167
3.94 .155
A
1
2
3
0.44 .017
0.35 .014
1.60 .063
1.40 .055
0.48 .019
2X
.014
3X
0.36
0.56 .022
.017
0.10 [.004] M
0.44
2X
1.50 .059
C A B
Preliminary dimensions, for reference only
Dimensions in millimeters
U.S. Customary dimensions (in.) in brackets, for reference only
(reference JEDEC TO-243 AA)
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
Hall element (not to scale; location controlling dimensions inches)
A
B
Active Area Depth 0.775 [.0305] nominal
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
14
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250 and
A3251
Package UA, 3-Pin SIP
.164 4.17
.159 4.04
C
D
2.06 .081
NOM
.062 1.57
.058 1.47
D
1.45
.057
NOM
.122 3.10
.117 2.97
B
.085 2.16
MAX
.031 0.79
REF
.640 16.26
.600 15.24
A
.017 0.44
.014 0.35
1
2
3
.019 0.48
.014 0.36
.050 1.27
NOM
Dimensions in inches
Metric dimensions (mm) in brackets, for reference only
A
Dambar removal protrusion (6X)
Ejector mark on opposite side
B
C
D
Active Area Depth .0195 [0.50] NOM
Hall element (not to scale) controlling dimensions inches
The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283;
5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required
to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to
verify that the information being relied upon is current.
Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for
its use; nor for any infringement of patents or other rights of third parties which may result from its use.
Copyright © 2004, 2006 Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
15
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
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