A1211ELHLT-T [ALLEGRO]
Continuous-Time Latch Family; 连续时间锁存器系列
| 型号： | A1211ELHLT-T |
| 厂家： | 
ALLEGRO MICROSYSTEMS |
| 描述： | Continuous-Time Latch Family |
| 文件： | 总12页 (文件大小：441K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
A1210, A1211, A1212, A1213, and A1214
Continuous-Time Latch Family
The Allegro® A1210-A1214 Hall-effect latches are next generation replacements
for the popular Allegro 317x and 318x lines of latching switches. The A121x
family, produced with BiCMOS technology, consists of devices that feature fast
power-on time and low-noise operation. Device programming is performed after
packaging, to ensure increased switchpoint accuracy by eliminating offsets that
Package LH, 3-pin Surface Mount
can be induced by package stress. Unique Hall element geometries and low-offset
3
amplifiers help to minimize noise and to reduce the residual offset voltage nor-
mally caused by device overmolding, temperature excursions, and thermal stress.
1
3
The A1210-A1214 Hall-effect latches include the following on a single silicon
chip: voltage regulator, Hall-voltage generator, small-signal amplifier, Schmitt
trigger, and NMOS output transistor. The integrated voltage regulator permits
operation from 3.8 to 24 V. The extensive on-board protection circuitry makes
possible a ±30 V absolute maximum voltage rating for superior protection in
automotive and industrial motor commutation applications, without adding
external components. All devices in the family are identical except for magnetic
switchpoint levels.
2
1
2
The small geometries of the BiCMOS process allow these devices to be pro-
vided in ultrasmall packages. The package styles available provide magnetically
optimized solutions for most applications. Package LH is an SOT23W, a miniature
low-profile surface-mount package, while package UA is a three-lead ultramini
SIP for through-hole mounting. Each package is lead (Pb) free, with 100% matte
tin plated leadframes.
Package UA, 3-pin SIP
Features and Benefits
2
1
3
ꢀContinuous-time operation
– Fast power-on time
1
– Low noise
2
3
ꢀStable operation over full operating temperature range
ꢀReverse battery protection
ꢀSolid-state reliability
ABSOLUTE MAXIMUM RATINGS
ꢀFactory-programmed at end-of-line for optimum performance
ꢀRobust EMC performance
ꢀHigh ESD rating
Supply Voltage, VCC ..........................................30 V
Reverse-Supply Voltage, VRCC ........................–30 V
Output Off Voltage, VOUT..................................30 V
Reverse-Output Voltage, VROUT .....................–0.5 V
Output Current, IOUTSINK............................... 25 mA
Magnetic Flux Density, B .........................Unlimited
Operating Temperature
ꢀRegulator stability without a bypass capacitor
Ambient, TA, Range E..................–40ºC to 85ºC
Ambient, TA, Range L................–40ºC to 150ºC
Maximum Junction, TJ(max)........................165ºC
Storage Temperature, TS ..................–65ºC to 170ºC
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A1210-DS
A1210, A1211, A1212, A1213, and A1214
Continuous-Time Latch Family
Product Selection Guide
Part Number
A1210ELHLT-T
A1210EUA-T
A1210LLHLT-T
A1210LUA-T
A1211ELHLT-T
A1211EUA-T
A1211LLHLT-T
A1211LUA-T
Packing*
Mounting
Ambient, TA
BRP (Min)
BOP (Max)
7-in. reel, 3000 pieces/reel
Bulk, 500 pieces/bag
3-pin SOT23W surface mount
3-pin SIP through hole
–40ºC to 85ºC
–150
150
7-in. reel, 3000 pieces/reel
Bulk, 500 pieces/bag
3-pin SOT23W surface mount
3-pin SIP through hole
–40ºC to 150ºC
–40ºC to 85ºC
–40ºC to 150ºC
–40ºC to 85ºC
–40ºC to 150ºC
–40ºC to 85ºC
–40ºC to 150ºC
–40ºC to 85ºC
–40ºC to 150ºC
7-in. reel, 3000 pieces/reel
Bulk, 500 pieces/bag
3-pin SOT23W surface mount
3-pin SIP through hole
–180
–175
–200
–300
180
175
200
300
7-in. reel, 3000 pieces/reel
Bulk, 500 pieces/bag
3-pin SOT23W surface mount
3-pin SIP through hole
A1212ELHLT-T
A1212EUA-T
A1212LLHLT-T
A1212LUA-T
A1213ELHLT-T
A1213EUA-T
A1213LLHLT-T
A1213LUA-T
A1214ELHLT-T
A1214EUA-T
A1214LLHLT-T
A1214LUA-T
7-in. reel, 3000 pieces/reel
Bulk, 500 pieces/bag
3-pin SOT23W surface mount
3-pin SIP through hole
7-in. reel, 3000 pieces/reel
Bulk, 500 pieces/bag
3-pin SOT23W surface mount
3-pin SIP through hole
7-in. reel, 3000 pieces/reel
Bulk, 500 pieces/bag
3-pin SOT23W surface mount
3-pin SIP through hole
7-in. reel, 3000 pieces/reel
Bulk, 500 pieces/bag
3-pin SOT23W surface mount
3-pin SIP through hole
7-in. reel, 3000 pieces/reel
Bulk, 500 pieces/bag
3-pin SOT23W surface mount
3-pin SIP through hole
7-in. reel, 3000 pieces/reel
Bulk, 500 pieces/bag
3-pin SOT23W surface mount
3-pin SIP through hole
*Contact Allegro for additional packing options.
Functional Block Diagram
VCC
Regulator
To all subcircuits
VOUT
Amp
Gain
Offset
Trim
Control
GND
Terminal List
Number
Package LH Package UA
Name
Description
VCC
VOUT
GND
Connects power supply to chip
Output from circuit
Ground
1
2
3
1
3
2
Allegro MicroSystems, Inc.
2
115 Northeast Cutoff, Box 15036
A1210-DS
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A1210, A1211, A1212, A1213, and A1214
Continuous-Time Latch Family
OPERATING CHARACTERISTICS over full operating voltage and ambient temperature ranges, unless otherwise noted
Characteristic
Electrical Characteristics
Supply Voltage1
Symbol
Test Conditions
Min.
Typ.
Max. Units
VCC
Operating, TJ < 165°C
3.8
–
–
–
24
10
V
Output Leakage Current
Output On Voltage
IOUTOFF
VOUT(SAT)
VOUT = 24 V, B < BRP
IOUT = 20 mA, B > BOP
µA
mV
–
215
400
Slew rate (dVCC/dt) < 2.5 V/µs, B > BOP + 5 G or
B < BRP – 5 G
Power-On Time2
tPO
–
–
4
µs
Output Rise Time3
Output Fall Time3
tr
VCC = 12 V, RLOAD = 820 Ω, CS = 12 pF
–
–
–
–
–
–
–
400
400
7.5
ns
ns
tf
VCC = 12 V, RLOAD = 820 Ω, CS = 12 pF
ICCON
ICCOFF
IRCC
B > BOP
4.1
3.8
–
mA
mA
mA
Supply Current
B < BRP
7.5
Reverse Battery Current
VRCC = –30 V
–10
Supply Zener Clamp Voltage
VZ
IZ
ICC = 10.5 mA; TA = 25°C
VZ = 32 V; TA = 25°C
32
–
–
–
–
V
Supply Zener Current4
10.5
mA
Magnetic Characteristics5
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
A1210
A1211
25
15
78
87
107
–
150
180
175
200
300
–25
–15
–50
–80
–140
–
South pole adjacent to branded face
of device
Operate Point
Release Point
Hysteresis
BOP
A1212
50
A1213
A1214
A1210
A1211
80
140
–150
–180
–175
–200
–300
50
–
–78
–95
–117
–
North pole adjacent to branded face
of device
BRP
A1212
A1213
A1214
A1210
A1211
–
155
180
225
–
80
–
BHYS
A1212
A1213
A1214
BOP – BRP
100
160
280
350
400
600
–
1 Maximum voltage must be adjusted for power dissipation and junction temperature, see Power Derating section.
2 For VCC slew rates greater than 250 V/µs, and TA = 150°C, the Power-On Time can reach its maximum value.
3 CS =oscilloscope probe capacitance.
4 Maximum current limit is equal to the maximum ICC(max) + 3 mA.
5 Magnetic flux density, B, is indicated as a negative value for north-polarity magnetic fields, and as a positive value for south-polarity magnetic fields.
This so-called algebraic convention supports arithmetic comparison of north and south polarity values, where the relative strength of the field is indicated
by the absolute value of B, and the sign indicates the polarity of the field (for example, a –100 G field and a 100 G field have equivalent strength, but
opposite polarity).
DEVICE QUALIFICATION PROGRAM
Contact Allegro for information.
EMC (Electromagnetic Compatibility) REQUIREMENTS
Contact Allegro for information.
Allegro MicroSystems, Inc.
3
115 Northeast Cutoff, Box 15036
A1210-DS
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A1210, A1211, A1212, A1213, and A1214
Continuous-Time Latch Family
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic
Symbol
Test Conditions
Value Units
110 ºC/W
Package LH, minimum-K PCB (single layer, single-sided with
copper limited to solder pads)
Package LH, low-K PCB (single layer, double-sided with
0.926 in2 copper area)
RθJA
Package Thermal Resistance
228 ºC/W
165 ºC/W
Package UA, minimum-K PCB (single layer, single-sided with
copper limited to solder pads)
Power Derating Curve
TJ(max) = 165ºC; ICC = ICC(max)
25
24
23
V
CC(max)
22
21
20
19
18
17
16
15
14
13
12
11
10
9
Low-K PCB, Package LH
(RθJA = 110 ºC/W)
Minimum-K PCB, Package UA
(RθJA = 165 ºC/W)
8
7
Minimum-K PCB, Package LH
(RθJA = 228 ºC/W)
6
5
4
V
CC(min)
3
2
20
40
60
80
100
120
140
160
180
Power Dissipation versus Ambient Temperature
1900
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
20
40
60
80
100
120
140
160
180
Temperature (°C)
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
4
A1210-DS
A1210, A1211, A1212, A1213, and A1214
Continuous-Time Latch Family
Characteristic Data
Supply Current (On) versus Ambient Temperature
(A1210/11/12/13/14)
Supply Current (On) versus Supply Voltage
(A1210/11/12/13/14)
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0
T
(°C)
A
V
(V)
CC
–40
25
24
3.8
150
–50
0
50
100
150
0
5
10
15
20
25
TA (°C)
VCC (V)
Supply Current (Off) versus Ambient Temperature
(A1210/11/12/13/14)
Supply Current (Off) versus Supply Voltage
(A1210/11/12/13/14)
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0
T
A
(°C)
V
(V)
CC
–40
25
24
3.8
150
0
5
10
15
20
25
–50
0
50
100
150
TA (°C)
VCC (V)
Output Voltage (On) versus Ambient Temperature
(A1210/11/12/13/14)
Output Voltage (On) versus Supply Voltage
(A1210/11/12/13/14)
400
400
350
300
250
200
150
100
50
350
300
250
200
150
100
50
T
A
(°C)
V
(V)
CC
–40
25
24
3.8
150
0
0
–50
0
50
100
150
0
5
10
15
20
25
TA (°C)
VCC (V)
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
5
A1210-DS
A1210, A1211, A1212, A1213, and A1214
Continuous-Time Latch Family
Operate Point versus Ambient Temperature
Operate Point versus Supply Voltage
(A1210)
(A1210)
150
125
100
75
150
125
100
75
T
(°C)
A
V
CC
(V)
–40
25
24
3.8
150
50
50
25
25
–50
0
50
TA (°C)
100
150
0
5
10
15
20
25
VCC (V)
Release Point versus Ambient Temperature
Release Point versus Supply Voltage
(A1210)
(A1210)
-25
-50
-25
-50
T
(°C)
A
V
CC
(V)
–40
25
-75
-75
24
3.8
150
-100
-125
-150
-100
-125
-150
0
5
10
15
20
25
–50
0
50
100
150
TA (°C)
VCC (V)
Hysteresis versus Ambient Temperature
Hysteresis versus Supply Voltage
(A1210)
(A1210)
225
200
175
150
125
100
75
225
200
175
150
125
100
75
T
(°C)
A
V
CC
(V)
–40
25
24
3.8
150
50
50
–50
0
50
100
150
0
5
10
15
20
25
V
CC (V)
TA (°C)
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
6
A1210-DS
A1210, A1211, A1212, A1213, and A1214
Continuous-Time Latch Family
Operate Point versus Ambient Temperature
(A1211)
Operate Point versus Ambient Temperature
(A1212)
175
150
125
100
75
165
140
115
90
V
(V)
V
(V)
CC
CC
24
24
3.8
3.8
50
25
65
0
40
-25
-50
15
–50
0
50
TA (°C)
100
150
–50
0
50
TA (°C)
100
150
Release Point versus Ambient Temperature
(A1211)
Release Point versus Ambient Temperature
(A1212)
-50
-75
-30
-55
V
CC
(V)
V
CC
(V)
-80
-100
-125
24
24
-105
-130
-155
-180
3.8
3.8
-150
-175
–50
0
50
100
150
–50
0
50
100
150
TA (°C)
TA (°C)
Hysteresis versus Ambient Temperature
(A1211)
Hysteresis versus Ambient Temperature
(A1212)
240
220
200
180
160
140
120
100
80
350
300
250
200
150
100
V
(V)
V
(V)
CC
CC
24
24
3.8
3.8
–50
0
50
100
150
–50
0
50
100
150
TA (°C)
TA (°C)
Allegro MicroSystems, Inc.
7
115 Northeast Cutoff, Box 15036
A1210-DS
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A1210, A1211, A1212, A1213, and A1214
Continuous-Time Latch Family
Functional Description
Due to offsets generated during the IC packaging process,
OPERATION
continuous-time devices typically require programming after
packaging to tighten magnetic parameter distributions. In con-
trast, chopper-stabilized switches employ an offset cancellation
technique on the chip that eliminates these offsets without the
need for after-packaging programming. The tradeoff is a longer
settling time and reduced frequency response as a result of the
chopper-stabilization offset cancellation algorithm.
The output of these devices switches low (turns on) when a
magnetic field perpendicular to the Hall sensor exceeds the
operate point threshold, BOP. After turn-on, the output is capable
of sinking 25 mA and the output voltage is VOUT(SAT). Notice
that the device latches; that is, a south pole of sufficient strength
towards the branded surface of the device turns the device on,
and the device remains on with removal of the south pole. When
the magnetic field is reduced below the release point, BRP
,
The choice between continuous-time and chopper-stabilized
designs is solely determined by the application. Battery manage-
ment is an example where continuous-time is often required. In
these applications, VCC is chopped with a very small duty cycle
in order to conserve power (refer to figure 2). The duty cycle
is controlled by the power-on time, tPO, of the device. Because
continuous-time devices have the shorter power-on time, they
are the clear choice for such applications.
the device output goes high (turns off). The difference in the
magnetic operate and release points is the hysteresis, Bhys, of
the device. This built-in hysteresis allows clean switching of the
output, even in the presence of external mechanical vibration and
electrical noise.
Powering-on the device in the hysteresis range, less than BOP
and higher than BRP, allows an indeterminate output state. The
correct state is attained after the first excursion beyond BOP or
BRP.
For more information on the chopper stabilization technique,
refer to Technical Paper STP 97-10, Monolithic Magnetic Hall
Sensor Using Dynamic Quadrature Offset Cancellation and
Technical Paper STP 99-1, Chopper-Stabilized Amplifiers with a
Track-and-Hold Signal Demodulator.
CONTINUOUS-TIME BENEFITS
Continuous-time devices, such as the A121x family, offer the
fastest available power-on settling time and frequency response.
(A)
(B)
VS
V+
VCC
VCC
RL
Sensor Output
A121x
VOUT
GND
VOUT(SAT)
B+
0
B–
0
BHYS
Figure 1. Switching Behavior of Latches. On the horizontal axis, the B+ direction indicates increasing south polarity magnetic field strength, and the
B– direction indicates decreasing south polarity field strength (including the case of increasing north polarity). This behavior can be exhibited when
using a circuit such as that shown in Panel B.
Allegro MicroSystems, Inc.
8
115 Northeast Cutoff, Box 15036
A1210-DS
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A1210, A1211, A1212, A1213, and A1214
Continuous-Time Latch Family
ADDITIONAL APPLICATIONS INFORMATION
Extensive applications information for Hall-effect sensors is
available in:
• Hall-Effect IC Applications Guide, Application Note 27701
• Hall-Effect Devices: Gluing, Potting, Encapsulating, Lead
Welding and Lead Forming, Application Note 27703.1
• Soldering Methods for Allegro’s Products – SMT and Through-
Hole, Application Note 26009
All are provided in Allegro Electronic Data Book, AMS-702,
and the Allegro Web site, www.allegromicro.com.
1
2
3
4
5
VCC
t
t
VOUT
Output Sampled
t
PO(max)
Figure 2. Continuous-Time Application, B < BRP.. This figure illustrates the use of a quick cycle for chopping VCC in order to conserve battery power.
Position 1, power is applied to the device. Position 2, the output assumes the correct state at a time prior to the maximum Power-On Time, tPO(max)
.
The case shown is where the correct output state is HIGH. Position 3, tPO(max) has elapsed. The device output is valid. Position 4, after the output is
valid, a control unit reads the output. Position 5, power is removed from the device.
Allegro MicroSystems, Inc.
9
115 Northeast Cutoff, Box 15036
A1210-DS
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A1210, A1211, A1212, A1213, and A1214
Continuous-Time Latch Family
Power Derating
Power Derating
Example: Reliability for VCC at TA=150°C, package UA, using
minimum-K PCB.
The device must be operated below the maximum junction
temperature of the device, TJ(max). Under certain combinations of
peak conditions, reliable operation may require derating sup-
plied power or improving the heat dissipation properties of the
application. This section presents a procedure for correlating
factors affecting operating TJ. (Thermal data is also available on
the Allegro MicroSystems Web site.)
Observe the worst-case ratings for the device, specifically:
R
θJA=165°C/W, TJ(max) =165°C, VCC(max)= 24 V, and
ICC(max) = 7.5 mA.
Calculate the maximum allowable power level, PD(max). First,
invert equation 3:
The Package Thermal Resistance, RθJA, is a figure of merit sum-
marizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity,
K, of the printed circuit board, including adjacent devices and
traces. Radiation from the die through the device case, RθJC, is
relatively small component of RθJA. Ambient air temperature,
TA, and air motion are significant external factors, damped by
overmolding.
∆Tmax = TJ(max) – TA = 165°C–150°C = 15°C
This provides the allowable increase to TJ resulting from internal
power dissipation. Then, invert equation 2:
PD(max) = ∆Tmax ÷RθJA =15°C÷165 °C/W=91mW
Finally, invert equation 1 with respect to voltage:
VCC(est) = PD(max) ÷ ICC(max) = 91mW÷7.5mA=12.1 V
The effect of varying power levels (Power Dissipation, PD), can
be estimated. The following formulas represent the fundamental
relationships used to estimate TJ, at PD.
The result indicates that, at TA, the application and device can
dissipate adequate amounts of heat at voltages ≤VCC(est)
.
Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reli-
able operation between VCC(est) and VCC(max) requires enhanced
PD = VIN
I
(1)
(2)
(3)
×
IN
R
θJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and
∆T = PD
R
θJA
VCC(max) is reliable under these conditions.
×
TJ = TA + ∆T
For example, given common conditions such as: TA= 25°C,
VCC = 12 V, ICC = 4 mA, and RθJA = 140 °C/W, then:
PD = VCC
I
= 12 V 4 mA = 48 mW
×
×
CC
∆T = PD
R
= 48 mW 140 °C/W = 7°C
×
×
θJA
TJ = TA + ∆T = 25°C + 7°C = 32°C
A worst-case estimate, PD(max), represents the maximum allow-
able power level (VCC(max), ICC(max)), without exceeding TJ(max)
at a selected RθJA and TA.
,
Allegro MicroSystems, Inc.
10
115 Northeast Cutoff, Box 15036
A1210-DS
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A1210, A1211, A1212, A1213, and A1214
Continuous-Time Latch Family
Package LH, 3-Pin (SOT-23W)
Package UA, 3-Pin
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
11
A1210-DS
A1210, A1211, A1212, A1213, and A1214
Continuous-Time Latch Family
The products described herein are manufactured under one or more of
the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889;
5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894;
5,694,038; 5,729,130; 5,917,320; and other patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to
time, such departures from the detail specifications as may be required
to permit improvements in the performance, reliability, or manufactur-
ability of its products. Before placing an order, the user is cautioned to
verify that the information being relied upon is current.
Allegro products are not authorized for use as critical components in
life-support devices or systems without express written approval.
The information included herein is believed to be accurate and reliable.
However, Allegro MicroSystems, Inc. assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties
which may result from its use.
Copyright © 2005, Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc.
12
115 Northeast Cutoff, Box 15036
A1210-DS
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
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