2559_07 [ALLEGRO]

PROTECTED QUAD POWER DRIVER; 受保护QUAD功率驱动器
2559_07
型号: 2559_07
厂家: ALLEGRO MICROSYSTEMS    ALLEGRO MICROSYSTEMS
描述:

PROTECTED QUAD POWER DRIVER
受保护QUAD功率驱动器

驱动器
文件: 总8页 (文件大小:443K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
2559  
PROTECTED  
QUAD POWER DRIVER  
Providing improved output current limiting, the UDK, UDN, and  
UDQ2559B, EB, and LB quad power drivers combine AND logic  
gates and high-current bipolar outputs with complete output protection.  
Each of the four outputs will sink 700 mA in the on state. The outputs  
have a minimum breakdown voltage (load dump) of 60 V and a  
sustaining voltage of 40 V. The inputs are compatible with TTL and  
5 V CMOS logic systems.  
UDx2559B  
1
2
3
4
16 IN  
15 IN  
OUT  
4
4
K
3
Over-current protection for each channel has been designed into  
these devices and is activated at approximately 1 A. It protects each  
output from short circuits with supply voltages up to 25 V. When an  
output current trip point is reached, that output stage is driven linearly  
resulting in a reduced output current level. If an over-current or short-  
circuit condition continues, the thermal-limiting circuits will first sense  
the rise in junction temperature and then the rise in chip temperature,  
further decreasing the output current. Under worst-case conditions,  
these devices will tolerate short circuits on all outputs, simultaneously.  
14  
ENABLE  
OUT  
3
13 GROUND  
GROUND  
5
6
12  
11  
10  
9
GROUND  
GROUND  
OUT  
2
V
CC  
7
8
K
IN  
IN  
2
1
OUT  
1
Dwg. PP-017-1  
These devices can be used to drive various loads including incan-  
descent lamps (without warming or limiting resistors) or inductive  
loads such as relays, solenoids, or dc stepping motors.  
The packages offer fused leads for enhanced thermal dissipation.  
Package B is a 16-pin power DIP with exposed tabs, EB is a 28-lead  
power PLCC, and LB is a 16-lead power wide-body SOIC for surface-  
mount applications. The lead (Pb) free versions have 100% matte tin  
leadframe plating.  
ABSOLUTE MAXIMUM RATINGS  
at TA = 25°C  
Output Voltage, VOUT . . . . . . . . . 60 V  
Over-Current Protected Output Voltage,  
VOUT . . . . . . . . . . . . . . . . . . . 25 V  
Output Current, IOUT . . . . . . . . . 1.0 A*  
Supply Voltage, VCC . . . . . . . . . . 7.0 V  
Input Voltage, VIN or VEN . . . . . . 7.0 V  
FEATURES  
700 mA Output Current per Channel  
Independent Over-Current Protection for Each Driver  
Thermal Protection for Device and Each Driver  
Low Output-Saturation Voltage  
Package Power Dissipation,  
PD . . . . . . . . . . . . . . . . See Graph  
Operating Temperature Range, TA  
Prefix ‘UDK’ . . . . -40°C to +125°C  
Prefix ‘UDN’ . . . . . -20°C to +85°C  
Prefix ‘UDQ’ . . . . . -40°C to +85°C  
Integral Output Flyback Diodes  
Storage Temperature Range,  
TTL and 5 V CMOS Compatible Inputs  
TS . . . . . . . . . . . . -55°C to +150°C  
*Outputs are peak current limited at  
approximately 1.0 A per driver. See  
Circuit Description and Application for  
further information.  
2559  
PROTECTED  
QUAD POWER DRIVER  
Selection Guide  
Part Number  
Pb-free  
Package  
Ambient Temperature  
(°C)  
UDN2559B  
Yes  
Yes  
16-pin DIP, exposed tabs  
16-pin DIP, exposed tabs  
28-lead PLCC  
28-lead PLCC  
16-lead SOIC  
UDN2559B-T  
UDN2559EB  
UDN2559EB-T  
UDN2559LB  
UDN2559LB-T  
–20 to 85  
–40 to 85  
–40 to 125  
Yes  
16-lead SOIC  
UDQ2559B  
Yes  
16-pin DIP, exposed tabs  
16-pin DIP, exposed tabs  
16-lead SOIC  
UDQ2559B-T  
UDQ2559LB  
UDQ2559LB-T  
Yes  
16-lead SOIC  
UDK2559B  
Yes  
Yes  
16-pin DIP, exposed tabs  
16-pin DIP, exposed tabs  
28-lead PLCC  
28-lead PLCC  
16-lead SOIC  
UDK2559B-T  
UDK2559EB  
UDK2559EB-T  
UDK2559LB  
UDK2559LB-T  
Yes  
16-lead SOIC  
UDx2559LB  
1
2
3
4
5
6
7
8
16  
15  
14  
IN  
IN  
OUT  
4
3
4
3
K
ENABLE  
OUT  
GROUND  
GROUND  
OUT  
13  
12  
11  
10  
9
GROUND  
GROUND  
V
2
CC  
K
IN  
IN  
2
1
OUT  
1
Dwg. PP-017-6  
115 Northeast Cutoff, Box 15036  
Worcester, Massachusetts 01615-0036 (508) 853-5000  
2559  
PROTECTED  
QUAD POWER DRIVER  
FUNCTIONAL BLOCK DIAGRAM  
(1 of 4 Channels)  
K
V
CC  
OUT  
N
ENABLE  
IN  
N
THERMAL  
LIMIT  
<<1  
Dwg. FP-041  
UDx2559EB  
5
R
= 6°C/W  
θJT  
4
SUFFIX 'EB', R  
= 36°C/W  
θJA  
NC  
3
2
1
0
GROUND  
5
25  
24  
23  
22  
GROUND  
SUFFIX 'B', R  
= 43°C/W  
θJA  
6
7
8
9
21  
20  
19  
10  
11  
GROUND  
GROUND  
SUFFIX 'LB', R  
50  
= 90°C/W  
θJA  
V
NC  
CC  
75  
100  
125  
150  
25  
°
TEMPERATURE IN C  
Dwg. GP-004-2B  
Dwg. PP-019-1  
PD = (VOUT1 x IOUT1 x dc) + … + (VOUTn x IOUTn x dc)  
+ (VCC x ICC) = (TJ - TA)/RθJA  
115 Northeast Cutoff, Box 15036  
Worcester, Massachusetts 01615-0036 (508) 853-5000  
2559  
PROTECTED  
QUAD POWER DRIVER  
ELECTRICAL CHARACTERISTICS at TA = +25°C (prefix ‘UDN’) or over operating  
temperature range (prefix ‘UDK’ or ‘UDQ’), V = 4.75 V to 5.25 V  
CC  
Limits  
Max.  
Characteristic  
Symbol  
Test Conditions  
VOUT = 50 V, VIN = 0.8 V, VEN = 2.0 V  
OUT = 50 V, VIN = 2.0 V, VEN = 0.8 V  
Min.  
40  
2.0  
Typ.  
<1.0  
<1.0  
Units  
µA  
µA  
V
Output Leakage Current  
ICEX  
100  
100  
V
Output Sustaining Voltage  
Output Saturation Voltage  
VOUT(SUS)  
VOUT(SAT)  
IOUT = 100 mA, VIN = VEN = 0.8 V  
All Devices, IOUT = 100 mA  
300  
500  
700  
mV  
mV  
mV  
A
All Devices, IOUT = 400 mA  
B& EBPackages Only, IOUT = 600 mA  
Over-Current Trip  
Input Voltage  
ITRIP  
Logic 1  
Logic 0  
Logic 1  
Logic 0  
ICC  
1.0  
V
V
IN(1) or VEN(1)  
IN(0) or VEN(0)  
V
0.8  
40  
V
Input Current  
VIN(1) or VEN(1) = 2.0 V  
IN(0) or VEN(0) = 0.8 V  
µA  
µA  
mA  
mA  
V
V
-10  
80  
Total Supply Current  
Clamp Diode Forward Voltage  
All Outputs ON, VIN* = VEN = 2.0 V  
All Outputs OFF  
5.0  
1.7  
2.1  
50  
VF  
IF = 1.0 A  
IF = 1.5 A  
V
Clamp Diode Leakage Current  
Turn-On Delay  
IR  
VR = 50 V, D1 + D2 or D3 + D4  
IOUT = 500 mA  
µA  
µs  
µs  
°C  
tPHL  
tPLH  
TJ  
20  
IOUT = 500 mA  
20  
Thermal Limit  
165  
Typical Data is for design information only.  
Negative current is defined as coming out of (sourcing) the specified terminal.  
As used here, -100 is defined as greater than +10 (absolute magnitude convention) and the minimum is implicitly zero.  
* All inputs simultaneously, all other tests are performed with each input tested separately.  
www.allegromicro.com  
2559  
PROTECTED  
QUAD POWER DRIVER  
TYPICAL OUTPUT  
CHARACTERISTIC  
CIRCUIT DESCRIPTION AND APPLICATION  
INCANDESCENT LAMP DRIVER  
High incandescent lamp turn-ON/in-rush currents can contribute to  
poor lamp reliability and destroy semiconductor lamp drivers. Warm-  
ing or current-limiting resistors protect both driver and lamp but use  
significant power either when the lamp is OFF or when the lamp is  
ON, respectively. Lamps with steady-state current ratings up to 700  
mA can be driven by these devices without the need for warming  
(parallel) or current-limiting (series) resistors.  
NOT TO SCALE  
T
< 150°C  
J
When an incandescent lamp is initially turned ON, the cold fila-  
ment is at minimum resistance and would normally allow a 10x to 12x  
in-rush current. With these drivers, during turn-ON, the high in-rush  
current is sensed by the internal low-value sense resistor. Drive current  
to the output stage is then diverted by the shunting transistor, and the  
load current is momentarily limited to approximately 1.0 A. During  
this short transition period, the output current is reduced to a value  
dependent on supply voltage and filament resistance. During lamp  
warmup, the filament resistance increases to its maximum value, the  
output stage goes into saturation and applies maximum rated voltage to  
the lamp.  
T
= 165°C  
J
JUNCTION  
TEMP. LIMIT  
THERMAL  
GRADIENT  
SENSING  
I TRIP  
V
OUT(SAT)  
OUTPUT CURRENT, I  
OUT  
Dwg. GP-013  
INDUCTIVE LOAD DRIVER  
TYPICAL OUTPUT BEHAVIOR  
Bifilar (unipolar) stepper motors, relays, or solenoids can be driven  
directly. The internal flyback diodes prevent damage to the output transistors  
by suppressing the high-voltage spikes that occur when turning OFF an  
inductive load.  
NORMAL LAMP IN-RUSH CURRENT  
For rapid current decay (fast turn-OFF speeds), the use of Zener diodes  
will raise the flyback voltage and inprove performance. However, the peak  
NOT TO SCALE  
voltage must not exceed the specified minimum sustaining voltage (VSUPPLY  
+
VZ + VF VOUT(SUS)).  
FAULT CONDITIONS  
In the event of a shorted load, the load current will attempt to  
increase. As described above, the drive current to the affected output  
stage is reduced, causing the output stage to go linear, limiting the peak  
output current to approximately 1 A. As the power dissipation of that  
output stage increases, a thermal gradient sensing circuit will become  
operational, further decreasing the drive current to the affected output  
stage and reducing the output current to a value dependent on supply  
voltage and load resistance.  
THERMAL GRADIENT SENSING  
CURRENT LIMIT  
ITRIP  
Continuous or multiple overload conditions causing the chip  
temperature to reach approximately 165°C will result in an additional  
reduction in output current to maintain a safe level.  
0
TIME  
Dwg. WP-008  
If the fault condition is corrected, the output stage will return to its  
normal saturated condition.  
115 Northeast Cutoff, Box 15036  
Worcester, Massachusetts 01615-0036 (508) 853-5000  
2559  
PROTECTED  
QUAD POWER DRIVER  
B Package, 16-pin DIP  
with internally fused pins 4, 5, 12, and 13  
and external thermal tabs  
Preliminary dimensions, for reference only  
Dimensions in inches  
Metric dimensions (mm) in brackets, for reference only  
(reference JEDEC MS-001 BB)  
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions  
Exact case and lead configuration at supplier discretion within limits shown  
Terminal #1 mark area  
A
.775 19.69  
.735 18.67  
A
.014 0.36  
.008 0.20  
B
16  
.430 10.92  
MAX  
.280 7.11  
.240 6.10  
.300 .7.62  
A
1
2
.195 4.95  
.115 2.92  
C
.210 5.33  
MAX  
SEATING  
PLANE  
.015 0.38  
MIN  
.005 0.13  
MIN  
.100 .2.54  
.150 3.81  
.115 2.92  
.070 1.78  
.045 1.14  
.022 .056  
16X  
.014 .036  
.010 [0.25] M  
C
2559  
PROTECTED  
QUAD POWER DRIVER  
EB Package, 28-pin PLCC  
with internally fused pins 5 through 11 and 19 through 25  
.495 12.57  
.485 12.32  
.456 11.58  
.450 11.43  
2X  
.007 [0.18]  
H
B A  
A
.007 [0.18]  
.002 [0.05]  
H
B
B A  
.456 11.58  
.450 11.43  
2X  
B
.020 0.51  
2
1
28  
.007 [0.18]  
.002 [0.05]  
H
B
B
.219 5.56  
.191 4.85  
A
.219 5.56  
.191 4.85  
.495 12.57  
.485 12.32  
.007 [0.18]  
H
B
A
.020 0.51  
MIN  
.120 3.05  
.090 2.29  
.180 4.57  
.165 4.19  
.032 0.81  
.026 0.66  
28X  
H
.007 [0.18]  
C B A  
28X  
28X  
C
SEATING  
PLANE  
.004 [0.10]  
C
.021 0.53  
.013 0.33  
.050 1.27  
.007 [0.18]  
C B A  
.219 5.56  
.191 4.85  
.219 5.56  
.191 4.85  
Preliminary dimensions, for reference only  
(reference JEDEC MS-018 AB)  
Dimensions in inches  
Millimeters (mm) in brackets, for reference only  
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions  
Exact case and lead configuration at supplier discretion within limits shown  
A
Terminal #1 mark area  
www.allegromicro.com  
2559  
PROTECTED  
QUAD POWER DRIVER  
LB Package, 16-pin SOIC  
with internally fused pins 4 and 5, and 12 and 13  
10.63 .419  
9.97 .393  
0.25 [.010] M B M  
10.50 .614  
10.10 .598  
8º  
0º  
A
B
16  
0.33 .013  
0.20 .008  
7.60 .299  
7.40 .291  
A
1.27 .050  
0.40 .016  
1
2
0.25 .010  
16X  
C
SEATING PLANE  
GAUGE PLANE  
SEATING  
PLANE  
0.10 [.004]  
C
0.51 .020  
0.31 .012  
16X  
2.65 .104  
2.35 .093  
0.25 [.010] M  
C
A
B
1.27 .050  
0.30 .012  
0.10 .004  
Preliminary dimensions, for reference only  
Dimensions in millimeters  
U.S. Customary dimensions (in.) in brackets, for reference only  
(reference JEDEC MS-013 AA)  
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions  
Exact case and lead configuration at supplier discretion within limits shown  
A
Terminal #1 mark area  
Copyright ©1995, 2007, Allegro MicroSystems, Inc.  
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.  
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to  
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify  
that the information being relied upon is current.  
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the  
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.  
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its  
use; nor for any infringement of patents or other rights of third parties which may result from its use.  
For the latest version of this document, visit our website:  
www.allegromicro.com  
115 Northeast Cutoff, Box 15036  
Worcester, Massachusetts 01615-0036 (508) 853-5000  

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