ALD110900SA [ALD]
QUAD/DUAL N-CHANNEL ZERO THRESHOLD EPAD MATCHED PAIR MOSET ARRAY; QUAD /双N沟道零门槛EPAD匹配对MOSET ARRAY
| 型号： | ALD110900SA |
| 厂家： | 
ADVANCED LINEAR DEVICES |
| 描述： | QUAD/DUAL N-CHANNEL ZERO THRESHOLD EPAD MATCHED PAIR MOSET ARRAY |
| 文件： | 总2页 (文件大小：39K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TM
ADVANCED
LINEAR
®
e
EPAD
A
DEVICES, INC.
ALD110800/ALD110800A/ALD110900/ALD110900A
QUAD/DUAL N-CHANNEL ZERO THRESHOLD™ EPAD®
V
= +0.0V
GS(th)
MATCHED PAIR MOSFET ARRAY
FEATURES
GENERAL DESCRIPTION
• Precision zero threshold voltage mode
• Nominal R @V =0.0V of 104KΩ
• Matched MOSFET to MOSFET characteristics
• Tight lot to lot parametric control
ALD110800A/ALD110800/ALD110900A/ALD110900 are monolithic
quad/dual N-Channel MOSFETs matched at the factory using ALD’s
proven EPAD CMOS technology. These devices are intended for low
DS(ON) GS
®
voltage, small signal applications. TheALD110800/ALD110900 features
zero threshold voltage, which reduces or eliminates input to output
voltage level shift, including circuits where the signal is referenced to
GND or V+. This feature greatly reduces output signal voltage level
shift and enhances signal operating range, especially for very low
operating voltage environments. With these zero threshold devices an
analog circuit with multiple stages can be constructed to operate at
extremely low supply or bias voltage levels. As an example, an input
amplifier stage operating at 0.2V supply voltage has been demonstrated.
• V
match (V ) to 2mV and 10mV
GS(th)
OS
• Positive, zero, and negative V
• Low input capacitance
tempco
GS(th)
• Low input/output leakage currents
APPLICATIONS
• Very low voltage analog and digital circuits
• Zero power fail safe circuits
• Backup battery circuits & power failure detector
• Low level voltage clamp & zero crossing detector
• Source followers and buffers
ALD110800A/ALD110800/ALD110900A/ALD110900 matched pair
MOSFETs are designed for exceptional device electrical characteris-
tics matching. As these devices are on the same monolithic chip, they
also exhibit excellent tempco tracking characteristics. They are
versatile as design components for a broad range of analog applica-
tions such as basic building blocks for current sources, differential
amplifier input stages, transmission gates, and multiplexer applications.
• Precision current mirrors and current sources
• Capacitives probes and sensor interfaces
• Charge detectors and charge integrators
• Differential amplifier input stage
• High side switches
• Peak detectors and level shifters
• Sample and Hold
• Current multipliers
• Analog switches / multiplexers
• Voltage comparators and level shifters
Besides matched pair electrical characteristics, each individual
MOSFET also exhibits well controlled parameters, enabling the user
to depend on tight design limits. Even units from different batches
and different date of manufacture have correspondingly well matched
characteristics.
PIN CONFIGURATION
ALD110800
These devices are built for minimum offset voltage and differential
thermal response, and they are designed for switching and amplifying
applications in +0.2V to +10V systems where low input bias current,
-
-
V
V
low input capacitance and fast switching speed are desired. The V
GS(th)
1
2
3
4
5
6
7
8
N/C*
16
15
14
13
12
11
10
9
N/C*
of these devices are set at +0.0V, which classify them as both enhance-
ment mode and depletion mode devices. When the gate is set at 0.0V,
G
N2
G
N1
M 2
M 1
the drain current = +1µA@ V =1+0.1V, which allow a class of circuits
DS
D
N1
D
N2
with output voltage level biased at or near input voltage level without
voltage level shift. These devices exhibit same well controlled turn-off
and sub-threshold characteristics as standard enhancement mode
MOSFETs.
+
+
V
V
S
12
-
-
V
S
V
34
D
D
N3
N4
N4
M 4
M 3
TheALD110800A/ALD110800/ALD110900A/ALD110900 are MOSFET
devices that feature high input impedance (1012Ω) and high DC current
gain (>108 ). A sample calculation of the DC current gain at a drain
current of 3mA and input leakage current of 30pA at 25°C is = 3mA/
30pA = 100,000,000. For most applications, connect V+ pin to the most
positive voltage potential (or left open unused) and V- and N/C pins to
the most negative voltage potential in the system. All other pins must
have voltages within these voltage limits.
G
G
N3
N/C*
N/C*
-
-
V
V
PC, SC PACKAGES
ALD110900
ORDERING INFORMATION
-
-
V
V
1
8
7
6
5
N/C*
N/C*
Operating Temperature Range*
0°C to +70°C
0°C to +70°C
G
N2
G
2
3
4
N1
M 1
M 2
D
N1
D
16-Pin
Plastic Dip
16-Pin
SOIC
8-Pin
Plastic Dip
Package
8-Pin
SOIC
Package
N2
-
-
S
12
V
V
Package
Package
ALD110800APC ALD110800ASC ALD110900APA ALD110900ASA
ALD110800PC ALD110800SC ALD110900PA ALD110900SA
PA, SA PACKAGES
*N/C pins are internally connected.
Connect to V- to reduce noise
* Contact factory for industrial temp. range or user-specified threshold voltage values
Rev 1.0-0506 ©2005 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com
ABSOLUTE MAXIMUM RATINGS
Drain-Source voltage, V
Gate-Source voltage, V
Power dissipation
10.6V
10.6V
500 mW
DS
GS
Operating temperature range PA, SA, PC, SC package
Storage temperature range
Lead temperature, 10 seconds
0°C to +70°C
-65°C to +150°C
+260°C
OPERATING ELECTRICAL CHARACTERISTICS
+
V
= +5V (or open) V- = GND T = 25°C unless otherwise specified
A
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
ALD110800A / ALD110900A ALD110800/ ALD110900
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
0.02
Unit
Test Conditions
I =1µA, V = 0.1V
DS
Gate Threshold Voltage
Offset Voltage
V
-0.01
0.00
1
0.01
2
-0.02
0.00
2
V
GS(th)
OS
DS
V
10
mV
V
-V
GS(th)1 GS(th)2
Offset Voltage Tempco
TC
TC
5
5
µV/°C
mV/°C
V
= V
DS1 DS2
VOS
GateThreshold Voltage Tempco
-1.7
0.0
+1.6
-1.7
0.0
+1.6
I
D
I
D
I
D
= 1µA, V = 0.1V
DS
VGS(th)
= 20µA, V
= 40µA, V
= 0.1V
= 0.1V
DS
DS
On Drain Current
I
12.0
3.0
12.0
3.0
mA
V
V
= +9.5V, V
= +4.0V, V
= +5V
= +5V
DS (ON)
GS
GS
DS
DS
Forward Transconductance
G
FS
1.4
1.4
mmho
V
V
= +4.0V
= +9.0V
GS
DS
Transconductance Mismatch
Output Conductance
∆G
FS
1.8
68
1.8
68
%
G
OS
µmho
V
V
= +4.0V
= +9.0V
GS
DS
Drain Source On Resistance
Drain Source On Resistance
R
R
500
500
Ω
V
V
= +0.1V
= +4.0V
DS (ON)
DS (ON)
DS
GS
104
5
104
5
KΩ
V
V
= +0.1V
= +0.0V
DS
GS
Drain Source On Resistance
Tolerance
∆R
%
V
V
= +0.1V
= +4.0V
DS (ON)
DS
GS
Drain Source On Resistance
Mismatch
∆R
BV
I
0.5
0.5
%
V
DS (ON)
Drain Source Breakdown
Voltage
10
10
I
= 1.0µA
DS
DSX
-
V = V
= -1.0V
GS
Drain Source Leakage Current1
10
5
400
4
10
5
400
4
pA
nA
V
= -1.0V, V =+5V
DS
DS (OFF)
GS
-
V = -5V
T
A
= 125°C
Gate Leakage Current1
I
30
1
30
1
pA
nA
V
= 0V V
=125°C
= +10V
GS
GSS
DS
T
A
Input Capacitance
C
C
2.5
0.1
10
2.5
0.1
10
pF
pF
ns
ISS
Transfer Reverse Capacitance
Turn-on Delay Time
RSS
+
+
t
on
V
V
= 5V R = 5KΩ
L
Turn-off Delay Time
t
off
10
60
10
60
ns
= 5V R = 5KΩ
L
Crosstalk
dB
f = 100KHz
1
Notes:
Consists of junction leakage currents
ALD110800/ALD110800A/ALD110900/ALD110900A
Advanced Linear Devices
2
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