AP1023AEN [AKM]
Stepper Motor Controller, 0.95A, QFN-24;
| 型号： | AP1023AEN |
| 厂家： | 
ASAHI KASEI MICROSYSTEMS |
| 描述： | Stepper Motor Controller, 0.95A, QFN-24 电动机控制 |
| 文件： | 总15页 (文件大小：618K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
[AP1023AEN]
AP1023
2ch H-Bridge Constant Voltage Control Motor Driver IC
1. General Description
The AP1023 is 2ch H-Bridge Motor Driver corresponding to motor operating voltage range from 1.6 to 6.5V.
The AP1023 is capable of driving two motor or one stepper motor. The AP1023 is suitable for battery drive
application, and realizes to the battery life by PWM constant voltage control. The AP1023 is housed in a
small 4×4mm 24pin QFN package with good heat dissipation performance, and therefore contributes to
downsize Printed Circuit Board.
2. Features
PWM Constant Voltage Control
Motor Operating Voltage
1.6V～6.5V
Control Supply Voltage
2.7V～5.5V
Maximum Output Current
1.45A(Ta=25℃, 2ch simultaneously)
0.54Ω (Ta=25°C)
H-Bridge On-Resistance（High＋Low)
Built-in Charge Pump block
Under Voltage Lockout Circuit (UVLO)
Thermal Shutdown Circuit (TSD)
Operating Temperature Range
Package
-30°C～85°C
24pin QFN (4mm×4mm, with Ex-posed PAD)
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3. Table of Contents
1. General Description........................................................................................................................................... 1
2. Features.............................................................................................................................................................. 1
3. Table of Contents............................................................................................................................................... 2
4. Block Diagram and Functions ........................................................................................................................... 3
■Block Diagram .................................................................................................................................................. 3
■Functions ........................................................................................................................................................... 3
5. Ordering Guide.................................................................................................................................................. 4
6. Pin Configurations and Functions...................................................................................................................... 4
■Pin Configurations............................................................................................................................................. 4
■Functions ........................................................................................................................................................... 4
7. Absolute Maximum Ratings.............................................................................................................................. 5
8. Recommended Operating Conditions................................................................................................................ 6
9. Electrical Characteristics ................................................................................................................................... 7
10.
Functional Descriptions................................................................................................................................. 9
10.1 Operation Outline ...................................................................................................................................... 9
10.2 Motor Driver Block Configuration.......................................................................................................... 10
10.3 Protection Circuits ................................................................................................................................... 11
11.
Recommended External Circuits ................................................................................................................. 12
■Recommended External Circuits..................................................................................................................... 12
12.
Package........................................................................................................................................................ 13
■Outline Dimensions......................................................................................................................................... 13
■Recommended Land Pattern............................................................................................................................ 13
■Marking ........................................................................................................................................................... 13
13.
Revise History ............................................................................................................................................. 14
IMPORTANT NOTICE ...................................................................................................................................... 15
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4. Block Diagram and Functions
■Block Diagram
CH
VG
VM
CL
VC
Charge Pump
LDMOS
OUT1A
OUT1B
VREF
VSET
VREF
UVLO
Saw-Tooth
OSC
H-Bridge
1
PGND
TSD
H-Bridge
Control
Circuit
LDMOS
OUT2A
OUT2B
IN1
IN2
IN3
IN4
H-Bridge
2
Control
Circuit
EN
M1
M0
EP
Figure 1. Block Diagram
■Functions
No
Block Name
Function
1
Charge Pump Generate High side Gate drive Voltage.
2
VREF
Output Reference Voltage. It uses PWM Constant Voltage Setting pin, VSET.
According to input signal and VSET setting Voltage, VM voltage, the AP1023
generates PWM control signal and supplies H-Bridge Control Circuit.
If VC voltage is lower than 2.2V (typ.) at the starting, the H-Bridge output is the
Hi-Z.
If the internal temperature of the IC (Tj) reaches 175 °C (typ.), the H-Bridge outputs
Hi-Z.
Every block is controlled by signal of Input terminal.
3
4
5
6
7
8
Saw-Tooth OSC
UVLO
TSD
Control Circuit
When UVLO and TSD operate at the abnormal operation, every block is stopped.
H-Bridge Control According to information from Control Circuit and PWM control setting (M0, M1),
Circuit
LDMOS
H-Bridge1, 2
PWM Constant Voltage (VSET), the AP1023 generates signal to drive H-Bridge.
H-Bridge is configured by Hi-Side(TOP) and Lo-Side(BOT) Nch-MOSFET.
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5. Ordering Guide
AP1023AEN
-30°C～85°C
24-pin QFN
6. Pin Configurations and Functions
■Pin Configurations
OUT2A
OUT2A
VSET
VREF
IN4
19
20
21
22
23
24
12
11
10
9
VM
VM
(Top View)
IN3
OUT1A
OUT1A
IN2
8
Exposed pad
IN1
7
Exposed PAD must be connected to GND.
Notes
■Functions
Pin Number Pin Name I/O
Functions
1,2
3
4
OUT1B
VG
O
Motor Driver Output
I/O Connect Terminal for Stabilizing Capacitor.
I/O Connect Terminal for Charge Pump Capacitor.
I/O Connect Terminal for Charge Pump Capacitor.
CH
CL
5
6
7
8
9
10
11
12
13
14
15
VC
IN1
IN2
IN3
P
I
I
I
I
O
I
P
I
Control Power Supply
Control Signal Input
Control Signal Input
Control Signal Input
Control Signal Input
Output Terminal of Reference Voltage
Constant Voltage Analog input
Ground
Built-in 200kΩ Pull-down
Built-in 200kΩ Pull-down
Built-in 200kΩ Pull-down
Built-in 200kΩ Pull-down
IN4
VREF
VSET
GND
EN
Enable Signal Input
Built-in 200kΩ Pull-down
M0
I
Constant Voltage magnification setting Input (x1, x2) Built-in 200kΩ Pull-down
Driver control setting Input
Built-in 200kΩ Pull-down
(Two Phase-excitation, Generic)
16
M1
I
17,18
19,20
21,22
23,24
OUT2B
OUT2A
VM
O
O
P
Motor Driver Output
Motor Driver Output
Motor Power Supply
Motor Driver Output
OUT1A
O
PGND and EP are shorted
on the frame.
EP
PGND
P
Power Ground,Ex-posed Pad
Note 1. I(Input pin), O(Output pin), P(Power pin), I/O(Input/Output pin)
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7. Absolute Maximum Ratings
Parameter
Symbol
VC
min
-0.5
max
6.0
Unit
V
Condition
Control Supply Voltage
Motor Operating Voltage
VM
-0.5
-0.5
7.0
V
V
VC Level Terminal Voltage
(INn,VREF,VSET,M1,M0,EN)
VM Level Terminal Voltage
(OUTnA, OUTnB,CL)
VC+VM Level Terminal Voltage
(CH,VG)
Vterm1
VC
Vterm2
Vterm3
-0.5
-0.5
-
VM
13.0
1.35
V
V
A
Ta=85°C, 1ch
(Note 3)
Maximum Output Current
Iload
PD
Ta=85°C,
2ch simultaneously
(Note 3,Note 4)
Thermal shutdown detection
Temperature: Tj=150°C ,
(Note 3,Note 4)
-
-
0.95
A/ch
W
Power Dissipation
3.125
Junction Temperature
Storage Temperature
Tj
-
150
150
°C
°C
Tstg
-40
Note 2.All above voltages are with respect to GND=PGND=0V. GND and PGND must be connected to a
ground plane.
Note 3. For Power Dissipation, the output current rating may be limited by duty cycle, Ta, and PCB board
heat sinking design.
Note 4.A 4-layer board is used. RθJA = 40°C/W.
3.6
3.2
2.8
2.4
R
θJA=40°C/W at 4-layer PCB
2.0
1.6
1.2
0.8
0.4
0.0
0
25
50
75 85 100
125
150 175
Temperature (°C)
Figure 2. Maximum Power Dissipation
WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal
operation is not guaranteed at these extremes.
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8. Recommended Operating Conditions
(Ta=25°C, unless otherwise specified.)
Parameter
Motor Operating Voltage
Control Supply Voltage
Input Frequency Range
VSET terminal Voltage
Operating Temperature Range
Symbol min
typ
5.0
3.0
-
max
6.5
5.5
1
Unit
Condition
VM
VC
1.6
2.7
-
V
V
Fin
kHz M1=”L”,IN1,2
VSET
Ta
0.5
-30
-
VC
85
V
-
°C
WARNING: The maximum ratings are the absolute limitation values with the possibility of the IC breakage.
When the operation exceeds this standard quality cannot be guaranteed.
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9. Electrical Characteristics
(Ta=+25°C, VM=3.0V,VC=3.3V, unless otherwise specified.)
Parameter
Quiescent Current
Symbol
Condition
min
typ
max
Unit
VC Quiescent Current at the time
of Power Save
IVCOFF IN=All “L”
-
-
1
µA
VM Quiescent Current at the time
of Power Save
VC Quiescent Current at the time of
Operating
Charge Pump
Charge Pump Voltage
Charge Pump Rise Time
H-Bridge
IVMOFF IN=All “L”
IVC
VG
-
-
-
1
µA
0.45
1.0
mA
-
-
0.3
6.3
3.0
V
ms
VG = VM+VC、Iload=0A
tVGON Charge-Pump: VC > VCUV
-
Driver on resistance 1
(H-Bridge High+Low)
Driver on resistance 2
(H-Bridge High+Low)(Note 6)
H-Bridge Driver
RON
RONTj
VF
Iload 1ch/2ch = 0.1A/0.1A
-
-
-
0.54
0.72
0.8
0.70
0.86
1.2
Ω
Ω
V
Iload 1ch/2ch = 0.1A/0.1A
Tj = 150°C
IF = 100mA
Body diode forward voltage
Delay Time
Output Delay Time
Connected to 1kΩ between
OUTA and OUTB.(Figure 3)
IN1=IN3=”L”, VM=3.6V
IN2=IN4=200kHz
tPDLH
tPDHL
-
-
-
-
1.0
1.0
μs
μs
(“L”→”H”)
Output Delay Time
VC=3V, VSET=1.9V
(“H”→”L”)
N=2 (M0=”H”), M1=”H”
Connected to 20Ω between
OUTA and OUTB.
Output Pulse Width
tPW
0.6
1.0
1.4
μs
Input Pulse Width：1μs(Figure 3)
Control Logic
Input High Level Voltage
Input Low Level Voltage
Input Pulse Rise Time
Input Pulse Fall Time
Input High Level Current
Input Low Level Current
VIH
VIL
tR
tF
IIH
IIL
0.7×VC
-
-
-
-
15
-
-
0.3×VC
1.0
V
V
µs
µs
µA
µA
-
-
-
1.0
30
1.0
VC=3.0V
7.5
-1.0
Constant Voltage Control
VREF Output Voltage
PWM Frequency1
PWM Frequency2
Constant Voltage Control
Accuracy1
VREF
Iref=0.1mA
VM=1.6V~6.5V
VM=1.8V~3.6V
2.25
10
25
2.5
-
-
2.75
160
140
V
kHz
kHz
fPWM
fPWM
1
2
DutyOUT
DutyOUT
VOUT
1
2
45
95
50
-
55
%
%
V
VM=3.6V、VSET=1.8V,M0=”L”
VM=1.8V、VSET=1.8V,M0=”L”
Constant Voltage Control
Accuracy2
100
1.85
VM=2.0V、Iout=200mA
VSET=1.85V
Voltage between the OUT terminal
1.65
1.75
Protection Circuit
VC Under Voltage Detect Voltage
Thermal Shutdown Temperature
(Note 6)
VCUV
TTSD
1.9
150
-
2.2
175
30
2.5
200
-
V
°C
°C
Temperature Hysteresis (Note 6)
TTSDHYS
Note 5.All above voltage is defined to GND=0V.
Note 6.Not tested under mass-production.
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VC
VC
IN1/2A
IN1/2B
IN1/2A
IN1/2B
50%
1us
50
50
％
％
tPDLH
tPDHL
VM
VM
90
％
OUT1/2A
OUT1/2B
OUT1/2A
OUT1/2B
50%
tPW
10
％
(a) Delay Time
Figure 3.Timmimg Chart (Delay Time, Pulse Width)
(b) Pulse Width
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10. Functional Descriptions
10.1 Operation Outline
The AP1023 can adjust the PWM duty of the output signal so that the average voltage of the H-Bridge output
is about “VSET×N”.
Ex. N=1, VSET =1.8V, VM=3.6V→50% duty PWM signal Output,
H-Bridge Output average Voltage=1.8V
N=1, VSET =1.8V, VM=1.8V→100% duty PWM signal Output,
H-Bridge Output average Voltage=1.8V
H-Bridge Output average voltage can be hold without depending VM.
Ex.VREF×N>VM→100% duty, H-Bridge Output average Voltage=1.8V
It should be noted that this average output voltage does not include the voltage loss due to the load current
and the on-resistance of the H-Bridge. Please note that different from the actual voltage applied to the load.
Calculation of Output signal duty : PWM duty = VSET×N /VM
Table 1.Selection of the Setting voltage magnification (N) by the M0 signal
M0
L
H
N
1 (PWM Constant Voltage Control)
2 (PWM Constant Voltage Control)
Table 2.Selection of the Input Logic by the M1 signal (Input Logic of M1 = "L" is the best in the case of a
Two-phase excitation.)
M1
L
H
Input Logic
Two-phase excitation
Generic
Table 3. M1=”L”
INPUT
IN2
OUTPUT
Mode
EN
L
H
H
H
IN1
IN3
IN4
OUT1A
OUT1B
OUT2A
OUT2B
-
L
H
-
-
-
-
L
H
-
-
-
-
-
-
-
-
-
-
Hi-Z
L
H(PWM)
Hi-Z
H(PWM)
Hi-Z
-
-
L
Hi-Z
-
-
H(PWM)
L
Power Save(Note 7)
CCW(Reverse)
CW(Forward)
L
-
-
-
-
CCW(Reverse)
CW(Forward)
H
-
H(PWM)
Table 4. M1=”H”
INPUT
IN1 IN2 IN3
OUTPUT
Mode
EN
L
IN4
OUT1A
OUT1B
OUT2A
OUT2B
-
L
H
L
H
-
-
L
L
H
H
-
-
-
-
-
-
L
H
L
H
-
-
-
-
-
L
L
H
H
Hi-Z
L
H(PWM)
Hi-Z
Hi-Z
Hi-Z
-
-
-
-
L
L
Power Save(Note 7)
Brake
H
H
H
H
H
H
H
H
L
L
-
-
-
-
L
CW(Forward)
CCW(Reverse)
Standby
L
Hi-Z
-
-
-
-
H(PWM)
Hi-Z
-
-
-
-
Brake
H(PWM)
L
-
-
CW(Forward)
CCW(Reverse)
Standby
-
-
H(PWM)
Hi-Z
-
-
Hi-Z
Note 7. Charge Pump block and TSD, UVLO don’t operate at the Power Save.
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10.2 Motor Driver Block Configuration
The N-ch LDMOS FET of the output stage is layout on both sides of the high-side and low-side, and
therefore the AP1023 possible to be housed in a small package.
Hi-side FET is driven by VG. “VG=VM+VC” is generated by Charge-Pump. Lo-side FET is driven by VC.
VG
IN1
CH
CVG
IN2
IN3
CHL
Charge
Pump
Pre Driver
VG
Control
Logic
CL
VM
IN4
EN
M1
CVM
M0
OUTnA
VC
VG
VC
OUTnB
PGNDn
Figure 4.Driver Block Equivalent circuit
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10.3 Protection Circuits
・Under Voltage Lockout(UVLO)
If VC voltage is lower than 2.2V (typ.) at the starting, the H-Bridge output is the Hi-Z.
・Thermal Shutdown(TSD)
When the internal temperature of the IC reaches the specified
temperature (TTSD(min)=150°C), and the H-Bridge driver
outputs Hi-Z. When the internal temperature after the
detection is lowered about 30°C (TTSDHYS), drivers will start
the operation.
Detection of abnormal heating
↓
OUTnA/OUTnB: Hi-Z
Waiting for Temperature decrease
Restart Temperature = TTSD - TTSDHYS
Hysterisis：30℃typ
Motor Driver restaarts
OUTnA/OUTnB:
IN1～IN4 setting
Figure 5.Detection of abnormal heating
TSD
TDET
TDETHYS
Tj
VM
UVLO
VCDET_LV
VC
IN
IOUT
OUT
Hi-Z
Hi-Z
Hi-Z
Figure 6. Protection Circuits Timing Chart
Note 8.There is no restriction to the power-up sequence of VM and VC.
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11. Recommended External Circuits
■Recommended External Circuits
・Driving Stepper Motor(External VREF)
・Driving Stepper Motor(Internal VREF)
CHL
CHL
CVM1
CVM2
CVM2
VM
VM
CVM1
CVC
CVG
CVG
VM
CH
VG
VM
CH
VG
CL
CL
VC
VC
VC
VC
CVC
OUT1A
OUT1B
OUT1A
OUT1B
VREF
VREF
VSET
COUT
COUT
R1
R2
VSET
M
M
CVS
VSET
CVR
OUT2A
OUT2B
OUT2A
OUT2B
IN1
IN1
AP1023
AP1023
COUT
COUT
IN2
IN3
IN4
IN2
IN3
IN4
CPU
CPU
EN
M0
M1
EN
M0
M1
PGND
PGND
EP
EP
・Driving DC Motor(External VREF)
・Driving DC Motor(Internal VREF)
CHL
CHL
CVM2
CVM1
CVM2
VM
CVM1
VM
CVG
CVG
VM
CH
VG
CL
VM
CH
VG
CL
VC
VC
VC
CVC
VC
CVC
OUT1A
OUT1B
OUT1A
OUT1B
VREF
VSET
VREF
COUT
R1
R2
COUT
M
M
M
VSET
CVS
VSET
CVR
OUT2A
OUT2B
OUT2A
OUT2B
IN1
IN1
AP1023
AP1023
COUT
COUT
M
IN2
IN3
IN4
IN2
IN3
IN4
CPU
CPU
EN
M0
M1
EN
M0
M1
PGND
PGND
EP
VC
EP
VC
Figure 7.Recommended External Circuits
Table 5. Parts List
Item
Value
22
1.0
Unit
µF
µF
Note
stabilization capacitors
de-coupling capacitor
CVM1
CVM2
CVC
0.1
µF
CHL
0.1
µF
CVG
0.1
µF
CVR
0.1
µF
CVS
COUT
R1
100
0.1
130k
370k
pF
µF
ohm
ohm
R1+R2≧50kΩ
R2
Note 9.Above values are examples. Please choose appropriate external components for your system board.
Note 10.Capacitance of CVM and CVC should be determined in consideration of the load current profile, the
load capacitance, the line resistance and etc. of the actual system board.
Note 11.Please layout the large ground plane on the PCB.
Note 12.Exposed Pad (heat sink) is common to the ground terminal. Please connect it to the ground of the
PCB.
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12. Package
■Outline Dimensions
・24-pin QFN (Unit : mm)
0.75 0.05
C0.35
24
B
19
18
1
2.60 0.10
A
12
7
0.25 0.05
0.10
4.00
0 ~ 0.05
0.50
M
0.10
C
A B
0.08 C
C
■Recommended Land Pattern
■Marking
(1) 1pin Indication
(2) Market No.
1023
(2)
(3) Year code (last digit)
(4) Week code
YWWD
(3)
(4)
(5)
(1)
(5) Management code
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13. Revise History
Date
(YY/MM/DD)
16/03/24
Revision
00
Page
-
Contents
First Edition
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IMPORTANT NOTICE
0. Asahi Kasei Microdevices Corporation (“AKM”) reserves the right to make changes to the information
contained in this document without notice. When you consider any use or application of AKM product
stipulated in this document (“Product”), please make inquiries the sales office of AKM or authorized
distributors as to current status of the Products.
1. All information included in this document are provided only to illustrate the operation and application
examples of AKM Products. AKM neither makes warranties or representations with respect to the
accuracy or completeness of the information contained in this document nor grants any license to any
intellectual property rights or any other rights of AKM or any third party with respect to the information
in this document. You are fully responsible for use of such information contained in this document in
your product design or applications. AKM ASSUMES NO LIABILITY FOR ANY LOSSES
INCURRED BY YOU OR THIRD PARTIES ARISING FROM THE USE OF SUCH INFORMATION
IN YOUR PRODUCT DESIGN OR APPLICATIONS.
2. The Product is neither intended nor warranted for use in equipment or systems that require
extraordinarily high levels of quality and/or reliability and/or a malfunction or failure of which may
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complying with safety standards and for providing adequate designs and safeguards for your hardware,
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information contained in this document, you should comply with the applicable export control laws and
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technology may not be used for or incorporated into any products or systems whose manufacture, use,
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5. Please contact AKM sales representative for details as to environmental matters such as the RoHS
compatibility of the Product. Please use the Product in compliance with all applicable laws and
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noncompliance with applicable laws and regulations.
6. Resale of the Product with provisions different from the statement and/or technical features set forth in
this document shall immediately void any warranty granted by AKM for the Product and shall not create
or extend in any manner whatsoever, any liability of AKM.
7. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior
written consent of AKM.
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AP102A102JQU2A
Ceramic Capacitor, Multilayer, Ceramic, 200V, 5% +Tol, 5% -Tol, C0G, 30ppm/Cel TC, 0.001uF, Surface Mount, 1210, CHIP
KYOCERA AVX
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