AT1367D [AIMTRON]
1MHz, 800mA Synchronous Buck Converter With Power Good Detector & LDO; 1MHz时， 800毫安同步降压转换器的电源良好探测器及LDO
| 型号： | AT1367D |
| 厂家： | 
AIMTRON TECHNOLOGY |
| 描述： | 1MHz, 800mA Synchronous Buck Converter With Power Good Detector & LDO |
| 文件： | 总14页 (文件大小：649K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AT1367A/B/C/D
Preliminary Product Information
1MHz, 800mA Synchronous Buck Converter
With Power Good Detector & LDO
Features
General Description
• Operation Voltage 2.5V~6.0V
• Oscillation frequency 1MHz
The AT1367A/B/C/D provides complete
control for a DC/DC converter optimized for
• Output Current Maximum 800mA（DC-DC
Converter）
hight-performance microprocessor applications. It
consists of a synchronous step-down DC/DC
• Built-In 400mA/LDO
• Power Good Indicator with Time Delay
Adjustable
converter and
a
high-speed LDO regulator
connected in series with the DC/DC converter
output. A power good detector and LDO ON/OFF
control is also built-in(metal option). DC/DC
converter is operated on current mode architecture
for excellent line and load transient response.
• Built-In Current Limit
• Built-In UVLO
• Built-In Thermal ShutDown
• Built-In LDO ON/OFF Control（Metal Option） 1MHz operation frequency is allowing the use of
small surface mount inductor and capacitor. The
internal synchronous switch increases efficiency
and eliminates the need for an external schottky
diode. The AT1367A/B/C/D is
a
family of
Applications
• Power Supply for Slim Type devices
low-noise
synchronous
step-down DC/DC
converters that is ideally suited for systems
powered form a 1-cell Li-ion battery or from a
3-cell to 4-cell NiCd, NiMH, or alkaline battery. It
can also be used to USB-based power system.
Block Diagram
VBG
VBG
Vref
VREG
UVLO
VCC
Current
Sense
5
AGND
+
+
-
R
S
Q
SLOPE
SW
OSC
Shoot
Throught
Control
LDO
Vref
CTL
CTL
+
-
R5
VCC
PGND
Auto
Discharge
DELAY
0.9 x
Vref
R2
R1
OUT1
OUT2
*CTL and /PG
Metal Option
0.35uA
Current
Limit
PG
UVLO
R3
R4
/PG
-
+
-
CTL
+
Vref
*OUT2=2.5V/1.8V
Metal Option
Vref
Aimtron reserves the right without notice to change this circuitry and specifications.
7F, No.9, Park Avenue II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878
Fax: 886-3-563-0879
WWW: http://www.aimtron.com.tw
Email: service@aimtron.com.tw
3/2/2006 REV:1.2
1
AT1367A/B/C/D
Preliminary Product Information
1MHz, 800mA Synchronous Buck Converter
With Power Good Detector & LDO
Pin Assignment
1
10
2
3
4
5
9
AT1367A AT1367B AT1367C AT1367D
/PG
/PG
CTL
CTL
8
7
6
AT1367
LDO
2.5V
LDO
1.8V
LDO
2.5V
LDO
1.8V
DFN10 (TOP VIEW)
Ordering Information
Part Number
1367 N
Package
DFN10,Green
Marking
：
A:1367AN B:1367BN C:1367CN D:1367DN
： Date Code
*For more marking information, contact our sales representative directly.
Pin Description
Symbol
Pin No.
Descript
Power Good Indicator Output(Ative Hi)
PG
1
/Power Good Output (Ative Lo) or LDO ON/OFF Control
/PG or CTL
2
( Metal Option )
VCC
SW
PGND
VBG
3
4
5
6
7
Power Supply
OUT1 Inductor Node
Power Ground
Reference Output Voltage
Analog Ground
AGND
The capacitor connection terminal for a reset delay time
DELAY
8
setup
OUT1
OUT2
9
10
LDO Intput and DC/DC Output
LDO Output
7F, No.9, Park Avenue II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878
Fax: 886-3-563-0879
WWW: http://www.aimtron.com.tw
Email: service@aimtron.com.tw
3/2/2006 REV:1.2
2
AT1367A/B/C/D
Preliminary Product Information
1MHz, 800mA Synchronous Buck Converter
With Power Good Detector & LDO
Absolute Maximum Ratings*1
Rated Value
Parameter
Power Supply Voltage
Input Pin Voltage
Symbol
Unit
Min.
-0.3
Max.
+6.5
VCC
V
V
V
CTL, OUT1, OUT2
SW, PG, /PG
-0.3
VCC
-0.3
VCC+0.3
P-Channel Switch Source Current
—
-
1
A
(DC)
N-Channel Switch Sink Current
—
—
-
-
-
1
A
A
(DC)
Peak SW Sink and Source Current
Thermal Resistance from Junction
1.5
DFN10
35.25
0C/W
to Ambient θ
JA
Thermal Resistance from Junction
to Case θ
DFN10
-
3
0C/W
JC
Operating temperature TA
—
—
-35
-55
-
+85
+150
2
0C
0C
Storage temperature
HBM
MM
KV
V
ESD Susceptibility*2
-
200
1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. These are stress ratings only, and functional operation of the device at these or any other
conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect device reliability.
2. Device are ESD sensitive. Handling precaution recommended. The Human Body model is a 100pF
capacitor discharged through a 1.5KΩ resistor into each pin.
Recommended Operating Conditions
(Ta=+250C)
Values
Parameter
Symbol
Unit
Min.
2.5
-20
-
Typ.
--
Max.
6.0
Ｖ
°C
°C
Power supply voltage
VIN
TOP
TJ
Operating temperature*
Operating junction temperature
+25
-
+85
+150
*Using X5R or X7R input capacitors.
7F, No.9, Park Avenue II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878
Fax: 886-3-563-0879
WWW: http://www.aimtron.com.tw
Email: service@aimtron.com.tw
3/2/2006 REV:1.2
3
AT1367A/B/C/D
Preliminary Product Information
1MHz, 800mA Synchronous Buck Converter
With Power Good Detector & LDO
Electrical Characteristics
(VCC = 3.6V,T =+25℃ , unless otherwise noted. )
a
Values
Min. Typ. Max.
Parameter
Symbol
Condition
Unit
DC/DC CONVERTER
VCC UVLO
UVLO Hysteresis width
Input Supply Range
Quiescent Current
VUV VCC=3V→2V Sweep
VUVHY
VCC
-
-
2.5
-
2.4
100
-
500
-
-
-
6.0
-
V
mV
V
µA
%
IS
Active Mode
Output1 Voltage Accuracy
VOUT1
-2
+2
Output1 Voltage
VOUT1-Line VCC=3.5V to 6.0V
-
0.1
0.5
%
line-regulation
Output1 Variation
with Temperature
Feedback current
T =-20℃ to +85℃
a
-
-
0.5
6
1.0
-
%
IOUT1 VOUT1=3.3V
ICL1 VIN=5V, VOUT1=3.3V
uA
A
Current Limit
1.10 1.25 1.50
Maximum Output Current
IO
VIN=5V, VOUT1=3.3V, L=4.7uH
-
0.8
-
-
800
1.2
--
mA
MHz
KHz
fosc1 Vout1=3.3V
fosc2 Vout1=0V
1.0
200
Oscillator Frequency
R
DS(ON) of P-Channel
RPFET ILX= 600mA
-
0.3
0.4
Ω
MOSFET
R
DS(ON) of N-Channel
RNFET ILX= -600mA
ISWL
-
-
0.25 0.35
Ω
MOSFET
SW Leakage Current
±0.1
±1
µA
CONTROL BLOCK
CTL Threshold
CTL leakage Current
PG on voltage
PG Hysteresis width
PG pin leak current
/PG on voltage
/PG Hysteresis width
/PG pin leak current
VCTL=0V~2V sweep（Metal Option）
VCTL=5.0V（Metal Option）
VPGON IPG=1mA
VPGTHYS
IPGTLK V/PG=5.0V
VCTL
ICTL
0.3
-
-
-
-
-
-
-
0.3
1.0
6
-
80
-
-
80
-
0.5
1.5
-
0.4
-
1
0.4
-
V
µA
V
mV
uA
V
mV
uA
uA
I/PG=1mA（Metal Option）
（Metal Option）
V/PG=5.0V（Metal Option）
V/PGON
V/PGTHYS
I/PGTLK
1
0.8
DELAY Pin Charge Current IDELAY
LDO
Output2 Voltage Accuracy
Current Limit
Dropout Voltage
Load Regulation
Line Regulation
VOUT2
ICL2 VOUT1=3.3V
VDV IOUT2=400mA
∆VOUT2 IOUT2=1mA→ 100mA
-2
450
-
-
-
-
-
-
+2
-
%
mA
mV
mV
%
400 600
15 50
0.05 0.25
LR
IOUT2=100mA, VOUT1=3.5V→6.0V
Ripple Rejection Rate
PSRR IOUT2=100mA, f=1kHz
60
-
dB
CTL=0V, VOUT2=2.5V/1.8V（Metal
Option）
OUT2 Leakage Current
IOUT2LK
-
6
-
uA
7F, No.9, Park Avenue II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878
Fax: 886-3-563-0879
WWW: http://www.aimtron.com.tw
Email: service@aimtron.com.tw
3/2/2006 REV:1.2
4
AT1367A/B/C/D
Preliminary Product Information
1MHz, 800mA Synchronous Buck Converter
With Power Good Detector & LDO
Typical characteristics
Efficiency VS. Output1 Current
100
Efficiency VS. Output1 Current
100
95
90
85
80
75
70
65
60
55
50
95
90
85
80
75
70
65
VCC=5V
L=2.2uH
L=3.3uH
L=4.7uH
60
55
50
VCC=4.2V
VCC=3.6V
10
100
1000
10
100
1000
Output1 Current(mA)
Output1 Current(mA)
CH1：Vin, CH2：Vout1, CH3：PG, CH4：/PG CH1：Vout1, CH2：Vout2, CH3：PG, CH4：CTL
CH1：Vout1, CH2：Vout2, CH4：Iout1
CH1：Vout1, CH2：Vout2, CH4：Iout2
Iout1=100mA~400mA, Iout2=300mA
Iout1=300mA, Iout2=100mA~300mA
7F, No.9, Park Avenue II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878
Fax: 886-3-563-0879
WWW: http://www.aimtron.com.tw
Email: service@aimtron.com.tw
3/2/2006 REV:1.2
5
AT1367A/B/C/D
Preliminary Product Information
1MHz, 800mA Synchronous Buck Converter
With Power Good Detector & LDO
Typical Application Circuits
VIN
VBG
10nF
VCC
5.0V
10uF
AGND
4.7uH
VOUT1
3.3V/300mA
SW
DELAY
10uF
27nF
PGND
AT1367A
To DSP
/PG
OUT1
To DSP
PG
OUT2
VOUT2
2.5V/400mA
100K 100K
2.2uF
Figure 1
VIN
VBG
10nF
VCC
5.0V
10uF
AGND
4.7uH
SW
VOUT1
DELAY
3.3V/300mA
10uF
27nF
PGND
AT1367B
To DSP
/PG
OUT1
To DSP
PG
OUT2
VOUT2
1.8V/400mA
2.2uF
100K 100K
Figure 2
7F, No.9, Park Avenue II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878
Fax: 886-3-563-0879
WWW: http://www.aimtron.com.tw
Email: service@aimtron.com.tw
3/2/2006 REV:1.2
6
AT1367A/B/C/D
Preliminary Product Information
1MHz, 800mA Synchronous Buck Converter
With Power Good Detector & LDO
Typical Application Circuits ( Continued )
From DSP
VIN
CTL
VCC
5.0V
VBG
10uF
10nF
4.7uH
SW
VOUT1
DELAY
3.3V/400mA
10uF
27nF
PGND
AT1367C
AGND
PG
OUT1
To DSP
OUT2
VOUT2
2.5V/400mA
100K
2.2uF
Figure 3
From DSP
VIN
CTL
VCC
5.0V
VBG
10uF
10nF
4.7uH
SW
VOUT1
DELAY
3.3V/400mA
10uF
27nF
PGND
AT1367D
AGND
PG
OUT1
To DSP
OUT2
VOUT2
1.8V/400mA
100K
2.2uF
Figure 4
7F, No.9, Park Avenue II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878
Fax: 886-3-563-0879
WWW: http://www.aimtron.com.tw
Email: service@aimtron.com.tw
3/2/2006 REV:1.2
7
AT1367A/B/C/D
Preliminary Product Information
1MHz, 800mA Synchronous Buck Converter
With Power Good Detector & LDO
Typical Application Circuits ( Continued )
VIN
5.0V
VBG
VCC
10nF
10uF
AGND
VOUT1
4.7uH
0.1uF 1M
3.3V/300mA
SW
DELAY
10uF
27nF
PGND
AT1367B
To DSP
To DSP
100K
/PG
PG
OUT1
OUT2
VOUT2
1.8V/400mA
From /PG
100K 100K
2.2uF
Figure 5
Application Information
Capacitor Selection
In continuous mode, the source current of the top MOSFET is square wave of duty
cycle. The Primary function of the input capacitor is to provide a low impedance loop
for the edges of pulsed current drawn by the AT1367A/B/C/D. A load step at the
output can induce ringing at the input VIN. This ringing can couple to the output and
be mistaken as loop instability. The oscillation can be improved by add the
capacitance of the input capacitor. A typical value is 10µF ceramic (X5R or X7R),
POSCAP or Aluminum Polymer. These capacitors will provide good high frequency
bypassing and their low ESR will reduce resistive losses for higher efficiency. The
input capacitor RMS current varies with the input voltage and the output voltage. The
equation for the maximum RMS current in the input capacitor is:
VO
VIN
VO
VIN
IRMS = IOMAX
(1−
)
7F, No.9, Park Avenue II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878
Fax: 886-3-563-0879
WWW: http://www.aimtron.com.tw
Email: service@aimtron.com.tw
3/2/2006 REV:1.2
8
AT1367A/B/C/D
Preliminary Product Information
1MHz, 800mA Synchronous Buck Converter
With Power Good Detector & LDO
The output capacitor depends on the suitable ripple voltage. Low ripple voltage
corresponds to lower effective series resistance (ESR). The output ripple voltage is
determined by:
1
∆VOUT ≅ ∆IL (ESR +
)
8 fCOUT
The output capacitor RMS ripple current is given by:
VOUT × (VIN −VOUT
L× f ×VIN
)
1
2 3
IRMS
=
VBG Capacitor
A VBG pin is provided to decouple the bandgap reference voltage. An external
capacitor connected form VBG to GND reduces noise present on the internal
reference voltage, which in turn significantly reduces output noise and also improves
PSRR. Larger capacitor values may be used to further improve PSRR, but result in a
longer time period (slower turn on) to settle output voltage when power is initially
applied.
LDO
For general purposes, use a 2.2uF capacitor on the LDO output. Larger capacitor
values and lower ESR provide better supply noise rejection and transient response. A
higher value input capacitor may be necessary if large, fast transients are anticipated .
Ceramic capacitors have the lowest ESR, and will offer the best AC performance.
When choosing the input and output ceramic capacitors, choose the X5R or X7R
dielectric formulations. These dielectrics have the best temperature and voltage
characteristics of all the ceramics for a given value and size.
Inductor Selection
The inductor is chosen based on the desired ripple current. Large value inductors
lower ripple current and small value inductors result in higher ripple current. Always
consider the losses associated with the DCR and its effect on the total converter
7F, No.9, Park Avenue II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878
Fax: 886-3-563-0879
WWW: http://www.aimtron.com.tw
Email: service@aimtron.com.tw
3/2/2006 REV:1.2
9
AT1367A/B/C/D
Preliminary Product Information
1MHz, 800mA Synchronous Buck Converter
With Power Good Detector & LDO
efficiency when selecting an inductor. The inductor is selected to limit the ripple
current to some predetermined value, typically 20~40% of the full load current at the
maximum input voltage. The formula of inductance value is as below:
∆IL = 0.2 ~ 0.4× IOUT (MAX )
VOUT
f ×∆IL
VOUT
VIN
L =
1−
∆IL
2
(VIN −VOUT )×tON
2× L
IPK = IO +
= IO +
Power Good Indicator with Adjustable Time Delay
The PG and /PG pin terminal is an open drain output of N-MOS. Connect a resistor
from PG and /PG pin to VCC or OUT1 to create a logic signal. If OUT1 pin is less
than 2.97V (typ.) this pin is pulled to ground. When OUT1 pin is above 2.97V and
with a delay time this pin is open. PG and /PG pin is forced low when in UVLO. The
formula of adjustable delay time is as below :
0.8
IDELAY
delay − time = C ×
The Dissipation
The power loss is given by:
P
= IO2UT1 × RDS(ON)−P × D + IO2UT1 × RDS(ON)−N ×(1− D) +VIN × IOUT1 ×(tr + t f )× fs + Is ×VIN
LOSS(DC−DC)
P
= IOUT 2 ×(VOUT1 −VOUT 2 )
LOSS(LDO)
TJ (MAX ) = TA +θJA × (PLOSS (DC−DC) + PLOSS (LDO)
)
7F, No.9, Park Avenue II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878
Fax: 886-3-563-0879
WWW: http://www.aimtron.com.tw
Email: service@aimtron.com.tw
3/2/2006 REV:1.2
10
AT1367A/B/C/D
Preliminary Product Information
1MHz, 800mA Synchronous Buck Converter
With Power Good Detector & LDO
Inductors Surface Mount
Manufacturer/Part No.
Sumida CDRH4D28-3R3
Sumida CDRH5D18-4R7
Mitsumi C3-K1.8L-3R3
Mitsumi C4-K1.8L-3R3
ABC SH40283R3YSB
ABC SH40284R7YSB
Manufacturer Website
www.sumida.com
Inductance(µH)
3.3
4.7
www.mitsumi.co.jp
www.atec-group.com
3.3
3.3
4.7
Capacitors Surface Mount
Manufacturer/Part No.
TDK C3216X5R0J226M
TDK C3225X5R0J46M
GRM42-6X5R 106K6.3
TAIYO LMK212BJ225MD
TAIYO JMK212BJ475MG
Manufacturer Website
www.tdk.com
Capacitance(µF)
22
47
www.tdk.com
10
www.murata.com
www.t-yuden.com
www.t-yuden.com
2.2
4.7
7F, No.9, Park Avenue II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878
Fax: 886-3-563-0879
WWW: http://www.aimtron.com.tw
Email: service@aimtron.com.tw
3/2/2006 REV:1.2
11
AT1367A/B/C/D
Preliminary Product Information
1MHz, 800mA Synchronous Buck Converter
With Power Good Detector & LDO
PC Board Layout
1. The most critical aspect of the layout is the placement of the input capacitor C2. It
must be placed as close as possible to the AT1367A/B/C/D to reduce the input
ripple voltage.
2. Power loops on the input and output of the converter should be laid out with the
shortest and widest traces possible. The longer and narrower the trace, the higher
resistance and inductance it will have. The length of traces in series with the
capacitors increases its ESR and ESL and reduces their effectiveness at high
frequency.
3. The OUT1 pin should connect to C1 directly. And the route should be away from
the noise source, such as inductor of SW line.
4. Grounding all components at the same point may effectively reduce the occurrence
of loop.
7F, No.9, Park Avenue II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878
Fax: 886-3-563-0879
WWW: http://www.aimtron.com.tw
Email: service@aimtron.com.tw
3/2/2006 REV:1.2
12
AT1367A/B/C/D
Preliminary Product Information
1MHz, 800mA Synchronous Buck Converter
With Power Good Detector & LDO
Package Outline : DFN10
7F, No.9, Park Avenue II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878
Fax: 886-3-563-0879
WWW: http://www.aimtron.com.tw
Email: service@aimtron.com.tw
3/2/2006 REV:1.2
13
AT1367A/B/C/D
Preliminary Product Information
1MHz, 800mA Synchronous Buck Converter
With Power Good Detector & LDO
Reflow Condition (IR/Convection or VPR Reflow)
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
3°C/second max.
Average ramp-up rate
3°C/second max.
(T to T )
L
P
Preheat
-Temperature Min(Tsmin)
-Temperature Max (Tsmax)
-Time (min to max)(ts)
100°C
150°C
150°C
200°C
60-120 seconds
60-180 seconds
Time maintained above:
-Temperature (T )
L
183°C
217°C
60-150 seconds
60-150 seconds
-Time (t )
L
Peak/Classification Temperature(T )
See table 1
10-30 seconds
See table 2
10 seconds max.
P
Time within 5°C of actual Peak
Temperature (t )
P
Ramp-down Rate
6°C/second max.
6 minutes max.
6°C/second max.
8 minutes max.
Time 25°C to Peak Temperature
*All temperatures refer to topside of the package, measured on the package body surface.
Classification Reflow Profiles(Cont.)
Table 1. SnPb Entectic Process –Package Peak Reflow Temperatures
Package Thickness
<2.5mm
Volume mm3<350
240+0/-5℃
Volume mm3≥350
225+0/-5℃
≥2.5mm
225+0/-5℃
225+0/-5℃
Table 2. Pb-free Process –Package Classification Reflow Temperatures
Package Thickness
<1.6mm
Volume mm3<350
260+0℃
Volume mm3 350-2000
260+0℃
Volume mm3>2000
260+0℃
245+0℃
245+0℃
1.6mm - 2.5mm
≥2.5mm
260+0℃
250+0℃
250+0℃
245+0℃
*Tolerance: The device manufacturer/supplier shall assure process compatibility up to and
including the stated classification temperature (this means Peak reflow temperature +0˚С. For
example 260˚С+0˚С) at the rated MSL level.
7F, No.9, Park Avenue II, Science-Based Industrial Park, Hsinchu 300,Taiwan, R.O.C.
Tel: 886-3-563-0878
Fax: 886-3-563-0879
WWW: http://www.aimtron.com.tw
Email: service@aimtron.com.tw
3/2/2006 REV:1.2
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