HCPL-7860-500 [AGILENT]
Optically Isolated Sigma-Delta Modulator; 光隔离式Σ-Δ调制器
| 型号： | HCPL-7860-500 |
| 厂家： | 
AGILENT TECHNOLOGIES, LTD. |
| 描述： | Optically Isolated Sigma-Delta Modulator |
| 文件： | 总18页 (文件大小：560K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Agilent HCPL-7860/HCPL-786J
Optically Isolated
Sigma-Delta (Σ−∆) Modulator
Data Sheet
In operation, the HCPL-7860/
HCPL-786J Isolated Modulator
Features
• 12-bit Linearity
(optocoupler with 3750 V
RMS
• 200 ns Conversion Time (Pre-
dielectric withstand voltage
rating) converts a low-
Trigger Mode 2 with HCPL-0872)
bandwidth analog input into a
high-speed one-bit data stream
by means of a Sigma-Delta (Σ−
∆) over-sampling modulator.
This modulation provides for
high noise margins and
excellent immunity against
isolation-mode transients. The
modulator data and on-chip
sampling clock are encoded
and transmitted across the
isolation boundary where they
are recovered and decoded
into separate high-speed clock
and data channels.
• 12-bit Effective Resolution with 5
µs Signal Delay (14-bit with 102
µs) (with HCPL-0872)
Description
• Fast 3 µs Over-Range Detection
(with HCPL-0872)
The HCPL-7860/HCPL-786J
Optically Isolated Modulator
and HCPL-0872 Digital
Interface IC or digital filter
together form an isolated
programmable two-chip
analog-to-digital converter. The
isolated modulator allows
direct measurement of motor
phase currents in power
inverters.
•
200 mꢀ Input Range with Single
5 ꢀ Supply
• 1% Internal Reference ꢀoltage
Matching
• Offset Calibration (with HCPL-
0872)
• -40°C to +85°C Operating
Temperature Range
• 15 kꢀ/µs Isolation Transient
Immunity
• Safety Approval: UL 1577, CSA
1
8
7
and IEC/EN/DIN EN 60747-5-2
SIGMA
DELTA
MOD./
ENCODE
2
Applications
HCPL-0872
or
Digital Filter
MCU
or
DSP
Input
Current
DECODE
• Motor Phase and Rail Current
3
4
6
5
Sensing
• Data Acquisition Systems
• Industrial Process Control
• Inverter Current Sensing
HCPL-7860
• General Purpose Current Sensing
and Monitoring
A 0.1 µF bypass capacitor must be connected between pins V and Ground
DD
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation, which may be induced by ESD.
SPI and QSPI are trademarks of Motorola Corp.
Microwire is a trademark of National Semiconductor Inc.
Pin Description
ISOLATION
BOUNDARY
ꢀDD1
ꢀIN+
ꢀIN-
NC
GND2
NC
1
2
3
4
5
6
7
8
16
15
14
ꢀDD1
ꢀDD2
1
2
3
4
8
7
6
5
ꢀDD2
SIGMA-
DELTA
13 MCLK
ꢀIN+
ꢀ IN-
MCLK
MDAT
GND2
SIGMA-
DECODER
MOD./
DELTA
MOD./
ENCODE
NC
NC
12
11
ENCODER
DECODE
NC
MDAT
NC
10 NC
GND2
GND1
SHIELD
GND1
9
HCPL-7860
Symbol Description
HCPL-786J
Symbol Description
VDD1
VIN+
Supply voltage input (4.5 V to 5.5 V)
Positive input ( 200 mV recommended)
VDD2
Supply voltage input (4.5 V to 5.5 V)
MCLK
MDAT
GND2
Clock output (10 MHz typical)
Serial data output
VIN-
Negative input (normally connected to GND1)
Input ground
GND1
Output ground
Ordering Information
Specify part number followed by option number (if desired).
Example:
HCPL-7860#XXXX
No option = Standard DIP package, 50 units per tube.
300 = Gull Wing Surface Mount Option, 50 units per tube.
500 = Tape and Reel Packaging Option, 1000 units per reel.
XXXE = Lead-Free Option
HCPL-786J#XXXX
No option = Standard DIP package, 45 units per tube.
500 = Tape and Reel Packaging Option, 850 units per reel.
XXXE = Lead-Free Option
Option data sheets available. Contact Agilent sales representative or authorized distributor.
Remarks: The notation “#” is used for existing products, while (new) products launched since 15th July 2001 and lead
free option will use “–”
2
Package Outline Drawings
8-pin DIP Package
9.80 0.25
(0.386 0.010)
8
1
7
6
5
4
REFERENCE ꢀOLTAGE
MATCHING SUFFIX*
TYPE NUMBER
A 7860X
YYWW
DATE CODE
2
3
PIN ONE
1.78 (0.070) MAX.
1.19 (0.047) MAX.
7.62 0.25
(0.300 0.010)
6.35 0.25
(0.250 0.010)
3.56 0.13
(0.140 0.005)
4.70 (0.185) MAX.
0.51 (0.020) MIN.
2.92 (0.115) MIN.
1.080 0.320
(0.043 0.013)
0.65 (0.025) MAX.
0.20 (0.008)
0.33 (0.013)
2.54 0.25
(0.100 0.010)
5˚ TYP.
DIMENSIONS IN MILLIMETERS AND (INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.5 mm (20mils) MAX.
NOTE: INITIAL OR CONTINUED ꢀARIATION IN THE COLOUR OF THE HCPL-7860/HCPL-786J’S WHITE MOLD COMPOUND IS
NORMAL AND DOES NOT AFFECT DEꢀICE PERFORMANCE OR RELIABILITY.
*ALL UNITS WITHIN EACH HCPL-7860 STANDARD PACKAGING INCREMENT (EITHER 50 PER TUBE OR 1000 PER REEL) HAꢀE
A COMMON MARKING SUFFIX TO REPRESENT AN ABSOLUTE REFERENCE ꢀOLTAGE TOLERANCE OF 1%. AN ABSOLUTE
REFERENCE ꢀOLTAGE TOLERANCE OF 4% IS GUARANTEED BETWEEN STANDARD PACKAGING INCREMENTS.
3
8-pin Gull Wing Surface Mount Option 300
LAND PATTERN RECOMMENDATION
1.016 (0.040)
9.80 0.25
(0.386 0.010)
6
5
8
1
7
6.350 0.25
(0.250 0.010)
10.9 (0.430)
2.0 (0.080)
2
3
4
1.27 (0.050)
9.65 0.25
(0.380 0.010)
1.780
(0.070)
MAX.
1.19
(0.047)
MAX.
7.62 0.25
(0.300 0.010)
0.20 (0.008)
0.33 (0.013)
3.56 0.13
(0.140 0.005)
1.080 0.320
(0.043 0.013)
0.635 0.25
(0.025 0.010)
12˚ NOM.
2.540
(0.100)
BSC
0.51 0.130
(0.020 0.005)
DIMENSIONS IN MILLIMETERS (INCHES).
TOLERANCES (UNLESS OTHERWISE SPECIFIED):
LEAD COPLANARITY
MAXIMUM: 0.102 (0.004)
xx.xx = 0.01
xx.xxx = 0.005
NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
16-Lead Surface Mount
LAND PATTERN RECOMMENDATION
0.64 (0.025)
0.457
(0.018)
1.270
(0.050)
16 15 14 13 12 11 10
9
TYPE NUMBER
DATE CODE
A 786J
YYWW
7.493 0.254
(0.295 0.010)
11.63 (0.458)
2.16 (0.085)
1
2
3
4
5
6
7
8
10.312 0.254
(0.406 0.10)
ALL LEADS
TO BE
COPLANAR
0.002
8.986 0.254
(0.345 0.010)
9˚
3.505 0.127
(0.138 0.005)
0-8˚
0.457
(0.018)
0.203 0.076
(0.008 0.003)
STANDOFF
0.025 MIN.
10.160 0.254
(0.408 0.010)
DIMENSIONS IN MILLIMETERS AND (INCHES).
NOTE: Initial and continued variation in the color of the HCPL-786J's white mold compound is normal
and does not affect device performance or reliability.
NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
4
Solder Reflow Temperature Profile
300
PREHEATING RATE 3˚C + 1˚C/-0.5˚C/SEC.
REFLOW HEATING RATE 2.5˚C 0.5˚C/SEC.
PEAK
TEMP.
245˚C
PEAK
TEMP.
240˚C
PEAK
TEMP.
230˚C
200
100
2.5˚C 0.5˚C/SEC.
SOLDERING
TIME
200˚C
30
160˚C
150˚C
140˚C
SEC.
30
SEC.
3˚C + 1˚C/-0.5˚C
PREHEATING TIME
150˚C, 90 + 30 SEC.
50 SEC.
TIGHT
TYPICAL
LOOSE
ROOM
TEMPERATURE
0
0
50
100
150
200
250
TIME (SECONDS)
Recommended Lead Free IR Profile
TIME WITHIN 5˚C of ACTUAL
PEAK TEMPERATURE
t
p
20-40 SEC.
260 +0/-5˚C
Tp
TL
217˚C
RAMP-UP
3˚C/SEC. MAX.
RAMP-DOWN
6˚C/SEC. MAX.
150 - 200˚C
Tsmax
Tsmin
ts
tL
60 to 150 SEC.
PREHEAT
60 to 180 SEC.
25
t 25˚C to PEAK
TIME (SECONDS)
NOTES:
THE TIME FROM 25˚C to PEAK TEMPERATURE = 8 MINUTES MAX.
Tsmax = 200˚C, Tsmin = 150˚C
Regulatory Information
The HCPL-7860/HCPL-786J has been approved by the following organizations:
IEC/EN/DIN EN 60747-5-2
Approved under:
IEC 60747-5-2:1997 + A1:2002
EN 60747-5-2:2001 + A1:2002
DIN EN 60747-5-2 (VDE 0884 Teil 2):2003-01.
UL
CSA
Approval under UL 1577,
component recognition program
up to V = 3750 V
Approval under CSA Component
Acceptance Notice #5, File CA
88324.
.
RMS
ISO
File E55361.
5
[1]
IEC/EN/DIN EN 60747-5-2 Insulation Characteristics
Description
Symbol
HCPL-7860/786J Unit
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 300 Vrms
for rated mains voltage ≤ 450 Vrms
I - IV
I - III
I - II
for rated mains voltage ≤ 600 Vrms
Climatic Classification
40/85/21
2
Pollution Degree (DIN VDE 0110/1.89)
Maximum Working Insulation Voltage
Input to Output Test Voltage, Method b[2]
VIORM x 1.875=VPR, 100% Production Test with
tm=1 sec, Partial discharge < 5 pC
VIORM
VPR
891
Vpeak
Vpeak
1670
Input to Output Test Voltage, Method a*
VIORM x 1.5=VPR, Type and Sample Test,
tm=60 sec,Partial discharge < 5 pC
VPR
1336
6000
Vpeak
Highest Allowable Overvoltage(Transient Overvoltage tini = 10 sec)
VIOTM
TS
Vpeak
Safety-limiting values - maximum values allowed in the event of a failure.
Case Temperature
Input Current[3]
Output Power[3]
175
400
600
>109
°C
mA
mW
IS,
INPUT
PS, OUTPUT
RS
Insulation Resistance at TS, VIO = 500 V
Ω
800
Notes:
PS (mW)
IS (mA)
1. Insulation characteristics are guaranteed only within the safety maximum ratings, which must be
ensured by protective circuits within the application. Surface Mount Classifications is Class A in
accordance with CECC00802.
2. Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog,
under Product Safety Regulations section, (IEC/EN/DIN EN 60747-5-2) for a detailed description
of Method a and Method b partial discharge test profiles.
700
600
500
400
300
3. Refer to the following figure for dependence of P and I on ambient temperature.
S
S
200
100
0
0
25 50 75 100 125 150 175 200
TS - CASE TEMPERATURE - oC
Insulation and Safety Related Specifications
Option 300 - surface mount classification is Class A in accordance with CECC 00802.
Parameter
Symbol DIP-8
SO-16
Units
Conditions
Minimum External Air Gap L(101)
(Clearance)
7.4
8.0
0.5
8.3
mm
Measured from input terminals to output
terminals, shortest distance through air.
Minimum External
Tracking (Creepage)
L(102)
CTI
8.3
0.5
mm
mm
Measured from input terminals to output
terminals, shortest distance path along body.
Minimum Internal Plastic
Gap (Internal Clearance)
Through insulation distance conductor to
conductor, usually the straight line distance
thickness between the emitter and detector.
Tracking Resistance
(Comparative Tracking
Index)
>175
IIIa
>175
IIIa
V
DIN IEC 112/VDE 0303 Part 1
Isolation Group
Material Group (DIN VDE 0110, 1/89, Table 1)
6
Absolute Maximum Ratings
Parameter
Symbol
Min.
-55
-40
0
Max.
125
Units
°C
°C
V
Note
Storage Temperature
TS
TA
Ambient Operating Temperature
Supply Voltages
85
V
DD1, VDD2
5.5
Steady-State Input Voltage
Two Second Transient Input Voltage
Output Voltages
VIN+, VIN-
-2.0
-6.0
-0.5
VDD1 + 0.5
V
1
2
MCLK, MDAT
VDD2 + 0.5
V
Lead Solder Temperature
Solder Reflow Temperature Profile
260°C for 10 sec., 1.6 mm below seating plane
See Maximum Solder Reflow Thermal Profile section
Recommended Operating Conditions
Parameter
Symbol
TA
Min.
-40
Max.
+85
Units
°C
Note
Ambient Operating Temperature
Supply Voltages
VDD1, VDD2
VIN+, VIN-
4.5
5.5
V
Input Voltage
-200
+200
mV
1
Electrical Specifications (DC)
Unless otherwise noted, all specifications are at V = 0 V and V = 0 V, all Typical specifications are at T = 25°C and
IN+
IN-
A
V
V
= V
= 5 V, and all Minimum and Maximum specifications apply over the following ranges: T = -40°C to +85°C,
DD1
DD1
D
D
2
A
= 4.5 to 5.5 V and V
= 4.5 to 5.5 V.
DD2
Parameter
Symbol Min.
Typ.
-0.8
450
60
Max.
Units
µA
Conditions
Fig. Note
Average Input Bias Current
Average Input Resistance
IIN
1
3
3
4
RIN
kΩ
Input DC Common-Mode
Rejection Ratio
CMRRIN
dB
Output Logic High Voltage
Output Logic Low Voltage
Output Short Circuit Current
VOH
VOL
3.9
8.2
4.9
0.1
30
V
IOUT = -100 µA
IOUT = 1.6 mA
0.6
V
|IOSC
|
mA
VOUT = VDD2
or GND2
5
6
Input Supply Current
Output Supply Current
Output Clock Frequency
Data Hold Time
IDD1
IDD2
fCLK
10
10
10
15
15
mA
mA
MHz
ns
VIN+ = -350 mV
to +350 mV
2
3
4
15
13.2
tHDDAT
7
3
Electrical Specifications (Tested with HCPL-0872 or Sinc Filter)
Unless otherwise noted, all specifications are at V = -200 mV to +200 mV and V = 0 V; all Typical specifications are
IN+
IN-
at T = 25°C and V
= V
= 5 V, and all Minimum and Maximum specifications apply over the following ranges: T = -
DD2 A
A
DD1
40°C to +85°C, V
= 4.5 to 5.5 V and V
= 4.5 to 5.5 V.
DD2
DD1
STATICCHARACTERISTICS
Parameter
Symbol
Min. Typ.
Max. Units
Conditions
Fig. Note
Resolution
15
bits
7
Integral Nonlinearity
INL
3
30
0.14
1
LSB
%
5
6
8
8
9
0.01
Differential Nonlinearity
Uncalibrated Input Offset
Offset Drift vs. Temperature
Offset drift vs. VDD1
DNL
LSB
mV
VOS
-3
0
3
VIN+ = 0 V
VIN+ = 0 V
VIN+ = 0 V
7
7
7
8
8
dVOS/dTA
dVOS/dVDD1
VREF
2
10
µV/°C
mV/V
mV
10
0.12
320
Internal Reference Voltage
Absolute Reference Voltage
Tolerance
-4
4
%
Reference Voltage
Matching
HCPL-7860
HCPL-786J
-1
-2
1
2
%
TA = 25°C.
See Note 11
8
%
VREF Drift vs. Temperature
VREF Drift vs. VDD1
dVREF/dTA
60
ppm/°C.
%
8
8
dVREF/dVDD1
0.2
Full Scale Input Range
-VREF
-200
+VREF mV
+200 mV
Recommended Input Voltage Range
DYNAMIC CHARACTERISTICS (Digital Interface IC HCPL-0872 is set to Conversion Mode 3.)
Parameter
Symbol Min.
Typ.
73
Max.
Units
dB
dB
dB
bits
µs
Conditions
Fig.
Note
Signal-to-Noise Ratio
Total Harmonic Distortion
SNR
THD
62
VIN+ = 35 Hz,
400 mVpk-pk
9,10
-67
66
(141 mVrms
)
Signal-to-(Noise + Distortion) SND
sine wave.
Effective Number of Bits
Conversion Time
ENOB
tC2
10
12
11
12
13
13
0.2
19
0.8
23
47
23
4.2
Pre-Trigger Mode 2 1,12
Pre-Trigger Mode 1 1,12
Pre-Trigger Mode 0 1,12
13
tC1
µs
tC0
39
µs
Signal Delay
tDSIG
tOVR1
tTHR1
19
µs
14
15
16
Over-Range Detect Time
2.0
3.0
10
µs
VIN+ = 0 to 400mV 14
step waveform
Threshold Detect Time
(default configuration)
µs
Signal Bandwidth
BW
18
15
22
20
kHz
15
17
18
Isolation Transient Immunity
CMR
kV/µs
VISO = 1 kV
8
Package Characteristics
Parameter
Symbol Min.
Typ.
Max.
Units
Conditions
Note
Input-Output Momentary
Withstand Voltage*
VISO
3750
Vrms
RH ≤ 50%, t = 1
min; TA = 25°C
19, 20
Input-Output Resistance
RI-O
1012
1011
1013
VI-O = 500 Vdc
TA = 100°C
f = 1 MHz
20
20
Ω
Input-Output Capacitance
CI-O
1.4
96
pF
Input IC Junction-to-Case
Thermal Resistance
°C/W
Thermocouple located at
center underside of package
θjci
Output IC Junction-to-Case
Thermal Resistance
114
°C/W
θjco
*The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-
output continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation
Characteristics Table (if applicable), your equipment level safety specification, or Agilent Application Note 1074,
“Optocoupler Input-Output Endurance Voltage.”
Notes:
1. If V (pin 3) is brought above V
per °C. Three standard deviation from
typical value is less than 6 µV/°C.
11. Beyond the full-scale input range the output
is either all zeroes or all ones.
independent of the selected Pre-Trigger
Mode and, therefore, conversion time.
15. The minimum and maximum overrange
detection time is determined by the
frequency of the channel 1 isolated
modulator clock.
16. The minimum and maximum threshold
detection time is determined by the user-
defined configuration of the adjustable
threshold detection circuit and the
frequency of the channel 1 isolated
modulator clock. See the Applications
Information section for further detail. The
specified times apply for the default
configuration.
17. The signal bandwidth is the frequency at
which the magnitude of the output signal
has decreased 3 dB below its low-frequency
value. The signal bandwidth is determined
by the frequency of the modulator clock and
the selected Conversion Mode.
18. The isolation transient immunity (also
known as Common-Mode Rejection)
specifies the minimum rate-of-rise of an
isolation-mode signal applied across the
isolation boundary beyond which the
modulator clock or data signals are
corrupted.
- 2 V
DD1
IN-
with respect to GND1 an internal optical-
coupling test mode may be activated. This
test mode is not intended for customer use.
2. Agilent recommends the use of non-
chlorinated solder fluxes.
3. Because of the switched-capacitor nature of
the isolated modulator, time averaged
values are shown.
12. The effective number of bits (or effective
resolution) is defined by the equation ENOB
= (SNR-1.76)/6.02 and represents the
resolution of an ideal, quantization-noise
limited A/D converter with the same SNR.
13. Conversion time is defined as the time from
when the convert start signal CS is brought
low to when SDAT goes high, indicating that
output data is ready to be clocked out. This
can be as small as a few cycles of the
isolated modulator clock and is determined
by the frequency of the isolated modulator
clock and the selected Conversion and Pre-
Trigger modes. For determining the true
signal delay characteristics of the A/D
converter for closed-loop phase margin
calculations, the signal delay specification
should be used.
14. Signal delay is defined as the effective delay
of the input signal through the Isolated A/D
converter. It can be measured by applying a
-200 mV to 200 mV step at the input of
modulator and adjusting the relative delay of
the convert start signal CS so that the
output of the converter is at mid scale. The
signal delay is the elapsed time from when
the step signal is applied at the input to
when output data is ready at the end of the
conversion cycle. The signal delay is the
most important specification for
4. CMRR is defined as the ratio of the gain
IN
for differential inputs applied between V
IN+
and V to the gain for common-mode
IN-
inputs applied to both V and V with
IN+
IN-
respect to input ground GND1.
5. Short-circuit current is the amount of output
current generated when either output is
shorted to V
or GND2. Use under these
DD2
conditions is not recommended.
6. Data hold time is amount of time that the
data output MDAT will stay stable following
the rising edge of output clock MCLK.
7. Resolution is defined as the total number of
output bits. The useable accuracy of any A/
D converter is a function of its linearity and
signal-to-noise ratio, rather than how many
total bits it has.
8. Integral nonlinearity is defined as one-half
the peak-to-peak deviation of the best-fit
19. In accordance with UL1577, for devices with
line through the transfer curve for V = -
minimum V specified at 3750 V , each
ISO rms
isolated modulator (optocoupler) is proof-
tested by applying an insulation test voltage
IN+
200 mV to +200 mV, expressed either as the
number of LSBs or as a percent of measured
input range (400 mV).
greater than 4500 V for one second
rms
9. Differential nonlinearity is defined as the
deviation of the actual difference from the
ideal difference between midpoints of
successive output codes, expressed in
LSBs.
(leakage current detection limit I < 5µA).
I-O
determining the true signal delay
This test is performed before the Method b,
100% production test for partial discharge
shown in IEC/EN/DIN EN 60747-5-2
InsulationCharacteristicsTable.
characteristics of the A/D converter and
should be used for determining phase
margins in closed-loop applications. The
signal delay is determined by the frequency
of the modulator clock and which
10. Data sheet value is the average magnitude
20. This is a two-terminal measurement: pins 1-
4 are shorted together and pins 5-8 are
shorted together.
of the difference in offset voltage from T
A
=25°C to T = 85°C, expressed in microvolts
Conversion Mode is selected, and is
A
9
1
10.5
9.4
9.2
9.0
8.8
8.6
8.4
8.2
8.0
-40 ˚C
25 ˚C
85 ˚C
0
-1
-2
-3
-4
-5
-6
-7
-8
-9
10.0
9.5
9.0
8.5
8.0
-40 ˚C
25 ˚C
85 ˚C
-6
-4
-2
.
0
2
6
-400
-200
0
200
400
4
-400
-200
0
200
400
ꢀIN - ꢀ
ꢀIN - mꢀ
ꢀIN - mꢀ
Figure 1. I vs. ꢀ
Figure 2. I
vs. ꢀ
.
Figure 3. I
vs. ꢀ .
DD2 IN
IN
IN
DD1
IN
7
0.02
0.018
0.016
0.014
0.012
0.01
10.0
ꢀDD1 = 4.5 ꢀ
ꢀDD1 = 5.0 ꢀ
ꢀDD1 = 5.5 ꢀ
ꢀDD1 = 4.5 ꢀ
ꢀDD1 = 5.0 ꢀ
ꢀDD1 = 5.5 ꢀ
ꢀDD1 = 4.5 ꢀ
ꢀDD1 = 5.0 ꢀ
ꢀDD1 = 5.5 ꢀ
9.8
9.6
9.4
9.2
9.0
6
5
4
3
0.008
0.006
8.8
8.6
2
-40
-15
10
35
60
85
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE - ˚C
TEMPERATURE - ˚C
TEMPERATURE - ˚C
Figure 5. INL (Bits) vs. Temperature
Figure 4. Clock Frequency vs. Temperature.
Figure 6. INL (%) vs. Temperature
68
150
100
50
0.8
ꢀDD1 = 4.5 ꢀ
ꢀDD1 = 5.0 ꢀ
ꢀDD1 = 5.5 ꢀ
67
66
65
64
0.6
0.4
0.2
0
0
-50
63
ꢀDD1 = 4.5 ꢀ
ꢀDD1 = 4.5 ꢀ
ꢀDD1 = 5.0 ꢀ
ꢀDD1 = 5.5 ꢀ
ꢀDD1 = 5.0 ꢀ
ꢀDD1 = 5.5 ꢀ
-100
-150
-0.2
-0.4
62
61
-40
-15
TEMPERATURE - ˚C
Figure 9. SNR vs. Temperature
10
35
60
85
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE - ˚C
TEMPERATURE - ˚C
Figure 7. Offset Change vs. Temperature
Figure 8. ꢀ Change vs. Temperature
REF
10
200
180
160
140
120
100
80
14
80
PRE-TRIGGER
MODE 0
75
70
65
60
55
13
12
11
10
PRE-TRIGGER
MODE 1
PRE-TRIGGER
MODE 2
60
40
9
8
50
45
20
0
1
2
3
4
5
1
2
3
4
5
1
2
3
5
4
CONꢀERSION MODE #
CONꢀERSION MODE #
CONꢀERSION MODE #
Figure 10. SNR vs. Conversion Mode.
Figure 11. Effective Resolution vs. Conversion
Mode.
Figure 12. Conversion Time vs. Conversion
Mode.
100
90
80
70
60
50
40
30
100
90
80
70
60
50
40
30
ꢀ
(200 mꢀ/DIꢀ.)
IN+
OꢀR1 (200 mꢀ/DIꢀ.)
THR1
(2 ꢀ/DIꢀ.)
20
10
0
20
10
0
4
5
1
2
3
1
2
3
4
5
2 µs/DIꢀ.
CONꢀERSION MODE #
CONꢀERSION MODE #
Figure 13. Signal Delay vs. Conversion Mode.
Figure 14. Over-Range and Threshold Detect
Times.
Figure 15. Signal Bandwidth vs. Conversion
Mode.
11
Applications Information
Digital Current Sensing
Even better performance can
be achieved by fully utilizing
the more advanced features of
the Isolated A/D converter,
such as the pre-trigger circuit,
which can reduce conversion
time to less than 1 µs, the fast
over-range detector for quickly
detecting short circuits,
different conversion modes
giving various resolution/speed
trade-offs, offset calibration
mode to eliminate initial offset
from measurements, and an
adjustable threshold detector
for detecting non-short circuit
overload conditions.
As shown in Figure 16, using
the Isolated 2-chip A/D
converter to sense current can
be as simple as connecting a
current-sensing resistor, or
shunt, to the input and
reading output data through
the 3-wire serial output
interface. By choosing the
appropriate shunt resistance,
any range of current can be
monitored, from less than 1 A
to more than 100 A.
NON-ISOLATED
+ 5 ꢀ
ISOLATED
+ 5 ꢀ
CCLK
ꢀDD
CHAN
SCLK
SDAT
CS
CLAT
+
ꢀDD1
ꢀIN+
ꢀIN-
ꢀDD2
MCLK
MDAT
CDAT
INPUT
CURRENT
3-WIRE
SERIAL
INTERFACE
MCLK1
MDAT1
MCLK2
MDAT2
GND
R SHUNT
0.02
C1
0.1 µF
C2
0.1 µF
+
THR1
OꢀR1
RESET
GND1
GND2
C3
10 µF
HCPL-7860/
HCPL-786J
HCPL-0872
Figure 16. Typical Application Circuit.
12
Product Description
filter. The primary functions of
the HCPL-0872 Digital
control of the effective
sampling time or reduce
The HCPL-7860/HCPL-786J
Isolated Modulator
Interface IC are to derive a
multi-bit output signal by
averaging the single-bit
modulator data, as well as to
provide a direct
conversion time to less than 1
ìs, a fast over-range detection
circuit that rapidly indicates
when the magnitude of the
input signal is beyond full-
scale, an adjustable threshold
detection circuit that indicates
when the magnitude of the
input signal is above a user
adjustable threshold level, an
offset calibration circuit, and a
second multiplexed input that
allows a second Isolated
(optocoupler) uses sigma-delta
modulation to convert an
analog input signal into a
high-speed (10 MHz) single-bit
digital data stream; the time
average of the modulator’s
single-bit data is directly
proportional to the input
signal. The isolated
microcontroller interface. The
effective resolution of the
multi-bit output signal is a
function of the length of time
(measured in modulator clock
cycles) over which the average
is taken; averaging over longer
periods of time results in
higher resolution. The Digital
Interface IC can be configured
for five conversion modes,
which have different
combinations of speed and
resolution to achieve the
desired level of performance.
Other functions of the HCPL-
0872 Digital Interface IC
modulator’s other main
function is to provide galvanic
isolation between the analog
input and the digital output.
An internal voltage reference
determines the full-scale
analog input range of the
modulator (approximately
320 mV); an input range of
200 mV is recommended to
achieve optimal performance.
Modulator to be used with a
single Digital Interface IC.
The digital output format of
the Isolated A/D Converter is
15 bits of unsigned binary
data. The input full-scale range
and code assignment is shown
in Table 1 below. Although the
output contains 15 bits of
data, the effective resolution is
lower and is determined by
selected conversion mode as
shown in Table 2 below.
HCPL-7860/HCPL-786J can be
used together with HCPL-0872,
Digital Interface IC or a digital
include a Phase Locked Loop
based pre-trigger circuit that
can either give more precise
Table 1. Input Full-Scale Range and Code Assignment.
Analog Input
Full Scale Range
Minimum Step Size
+Full Scale
ꢀoltage Input
640 mV
20 µV
Digital Output
32768 LSBs
1 LSB
+320 mV
0 mV
111111111111111
100000000000000
000000000000000
Zero
-Full Scale
-320 mV
Table 2. Isolated A/D Converter Typical Performance Characteristics.
Conversion Time (µs)
Signal-to-
Noise Ratio Resolution
Effective
Signal
Bandwidth
(kHz)
Pre-Trigger Mode
Signal
Delay(µs)
Conversion Mode
(dB)
83
(bits)
13.5
12.8
11.9
10.7
8.5
0
1
102
51
19
10
5
2
1
2
3
4
5
205
103
39
102
51
19
10
5
3.4
6.9
22
45
90
79
73
0.2
66
20
53
10
Notes: Bold italic type indicates Default values.
13
Power Supplies and Bypassing
The power supply for the
isolated modulator is most
often obtained from the same
supply used to power the
power transistor gate drive
circuit. If a dedicated supply
is required, in many cases it is
possible to add an additional
winding on an existing
transformer. Otherwise, some
sort of simple isolated supply
can be used, such as a line
powered transformer or a
high-frequency DC-DC
The recommended application
circuit is shown in Figure 17.
A floating power supply
(which in many applications
could be the same supply that
is used to drive the high-side
power transistor) is regulated
to 5 V using a simple zener
diode (D1); the value of
resistor R1 should be chosen
to supply sufficient current
from the existing floating
supply. The voltage from the
current sensing resistor or
shunt (Rsense) is applied to
the input of the HCPL-7860/
HCPL-786J (U2) through an
RC anti-aliasing filter (R2 and
C2). And finally, the output
clock and data of the isolated
modulator are connected to
the digital interface IC.
As shown in Figure 17, 0.1 µF
bypass capacitors (C1 and C3)
should be located as close as
possible to the input and
output power-supply pins of
the isolated modulator (U2).
The bypass capacitors are
required because of the high-
speed digital nature of the
signals inside the isolated
modulator. A 0.01 µF bypass
capacitor (C2) is also
recommended at the input due
to the switched-capacitor
nature of the input circuit. The
input bypass capacitor also
forms part of the anti-aliasing
filter, which is recommended
to prevent high-frequency
noise from aliasing down to
lower frequencies and
converter.
An inexpensive 78L05 three-
terminal regulator can also be
used to reduce the floating
supply voltage to 5 V. To help
attenuate high-frequency
power supply noise or ripple,
a resistor or inductor can be
used in series with the input
of the regulator to form a low-
pass filter with the regulator’s
input bypass capacitor.
interfering with the input
signal.
Although the application
circuit is relatively simple, a
few recommendations should
be followed to ensure optimal
performance.
FLOATING
POSITIꢀE
SUPPLY
+ 5 ꢀ
Hꢀ+
GATE DRIꢀE
CIRCUIT
R1
CCLK
ꢀDD
CHAN
SCLK
SDAT
CS
C1
D1
5.1 ꢀ
CLAT
0.1 µF
ꢀDD1
ꢀIN+
ꢀIN-
ꢀDD2
MCLK
MDAT
CDAT
R2 39 Ω
MCLK1
MDAT1
MCLK2
MDAT2
GND
MOTOR
+
-
THR1
OꢀR1
RESET
C3
0.1 µF
GND1
GND2
C2
0.01 µF
RSENSE
HCPL-7860/
HCPL-786J
TO
CONTROL
CIRCUIT
HCPL-0872
Hꢀ-
Figure 17. Recommended Application Circuit.
14
PC Board Layout
selecting a shunt is
determining how much current dissipation in the shunt can
the shunt will be sensing. The
graph in Figure 18 shows the
RMS current in each phase of
a three-phase induction motor
The maximum average power
The design of the printed
circuit board (PCB) should
follow good layout practices,
such as keeping bypass
capacitors close to the supply
pins, keeping output signals
away from input signals, the
use of ground and power
planes, etc. In addition, the
layout of the PCB can also
affect the isolation transient
immunity (CMR) of the
also be easily calculated by
multiplying the shunt
resistance times the square of
the maximum RMS current,
as a function of average motor which is about 1 W in the
output power (in horsepower,
hp) and motor drive supply
voltage. The maximum value of
the shunt is determined by the
current being measured and
the maximum recommended
input voltage of the isolated
modulator. The maximum
shunt resistance can be
previous example.
If the power dissipation in the
shunt is too high, the
resistance of the shunt can be
decreased below the maximum
value to decrease power
isolated modulator, due
primarily to stray capacitive
coupling between the input
and the output circuits. To
obtain optimal CMR
performance, the layout of the
PC board should minimize any
stray coupling by maintaining
the maximum possible distance
between the input and output
sides of the circuit and
ensuring that any ground or
power plane on the PC board
does not pass directly below
or extend much wider than the
body of the isolated modulator.
dissipation. The minimum
value of the shunt is limited
by precision and accuracy
requirements of the design. As
the shunt value is reduced, the
output voltage across the
shunt is also reduced, which
means that the offset and
noise, which are fixed, become
a larger percentage of the
signal amplitude. The selected
value of the shunt will fall
somewhere between the
calculated by taking the
maximum recommended input
voltage and dividing by the
peak current that the shunt
should see during normal
operation. For example, if a
motor will have a maximum
RMS current of 10 A and can
experience up to 50%
overloads during normal
operation, then the peak
minimum and maximum
current is 21.1 A (= 10 x 1.414
x 1.5). Assuming a maximum
input voltage of 200 mV, the
maximum value of shunt
resistance in this case would
be about 10 mΩ.
values, depending on the
particular requirements of a
specific design.
Shunt Resistors
The current-sensing shunt
resistor should have low
resistance (to minimize power
dissipation), low inductance
(to minimize di/dt induced
voltage spikes which could
adversely affect operation),
and reasonable tolerance (to
maintain overall circuit
When sensing currents large
enough to cause significant
heating of the shunt, the
temperature coefficient
(tempco) of the shunt can
introduce nonlinearity due to
the signal dependent
temperature rise of the shunt.
The effect increases as the
shunt-to-ambient thermal
resistance increases. This effect
can be minimized either by
reducing the thermal resistance
of the shunt or by using a
shunt with a lower tempco.
Lowering the thermal
resistance can be accomplished
by repositioning the shunt on
the PC board, by using larger
PC board traces to carry away
more heat, or by using a heat
sink.
40
440
35
30
25
20
15
380
220
120
accuracy). Choosing a
particular value for the shunt
is usually a compromise
10
5
between minimizing power
dissipation and maximizing
accuracy. Smaller shunt
resistances decrease power
dissipation, while larger shunt
resistances can improve circuit
accuracy by utilizing the full
input range of the isolated
modulator. The first step in
0
0
5
10
15
20
25
30 35
MOTOR PHASE CURRENT - A (rms)
Figure 18. Motor Output Horsepower vs. Motor
Phase Current and Supply ꢀoltage.
15
while the other two terminals
are used to carry the load
current. Because of the Kelvin
connection, any voltage drops
across the leads carrying the
load current should have no
impact on the measured
voltage.
the isolated modulator; this
minimizes the loop area of the
connection and reduces the
possibility of stray magnetic
fields from interfering with the
measured signal. If the shunt
is not located on the same PC
board as the isolated
For a two-terminal shunt, as
the value of shunt resistance
decreases, the resistance of the
leads becomes a significant
percentage of the total shunt
resistance. This has two
primary effects on shunt
accuracy. First, the effective
resistance of the shunt can
become dependent on factors
such as how long the leads
are, how they are bent, how
far they are inserted into the
board, and how far solder
wicks up the lead during
assembly (these issues will be
discussed in more detail
shortly). Second, the leads are
typically made from a material
such as copper, which has a
much higher tempco than the
material from which the
modulator circuit, a tightly
twisted pair of wires can
accomplish the same thing.
Several four-terminal shunts
from Isotek (Isabellenhütte)
suitable for sensing currents in
motor drives up to 71 Arms
(71 hp or 53 kW) are shown
in Table 3; the maximum
current and motor power
range for each of the PBV
series shunts are indicated.
For shunt resistances from 50
mΩ down to 10 mΩ, the
Also, multiple layers of the PC
board can be used to increase
current carrying capacity.
Numerous plated-through vias
should surround each non-
Kelvin terminal of the shunt to
help distribute the current
between the layers of the PC
maximum current is limited by board. The PC board should
the input voltage range of the
isolated modulator. For the 5
mΩ and 2 mΩ shunts, a heat
sink may be required due to
the increased power
use 2 or 4 oz. copper for the
layers, resulting in a current
carrying capacity in excess of
20 A. Making the current
carrying traces on the PC
board fairly large can also
improve the shunt’s power
dissipation capability by acting
as a heat sink. Liberal use of
vias where the load current
enters and exits the PC board
is also recommended.
resistive element itself is
made, resulting in a higher
tempco for the shunt overall.
Both of these effects are
eliminated when a four-
terminal shunt is used. A four-
terminal shunt has two
additional terminals that are
Kelvin-connected directly
across the resistive element
itself; these two terminals are
used to monitor the voltage
across the resistive element
dissipation at higher currents.
When laying out a PC board
for the shunts, a couple of
points should be kept in mind.
The Kelvin connections to the
shunt should be brought
together under the body of the
shunt and then run very close
to each other to the input of
Table 3. Isotek (Isabellenhütte) Four-Terminal Shunt Summary.
Maximum RMS
Current
Motor Power Range
120 ꢀac-440 ꢀac
Shunt Resistance
Tol.
%
Shunt Resistor
Part Number
mΩ
50
20
10
5
A
3
hp
0.8 - 3
kW
0.6 - 2
PBV-R050-0.5
PBV-R020-0.5
PBV-R010-0.5
PBV-R005-0.5
PBV-R002-0.5
0.5
0.5
0.5
0.5
0.5
7
2 - 7
0.6 - 2
14
4 - 14
3 - 10
25 [28]
39 [71]
7 - 25 [8 - 28]
5 - 19 [6 - 21]
2
11 - 39 [19 - 71] 8 - 29 [14 - 53]
Note: Values in brackets are with a heatsink for the shunt.
16
Shunt Connections
In some applications, however,
supply currents flowing
through the power-supply
return path may cause offset
or noise problems. In this
case, better performance may
The 39 Ω resistor in series
with the input lead (R2) forms
a lowpass anti-aliasing filter
with the 0.01 µF input bypass
capacitor (C2) with a 400 kHz
bandwidth. The resistor
performs another important
function as well; it dampens
any ringing which might be
present in the circuit formed
by the shunt, the input bypass
capacitor, and the inductance
of wires or traces connecting
the two. Undamped ringing of
The recommended method for
connecting the isolated
modulator to the shunt resistor
is shown in Figure 17. V
IN+
(pin 2 of the HPCL-7860/
HCPL-786J) is connected to
the positive terminal of the
be obtained by connecting V
IN+
and V
directly across the
shunt resistor, while V
(pin
IN-
IN-
shunt resistor with two
3) is shorted to GND1 with the
power-supply return path
functioning as the sense line
to the negative terminal of the
current shunt. This allows a
single pair of wires or PC
board traces to connect the
isolated modulator circuit to
the shunt resistor. By
referencing the input circuit to
the negative side of the sense
resistor, any load current
induced noise transients on
the shunt are seen as a
common-mode signal and will
not interfere with the current-
sense signal. This is important
because the large load currents
flowing through the motor
drive, along with the parasitic
inductances inherent in the
wiring of the circuit, can
generate both noise spikes and
offsets that are relatively large
compared to the small voltages
that are being measured across
the current shunt.
conductors, and connecting
GND1 to the shunt resistor
with a third conductor for the
power-supply return path, as
shown in Figure 19. When
connected this way, both input the input circuit near the
pins should be bypassed. To
minimize electromagnetic
interference of the sense
signal, all of the conductors
(whether two or three are
used) connecting the isolated
modulator to the sense resistor
should be either twisted pair
wire or closely spaced traces
on a PC board.
input sampling frequency can
alias into the baseband
producing what might appear
to be noise at the output of
the device.
FLOATING
POSITIꢀE
SUPPLY
Hꢀ+
GATE DRIꢀE
CIRCUIT
R1
D1
5.1 ꢀ
C1
0.1 µF
If the same power supply is
used both for the gate drive
circuit and for the current
sensing circuit, it is very
important that the connection
from GND1 of the isolated
modulator to the sense resistor
be the only return path for
supply current to the gate
drive power supply in order to
eliminate potential ground loop
problems. The only direct
connection between the
R2a 39 Ω
ꢀDD1
ꢀIN+
ꢀIN-
ꢀDD2
R2b 39 Ω
MCLK
MDAT
MOTOR
+
-
GND1 GND2
C2a
C2b
RSENSE
HCPL-7860/
HCPL-786J
0.01 µF
0.01 µF
Hꢀ-
Figure 19. Schematic for Three Conductor Shunt Connection.
isolated modulator circuit and
the gate drive circuit should
be the positive power supply
line.
17
ꢀoltage Sensing
resistance (280 kΩ) and input
bias current (1 µA) do not
affect the accuracy of the
resistance and the input
bypass capacitor may limit the
achievable bandwidth. To
The HCPL-7860/HCPL-786J
Isolated Modulator can also be
used to isolate signals with
amplitudes larger than its
recommended input range with
the use of a resistive voltage
divider at its input. The only
restrictions are that the
measurement. An input bypass obtain higher bandwidth, the
capacitor is still required,
although the 39 Ω series
damping resistor is not (the
resistance of the voltage
divider provides the same
function). The low-pass filter
formed by the divider
input bypass capacitor (C2)
can be reduced, but it should
not be reduced much below
1000 pF to maintain adequate
input bypassing of the isolated
modulator.
impedance of the divider be
relatively small (less than 1
kΩ) so that the input
www.agilent.com/
semiconductors
For product information and a complete list
of distributors, please go to our web site.
For technical assistance call:
Americas/Canada: +1 (800) 235-0312
or (408) 654-8675
Europe: +49 (0) 6441 92460
China: 10800 650 0017
Hong Kong: (+65) 6756 2394
India, Australia, New Zealand: (+65) 6755 1939
Japan: (+81 3) 3335-8152(Domestic/Inter-
national), or 0120-61-1280(Domestic Only)
Korea: (+65) 6755 1989
Singapore, Malaysia, Vietnam, Thailand,
Philippines, Indonesia: (+65) 6755 2044
Taiwan: (+65) 6755 1843
Data subject to change.
Copyright © 2004 Agilent Technologies, Inc.
Obsolete5989-1485EN
December 21, 2004
5989-2166EN
相关型号：
HCPL-786J
The HCPL-7860/HCPL-786J Optically Isolated Modulator and HCPL-0872 Digital Interface IC or digital filter together form an isolated programmable two-chip analog-to-digital converter.
AVAGO
HCPL-786J-E
ADC, Delta-Sigma, 15-Bit, 1 Func, 1 Channel, Serial Access, PDSO16, LEAD FREE, SMT, 16 PIN
AGILENT
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