5962-8947702KYA [AGILENT]

AC/DC to Logic Interface Hermetically Sealed Optocouplers; AC / DC到逻辑接口密封式光电耦合器
5962-8947702KYA
型号: 5962-8947702KYA
厂家: AGILENT TECHNOLOGIES, LTD.    AGILENT TECHNOLOGIES, LTD.
描述:

AC/DC to Logic Interface Hermetically Sealed Optocouplers
AC / DC到逻辑接口密封式光电耦合器

光电 输出元件
文件: 总11页 (文件大小:163K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AC/DC to Logic Interface  
Hermetically Sealed  
Optocouplers  
Technical Data  
HCPL-576X*  
5962-8947701  
*See matrix for available extensions  
Features  
Applications  
• Military and Space  
• High Reliability Systems  
• Transportation, Medical,  
and Life Critical Systems  
• Limit Switch Sensing  
• Low Voltage Detector  
• ac/dc Voltage Sensing  
• Relay Contact Monitor  
• Relay Coil Voltage Monitor  
• Current Sensing  
• Microprocessor Interface  
• Telephone Ring Detection  
• Harsh Industrial  
Environments  
Description  
• Dual Marked with Device  
Part Number and DSCC  
Standard Microcircuit  
Drawing  
• Manufactured and Tested  
on a MIL-PRF-38534  
Certified Line  
• QML-38534, Class H and K  
• Hermetically Sealed 8-pin  
Dual In-Line Packages  
• Performance Guaranteed  
over -55°C to +125°C  
• ac or dc Input  
• Programmable Sense Voltage  
• Hysteresis  
These devices are single channel,  
hermetically sealed, voltage/  
current threshold detection  
optocouplers. The products are  
capable of operation and storage  
over the full military temperature  
range and can be purchased as  
either standard product, or with  
full MIL-PRF-38534 Class Level  
H or K testing, or from the DSCC  
Standard Microcircuit Drawing  
(SMD) 5962-89477. All devices  
are manufactured and tested on  
a MIL-PRF-38534 certified line  
and are included in the DSCC  
Qualified Manufacturers List,  
QML-38534 for Hybrid  
• HCPL-3700 Operating  
Compatibility  
Schematic  
Microcircuits.  
• Logic Compatible Output  
• 1500 Vdc Withstand Test  
Voltage  
• Thresholds Guaranteed over  
Temperature  
• Thresholds Independent of  
LED Characteristics  
HCPL-5760/1/K  
The connection of a 0.1 µF bypass capacitor between pins 8 and 5 is recommended.  
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to  
prevent damage and/or degradation which may be induced by ESD.  
2
Each unit contains a light emit-  
ting diode (LED), a threshold  
sensing input buffer IC, and a  
high gain photon detector to  
provide an optocoupler which  
permits adjustable external  
threshold levels. The input buffer  
circuit has a nominal turn on  
threshold of 2.5 mA (ITH+) and  
3.6 volts (VTH+). The addition of  
one or more external attenuation  
resistors permits the use of this  
device over a wide range of input  
voltages and currents. Threshold  
sensing prior to the LED and  
detector elements minimizes  
effects of any variation in optical  
coupling. Hysteresis is also  
provided in the buffer for extra  
noise immunity and switching  
stability.  
input boards and other applica-  
tions where a predetermined  
input threshold optocoupler level  
is desirable.  
The buffer circuit is designed  
with internal clamping diodes to  
protect the circuitry and LED  
from a wide range of over-voltage  
and over-current transients while  
the diode bridge enables easy use  
with ac voltage input.  
The high gain output stage  
features an open collector output  
providing both TTL compatible  
saturation voltages and CMOS  
compatible breakdown voltages.  
This is an eight pin DIP which  
may be purchased with a variety  
of lead bend and plating options.  
See Selection Guide Table for  
details. Standard Microcircuit  
Drawing (SMD) parts are  
These units combine several  
unique functions in a single  
package, providing the user with  
an ideal component for computer  
available for each lead style.  
Selection GuidePackage Styles and Lead  
Configuration Options  
Agilent Part # and Options  
Commercial  
HCPL-5760  
HCPL-5761  
HCPL-576K  
Gold  
Option #200  
Option #100  
Option #300  
Option #600  
MIL-PRF-38534 Class H  
MIL-PRF-38534 Class K  
Standard Lead Finish  
Solder Dipped  
Butt Joint/Gold Plate  
Gull Wing/Soldered  
Crew Cut/Gold Plate  
Class H SMD Part #  
Prescript for all below  
Either Gold or Soldered  
Gold Plate  
5962-  
8947701PX  
8947701PC  
8947701PA  
8947701YC  
8947701YA  
8947701XA  
Available  
Solder Dipped  
Butt Joint/Gold Plate  
Butt Joint/Soldered  
Gull Wing/Soldered  
Crew Cut/Gold Plate  
Crew Cut/Soldered  
Class K SMD Part #  
Prescript for all below  
Either Gold or Soldered  
Gold Plate  
Available  
5962-  
8947702KPX  
8947702KPC  
8947702KPA  
8947702KYC  
8947702KYA  
8947702KXA  
Available  
Solder Dipped  
Butt Joint/Gold Plate  
Butt Joint/Soldered  
Gull Wing/Soldered  
Crew Cut/Gold Plate  
Crew Cut/Soldered  
Available  
3
Absolute Maximum Ratings  
Storage Temperature Range....................................... -65°C to +150°C  
Operating Temperature.................................................. -55°C to 125°C  
Lead Solder Temperature ............................................. 260°C for 10 s[2]  
Average Input Current, IIN ........................................................ 15 mA[3]  
Surge Input Current, IIN,SG ................................................... 140 mA[3,4]  
Peak Transient Input Current, IIN,PK ..................................... 500 mA[3,4]  
Input Power Dissipation, PIN ................................................. 195 mW[5]  
Total Package Power Dissipation, Pd .........................................260 mW  
Output Power Dissipation, PO .....................................................65 mW  
Average Output Current, IO .......................................................... 40 mA  
Supply Voltage,VCC (Pins 8-5) .............................. -0.5 min., 20 V max.  
Output Voltage, VO (Pins 6-5) ................................ -0.5 min., 20 V max.  
ESD Classification  
(MIL-STD-883, Method 3015) ........................................... (), Class 2  
Recommended Operating Conditions  
Parameter  
Symbol  
Min.  
3.0  
0
Max.  
18  
Units  
V
Power Supply  
VCC  
f
Operating Frequency[1]  
10  
KHz  
Outline Drawing  
8 Pin DIP Through Hole  
9.40 (0.370)  
9.91 (0.390)  
8.13 (0.320)  
MAX.  
0.76 (0.030)  
1.27 (0.050)  
7.16 (0.282)  
7.57 (0.298)  
4.32 (0.170)  
MAX.  
0.51 (0.020)  
MIN.  
3.81 (0.150)  
0.20 (0.008)  
0.33 (0.013)  
MIN.  
7.36 (0.290)  
7.87 (0.310)  
2.29 (0.090)  
2.79 (0.110)  
0.51 (0.020)  
MAX.  
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).  
Device Marking  
Agilent DESIGNATOR  
Agilent P/N  
A QYYWWZ  
COMPLIANCE INDICATOR,*  
DATE CODE, SUFFIX (IF NEEDED)  
XXXXXX  
XXXXXXX  
XXX XXX  
50434  
DSCC SMD*  
DSCC SMD*  
PIN ONE/  
COUNTRY OF MFR.  
Agilent CAGE CODE*  
ESD IDENT  
* QUALIFIED PARTS ONLY  
4
Hermetic Optocoupler Options  
Option  
Description  
100  
Surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. This option  
is available on commercial and hi-rel product.  
4.32 (0.170)  
MAX.  
0.51 (0.020)  
MIN.  
1.14 (0.045)  
1.40 (0.055)  
0.20 (0.008)  
0.33 (0.013)  
2.29 (0.090)  
2.79 (0.110)  
0.51 (0.020)  
MAX.  
7.36 (0.290)  
7.87 (0.310)  
200  
300  
Lead finish is solder dipped rather than gold plated. This option is available on commercial and  
hi-rel product. DSCC Drawing part numbers contain provisions for lead finish.  
Surface mountable hermetic optocoupler with leads cut and bent for gull wing assembly. This  
option is available on commercial and hi-rel product. This option has solder dipped leads.  
4.57 (0.180)  
MAX.  
4.57 (0.180)  
MAX.  
0.20 (0.008)  
0.33 (0.013)  
0.51 (0.020)  
MIN.  
5° MAX.  
1.40 (0.055)  
1.65 (0.065)  
9.65 (0.380)  
9.91 (0.390)  
2.29 (0.090)  
2.79 (0.110)  
0.51 (0.020)  
MAX.  
600  
Surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. This option  
is available on commercial and hi-rel product. Contact factory for the availability of this option  
on DSCC part types.  
3.81 (0.150)  
MAX.  
0.20 (0.008)  
0.33 (0.013)  
0.51 (0.020)  
MIN.  
2.29 (0.090)  
2.79 (0.110)  
1.02 (0.040)  
TYP.  
7.36 (0.290)  
7.87 (0.310)  
Note: Dimensions in millimeters (inches).  
5
Electrical Characteristics TA = -55°C to 125°C, unless otherwise specified. See note 16.  
Group A  
Subgroup  
Parameter  
Symbol  
Conditions  
Min.  
Typ.* Max. Units Fig. Note  
ITH+  
VIN = VTH+; VCC = 4.5 V;  
VO = 0.4 V; IO 2.6 mA  
1, 2, 3  
1.75  
2.5  
3.20  
mA  
Input Threshold  
Current  
ITH-  
VIN = VTH-; VCC = 4.5 V;  
VO = 2.4 V; IOH 250 µA  
1, 2, 3  
1, 2, 3  
0.93  
3.18  
1.3  
1.62  
mA  
V
IN = V2 V3; Pins 1  
& 4 Open  
CC = 4.5 V; VO = 0.4 V;  
IO 2.6 mA  
VTH+  
3.6  
2.5  
5.0  
4.10  
3.00  
5.62  
V
V
V
7
V
dc  
(Pins 2, 3)  
V
IN = V2 V3; Pins 1  
VTH-  
& 4 Open  
1, 2, 3  
1, 2, 3  
1.90  
3.79  
1, 2  
VCC = 4.5 V; VO = 2.4 V;  
IO 250 µA  
Input  
Threshold  
Voltage  
VIN = |V1 V4|; Pins  
2 & 3 Open  
VTH+  
VCC = 4.5 V; VO = 0.4 V;  
IO 2.6 mA  
ac  
(Pins 1, 4)  
7, 8  
V
IN = |V1 V4|; Pins 2  
& 3 Open  
CC = 4.5 V; VO = 2.4 V;  
IO 250 µA  
VTH-  
VIHC1  
VIHC2  
1, 2, 3  
1, 2, 3  
2.57  
5.3  
3.7  
5.9  
4.52  
7.5  
V
V
V
V
IHC1 = V2 V3;  
V3 = GND;  
IIN = 10 mA; Pin 1 & 4  
Connected to Pin 3  
VIHC2 = |V1 V4|;  
|IIN| = 10 mA;  
Pins 2 & 3 Open  
Input Clamp Voltage  
1, 2, 3  
1, 2, 3  
6.0  
6.6  
8.0  
V
V
3
15  
VIHC3 = V2 V3;  
V3 = GND;  
12.0  
14.0  
VIHC3  
IIN  
VOL  
IOH  
ICCL  
ICCH  
IIN = 13.5 mA;  
Pins 1 & 4 Open  
Input Current  
VIN = V2 V3 = 5.0 V;  
Pins 1 & 4 Open  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
3.0  
3.9  
4.5  
0.4  
250  
3.0  
20  
mA  
V
4
4
Logic Low  
Output Voltage  
VCC = 4.5 V;  
IOL = 2.6 mA  
0.05  
Logic High  
Output Current  
VOH = VCC = 18 V  
µA  
mA  
µA  
7
Logic Low  
Supply Current  
V2 V3 = 5.0 V;  
VO = Open; VCC = 18 V  
0.8  
Logic High  
Supply Current  
VCC = 18 V; VO = Open  
0.001  
5
45% RH, t = 5 s;  
VI-O = 1500 Vdc;  
TA = 25°C  
Input-Output  
Insulation  
II-O  
1
1
µA  
9, 10  
6
Electrical Characteristics TA = -55°C to 125°C, VCC = 5.0 V, unless otherwise specified (continued).  
Group A  
Subgroup  
Parameter  
Symbol  
Conditions  
Min.  
Typ.* Max. Units Fig. Note  
Propagation Delay  
Time to Logic Low  
Output Level  
tPHL  
RL =1.8 k, CL = 15 pF  
9, 10, 11  
4
8
20  
40  
µs  
µs  
6, 11  
6, 12  
6, 7  
Propagation Delay  
Time to Logic High  
Output Level  
tPLH  
RL =1.8 k, CL = 15 pF  
9, 10, 11  
9
Logic High Common  
Mode Transient  
Immunity  
VCM = 50 V  
VCM = 450 V  
TA = 25°C  
IIN = 0 mA  
1000 10,000  
|CMH|  
|CML|  
V/µs  
V/µs  
10,000  
13,  
14,  
17  
8
Logic Low Common  
Mode Transient  
Immunity  
VCM = 50 V  
TA = 25°C  
IIN = 4 mA  
9
1000 5,000  
VCM = 250 V  
5,000  
*All typical values are at TA = 25°C, VCC = 5 V unless otherwise noted.  
Figure 1. Typical Transfer Characteristics.  
Figure 2. Typical dc Threshold Levels vs. Temperature.  
7
Typical Characteristics All typical values are at TA = 25°C, VCC = 5 V, unless otherwise specified.  
Parameter  
Hysteresis  
Symbol  
Typ. Units  
Conditions  
IHYS = ITH+ - ITH-  
Fig.  
Note  
IHYS  
1.2  
1.1  
mA  
V
1
VHYS  
VILC  
VHYS = VTH+ - VTH-  
Input Clamp Voltage  
-0.76  
V
VILC = V2 - V3; V3 = GND;  
IIN = -10 mA  
Bridge Diode  
VD1,2  
0.62  
IIN = 3 mA (see schematic)  
Forward Voltage  
VD3,4  
RI-O  
0.73  
1012  
Input-Output Resistance  
Input-Output Capacitance  
Input Capacitance  
VI-O = 500 Vdc  
9
CI-O  
CIN  
2.0  
50  
pF  
pF  
f = 1 MHz, VI-O = 0 Vdc  
f = 1 MHz; VIN = 0 V,  
Pins 2 & 3, Pins 1 & 4 Open  
Output Rise Time  
(10-90%)  
tr  
tf  
10  
µs  
µs  
7
7
Output Fall Time  
(90-10%)  
0.5  
Notes:  
voltage, V , to ensure that the output  
CM  
7. Logic low output level at Pin 6 occurs  
under the conditions of V V as  
1. Maximum operating frequency is  
defined when output waveform (Pin 6)  
attains only 90% of V with R = 1.8  
k, C = 15 pF using a 5 V square  
wave input signal.  
2. Measured at a point 1.6 mm below  
seating plane.  
3. Current into/out of any single lead.  
4. Surge input current duration is 3 ms at  
120 Hz pulse repetition rate. Transient  
input current duration is 10 µs at  
120 Hz pulse repetition rate. Note that  
will remain in a Logic High state (i.e.,  
IN  
TH+  
V
> 2.0 V). Common mode transient  
well as the range of V > V – once  
O
IN  
TH+  
TH  
CC  
L
immunity in Logic Low level is the  
maximum tolerable dVCM/dt of the  
V
has exceeded V  
. Logic high  
IN  
L
output level at Pin 6 occurs under the  
conditions of V V  
as well as the  
common mode voltage, V , to ensure  
IN  
TH-  
CM  
range of V < V  
decreased below V  
once V has  
IN  
that the output will remain in a Logic  
IN  
TH+  
.
Low state (i.e., V < 0.8 V). See  
TH-  
O
8. The ac voltage is instantaneous  
voltage.  
Figure 8.  
14. In applications where dV  
may  
CM/dt  
9. Device considered a two terminal  
device: Pins 1, 2, 3, 4 connected  
together, Pins 5, 6, 7 8 connected  
together.  
10. This is a momentary withstand test,  
not an operating condition.  
exceed 50,000 V/µs (such as static  
discharge), a series resistor, R  
,
CC  
should be included to protect the  
detector IC from destructively high  
surge currents. The recommended  
maximum input power, P , must be  
observed.  
IN  
5. Derate linearly above 100°C free-air  
temperature at a rate of 4.26 mW/°C.  
Maximum input power dissipation of  
195 mW allows an input IC junction  
temperature of 150°C at an ambient  
value for R is 240 per volt of  
CC  
11. The t  
propagation delay is  
allowable drop in V (between Pin 8  
CC  
PHL  
measured from the 2.5 V level of the  
leading edge of a 5.0 V input pulse (1  
µs rise time) to the 1.5 V level on the  
leading edge of the output pulse (see  
Figure 7).  
and V ) with a minimum value of  
CC  
240 .  
15. D and D are Schottky diodes; D  
temperature of T = 125°C with a  
1
2
3
A
and D are zener diodes.  
typical thermal resistance from  
4
16. Standard parts receive 100% testing at  
25°C (Subgroups 1 and 9). SMD,  
Class H and Class K parts receive  
100% testing at 25, 125, and -55°C  
(Subgroups 1 and 9, 2 and 10 ,3 and  
11, respectively.)  
17. Parameters shall be tested as part of  
device initial characterization and after  
process changes. Parameters shall be  
guaranteed to the limits specified for  
all lots not specifically tested.  
junction to ambient of θ i = 235°C/W.  
JA  
12. The t  
propagation delay is  
The typical thermal resistance from  
PLH  
measured from the 2.5 V level of the  
trailing edge of a 5.0 V input pulse (1  
µs fall time) to the 1.5 V level on the  
trailing edge of the output pulse (see  
Figure 7).  
junction to case is equal to 170°C/W.  
Excessive P and T may result in  
IN  
J
device degradation.  
6. The 1.8 kload represents 1 TTL unit  
load of 1.6 mA and the 4.7 kpull-up  
resistor.  
13. Common mode transient immunity in  
Logic High level is the maximum  
tolerable dV  
of the common mode  
CM/dt  
8
Figure 3. Typical Input Characteristics, IIN vs. VIN.  
(AC Voltage is Instantaneous Value.)  
Figure 4. Typical Input Current, IIN, and Low Level Output  
Voltage, VOL, vs. Temperature.  
Figure 5. Typical High Level Supply Current, ICCH vs.  
Temperature.  
Figure 6. Typical Propagation Delay vs. Temperature.  
HCPL-5760/1/K  
HCPL-5760/1/K  
Figure 7. Switching Test Circuit.  
Figure 8. Test Circuit for Common Mode Transient  
Immunity and Typical Waveforms.  
9
Electrical Considerations  
The HCPL-5760, HCPL-5761,  
HCPL-576K or 5962-89477  
optocoupler has internal  
temperature compensated,  
predictable voltage and current  
threshold points which allow  
selection of an external resistor,  
Figure 9. Operating Circuit for Burn-In and Steady State Life Tests.  
Rx, to determine larger external  
threshold voltage levels. For a  
desired external threshold  
voltage, V , a corresponding  
typical value of Rx can be  
obtained from Figure 10. Specific  
calculation of Rx can be obtained  
from Equation (1) of Figure 11.  
Specification of both V+ and V-  
voltage threshold levels simulta-  
neously can be obtained by the  
detector IC from destructively  
high surge currents. See note 14  
for determination of RCC. In  
addition, it is recommended that a  
ceramic disc bypass capacitor of  
0.01 µF to 0.1 µF be placed  
between Pins 8 and 5 to reduce  
the effect of power supply noise.  
use of Rx and Rp as shown in  
Figure 11 and determined by  
Equations (2) and (3).  
For interfacing ac signals to TTL  
systems, output low pass filtering  
Figure 10. Typical External Threshold  
Characteristic, V vs. Rx.  
Rx can provide over-current  
transient protection by limiting  
input current during a transient  
condition. For monitoring  
contacts with a relay or switch,  
the HCPL-5760/1/K, or  
5962-89477 combination with Rx  
and Rp can be used to allow a  
specific current to be conducted  
through the contacts for cleaning  
purposes (wetting current).  
can be performed with a pullup  
resistor of 1.5 kand 20 µF  
capacitor. This application  
requires a Schmitt trigger gate to  
avoid slow rise time chatter  
problems. For ac input applica-  
tions, a filter capacitor can be  
placed across the dc input  
terminals for either signal or  
transient filtering.  
For two specifically selected  
external threshold voltage levels,  
V+ and V-, the use of Rx and Rp  
will permit this selection via  
equations (2), (3) provided the  
following conditions are met:  
Either ac (Pins 1, 4) or dc (Pins  
2, 3) input can be used to  
determine external threshold  
levels.  
The choice of which input voltage  
clamp level to choose depends  
upon the application of this  
device (see Figure 3). It is  
V+ VTH+  
––– ––– and ––+–––––– < ––––  
V- VTH- V- - VTH- ITH-  
V - VTH+  
ITH+  
recommended that the low clamp  
condition be used when possible  
to lower the input power  
dissipation as well as the LED  
current, which minimizes LED  
degradation over time.  
VTH- (V+) - VTH+ (V-)  
Rx = –––––––––––––––––––– (2)  
ITH+ (VTH-) - ITH- (VTH+  
For one specifically selected  
external threshold voltage level  
V+ or V-, Rx can be determined  
without use of Rp via  
)
RP =  
VTH- (V+) - VTH+ (V-)  
––––––––––––––––––––––––––(3)  
ITH+ (V- - VTH-) + ITH- (VTH+ - V+)  
V+ - VTH+  
In applications where dVCM/dt may  
be extremely large (such as static  
discharge), a series resistor, RCC,  
should be connected in series  
(-)  
(-)  
Rx = –––––––––  
(1)  
ITH+  
(-)  
See Application Note 1004 for  
more information.  
with VCC and Pin 8 to protect the  
10  
MIL-PRF-38534 Class H,  
Class K, and DSCC SMD  
Test Program  
Agilent TechnologiesHi-Rel  
Optocouplers are in compliance  
with MIL-PRF-38534 Class H and  
K. Class H and Class K devices  
are also in compliance with DSCC  
drawing 5962-89477.  
Testing consists of 100% screen-  
ing and quality conformance  
inspection to MIL-PRF-38534.  
HCPL-5760/1/K  
Figure 11. External Threshold Voltage Level Selection.  
www.semiconductor.agilent.com  
Data subject to change.  
Copyright © 2001 Agilent Technologies  
August 23, 2001  
Obsoletes 5968-9404E (11/00)  
5988-3093EN  

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WEDC

5962-8947901VGX

Three Terminal Voltage Reference, 1 Output, 10V, Trim/Adjustable, MBCY8, METAL CAN, 8 PIN
WEDC

5962-8947901VHA

IC 1-OUTPUT THREE TERM VOLTAGE REFERENCE, 10 V, CDFP10, CERAMIC, DFP-10, Voltage Reference
WEDC

5962-8947901VHX

IC 1-OUTPUT THREE TERM VOLTAGE REFERENCE, 10 V, CDFP10, CERAMIC, DFP-10, Voltage Reference
WEDC

5962-8947901VPA

Three Terminal Voltage Reference, 1 Output, 10V, Trim/Adjustable, CDIP8, CERAMIC, DIP-8
WEDC

5962-8947901VPX

IC 1-OUTPUT THREE TERM VOLTAGE REFERENCE, 10 V, CDIP8, CERAMIC, DIP-8, Voltage Reference
ACTEL

5962-8947902GX

Voltage Reference
ETC