BPNGA_技术文档

Data Sheet

January 1999

Quad Differential Drivers

BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA

26LS31, but offer increased speed, decreased power

consumption, and significantly lower levels of electro-

magnetic interference (EMI). They replace the Agere

41 Series drivers.

Features

■ Pin-equivalent to the general-trade 26LS31 device,

with improved speed, reduced power consumption,

and significantly lower levels of EMI

The BDG1A device is the generic driver in this family

and requires the user to supply external resistors on

the circuit board for impedance matching.

■ Four line drivers per package

■ Meets ESDI standards

The BDGLA is a low-power version of the BDG1A,

reducing the power requirement by more than one

half. The BDGLA features a 3-state output with a typ-

ical third-state level of 0.2 V.

■ 2.0 ns maximum propagation delay

■ Single 5.0 V ± 10% supply

■ Operating temperature range: −40 °C to +125 °C

The BDP1A is equivalent to the BDG1A but has

220 Ω termination resistors to ground on each driver

output. This eliminates the need for external pull-

down resistors when driving a 100 Ω impedance line.

(wider than the 41 Series)

■ 400 Mbits/s maximum data rate

■ Logic to convert TTL input logic levels to differen-

tial, pseudo-ECL output logic levels

The BPNGA and BPNPA are equivalent to the

BDG1A and BDP1A, respectively, except that a light-

ning protection circuit has been added to the driver

outputs. This circuit will absorb large transitions on

the transmission lines without destroying the device.

■ No line loading when VCC = 0 (BDG1A, BDP1A

only)

■ High output driver for 50 Ω loads

■ <0.2 ns output skew (typical)

■ On-chip 220 Ω loads available

■ Third-state outputs available

The BPPGA combines the features of the BPNGA

and BPNPA. Two of the gates have their outputs ter-

minated to ground through 220 Ω resistors while the

two remaining gates require external termination

resistors.

■ Surge-protection to ±60 V for 10 ms available

(BPNGA, BPNPA, BPPGA)

When the BDG1A and the BDP1A devices are pow-

ered down, the output circuit appears as an open cir-

cuit relative to the power supplies; hence, they will

not load the transmission line. For those circuits with

termination resistors, the line will remain impedance

matched when the circuit is powered down. The

BPNGA, BPNPA, BPPGA, and BDGLA will load the

transmission line, because of the protection circuit,

when the circuit is powered down.

■ Available in four package types

■ ESD performance better than the 41 Series

■ Lower power requirement than the 41 Series

Description

These quad differential drivers are TTL input-to-

pseudo-ECL-differential-output used for digital data

transmission over balanced transmission lines. All

devices in this family have four drivers with a single

enable control in a common package. These drivers

are compatible with many receivers, including the

Agere Systems Inc. 41 Series receivers and trans-

ceivers. They are pin equivalent to the general-trade

The packaging options that are available for these

quad differential line drivers include a 16-pin DIP; a

16-pin, J-lead SOJ; a 16-pin, gull-wing SOIC; and a

16-pin, narrow-body, gull-wing SOIC.

Quad Differential Drivers

BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA

Data Sheet

January 1999

Pin Information

AI

AO

E1

VCC

DI

AI

AO

E1

VCC

DI

AI

AO

E1

VCC

DI

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

A

D

DO

E2

DO

E2

DO

E2

BO

BI

BO

BI

BO

BI

CO

CI

CO

CI

CO

CI

B

C

GND

BDG1A

BDGLA

BPNGA

BDP1A

BPNPA

BPPGA

12-2038b (F)

Figure 1. Quad Differential Driver Logic Diagrams

Table 1. Enable Truth Table

E1

0

E2

0

Condition

Active

1

0

Active

0

1

Disabled

Active

1

Absolute Maximum Ratings

Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are abso-

lute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess

of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended

periods can adversely affect device reliability.

Parameter

Power Supply Voltage

Symbol

V^CC

Min

—

Max

6.5

Unit

V

Ambient Operating Temperature

Storage Temperature

T^A

−40

−55

125

150

°C

T^stg

2

Agere Systems Inc.

Quad Differential Drivers

BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA

Data Sheet

January 1999

Electrical Characteristics

For electrical characteristics over the entire temperature range, see Figures 7 through 9.

Table 2. Power Supply Current Characteristics

T^A= –40 °C to +125 °C, VCC = 5 V ± 0.5 V.

Parameter

Power Supply Current (V^CC= 5.5 V):

All Outputs Disabled:

BDG1A*, BPNGA*

BDP1A^†, BPNPA^†

BDGLA*

Symbol

Min

Typ

Max

Unit

I^CC

ICC

I^CC

ICC

45

120

35

65

160

55

mA

BPPGA*^†

85

115

All Outputs Enabled:

BDG1A*, BPNGA*

BDP1A^†, BPNPA^†

BDGLA*

I^CC

ICC

I^CC

ICC

25

150

14

40

200

20

mA

BPPGA*^†

90

115

* Measured with no load (BPPGA has no load on drivers C and D).

† The additional power dissipation is the result of integrating the termination resistors into the device. ICC is measured with a 100 Ω resistor

across the driver outputs (BPPGA has terminating resistors on drivers A and B).

Third State

These drivers produce pseudo-ECL levels, and the third-state mode is different than the conventional TTL devices.

When a driver is placed in the third state, the bases of the output transistors are pulled low, bringing the outputs

below the active-low levels. This voltage is typically 2 V for most drivers. In the bidirectional bus application, the

driver of one device, which is in its third state, may be back driven by another driver on the bus whose voltage in

the low state is lower than the third-stated device. This could come about due to differences in the drivers’ indepen-

dent power supplies. In this case, the device in the third state will control the line, thus clamping the line and reduc-

ing the signal swing. If the difference voltage between the independent power supplies and the drivers is small,

then this consideration can be ignored. In the typical case, the difference voltage can be as much as 1 V without

significantly affecting the amplitude of the driving signal.

Agere Systems Inc.

3

Quad Differential Drivers

BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA

Data Sheet

January 1999

Electrical Characteristics (continued)

Table 3. Voltage and Current Characteristics

For the variation in V^OHand VOL over the temperature range, see Figures 7 and 8.

T^A= –40 °C to +125 °C.*

Parameter

Symbol

Min

Typ

Max

Unit

Output Voltages:

Low*

V^OL

VOH – 1.4

VOH − 1.1

VOH − 0.65

V

High*:

BDG1A, BDP1A, BPNGA, BPNPA, BPPGA

BDGLA

Differential Voltage (V^OH– VOL)

Output Voltages (T^A= 0 °C to 85 °C):

Low*

V^OH

VDIFF

VCC − 1.8

VCC − 2.5

0.65

VCC − 1

VCC − 2

1.1

VCC − 0.8

VCC − 1.6

1.4

V

V^OL

VOH – 1.4

VOH − 1.1

VOH − 0.8

V

High*:

BDG1A, BDP1A, BPNGA, BPNPA, BPPGA

BDGLA

Differential Voltage (V^OH– VOL)

Third State, I^OH= –1.0 mA, VCC = 4.5 V:

BDG1A, BDP1A, BPNGA, BPNPA, BPPGA

BDGLA

V^OH

VDIFF

VCC − 1.5

VCC − 2.5

0.8

VCC − 1

VCC − 2

1.1

VCC − 0.8

VCC − 1.6

1.4

V

V^OZ

—

VOL − 0.5

VOL − 0.2

V

0.2

0.5

Input Voltages:

Low, V^CC= 5.5 V:

Data Input

Enable Input

†

V^IL

—

2.0

—

0.8

0.7

—

−1.0

—

V

mA

†

High, V^CC= 4.5 V

VIH

VIK

IOS

Clamp, V^CC= 4.5 V, II = –5.0 mA

Short-circuit Output Current, V^CC= 5.5 V

Input Currents, V^CC= 5.5 V:

Low, V^I= 0.4 V

High, V^I= 2.7 V

Reverse, V^I= 5.5 V

‡

–100

IIL

IIH

—

−400

20

100

µA

Output Resistors:

BDP1A, BPNPA, BPPGA^§

* Values are with terminations as per Figure 4 or equivalent.

RO

—

220

—

Ω

† The input levels and difference voltage provide zero noise immunity and should be tested only in a static, noise-free environment.

‡ Test must be performed one lead at a time to prevent damage to the device.

§ See Figure 1 for BPPGA terminations.

4

Agere Systems Inc.

Quad Differential Drivers

BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA

Data Sheet

January 1999

Timing Characteristics

Table 4. Timing Characteristics (See Figures 2 and 3.)

For t^P1and tP2 propagation delays over the temperature range, see Figure 9.

Propagation delay test circuit connected to output (see Figure 6).

T^A= –40 °C to +125 °C, VCC = 5 V ± 0.5 V.

Parameter

Propagation Delay:

Symbol

Min

Typ

Max

Unit

Input High to Output^†

Input Low to Output^†

tP1*

tP2*

∆t^p

0.8

—

1.2

2.0

ns

Capacitive Delay

0.02

0.03

ns/pF

Disable Time (either E1 or E2):

High-to-high Impedance

Low-to-high Impedance

Enable Time (either E1 or E2):

High Impedance to High

High Impedance to Low

Output Skew, |t^P1– tP2|

|t^{PHH –}tPHL|, |tPLH – tPLL|

Difference Between Drivers

Rise Time (20%—80%)

Fall Time (80%—20%)

t^PHZ

t^PLZ

4

8

12

ns

t^PZH

t^PZL

4

8

12

0.3

0.5

0.3

2

ns

4

8

tskew1

tskew2

∆t^skew

t^tLH

—

0.1

0.2

—

0.7

t^tHL

2

* tP1 and tP2 are measured from the 1.5 V point of the input to the crossover point of the outputs (see Figure 2).

† CL = 5 pF. Capacitor is connected from each output to ground.

Agere Systems Inc.

5

Quad Differential Drivers

BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA

Data Sheet

January 1999

Timing Characteristics (continued)

2.4 V

INPUT

TRANSITION

1.5 V

0.4 V

tP1

tP2

VOH

VOL

OUTPUTS

OUTPUT

tPHH

tPLL

VOH

(VOH + VOL)/2

VOL

VOH

OUTPUT

(VOH + VOL)/2

VOL

tPHL

tPLH

VOH

VOL

80%

20%

ttLH

ttHL

12-2677F

Figure 2. Driver Propagation-Delay Timing

3.0 V

1.3 V

0.0 V

E1*

3.0 V

1.3 V

0.0 V

†

E2

tPHZ

tPZH

VOH

VOL + 0.2 V

VOL

OUTPUT

VOL – 0.1 V

VOL

VOL – 0.1 V

tPLZ

tPZL

12-2268.dC

* E2 = 1 while E1 changes state.

† E1 = 0 while E2 changes state.

Note: In the third state, both outputs (i.e., OUTPUT and OUTPUT) are 0.2 V below the low state.

Figure 3. Driver Enable and Disable Timing for a High Input

6

Agere Systems Inc.

Quad Differential Drivers

BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and

Data Sheet

January 1999

Test Conditions

Output Characteristics

Parametric values specified under the Electrical Char-

acteristics and Timing Characteristics sections for the

data transmission driver devices are measured with the

following output load circuits.

Figure 6 illustrates typical driver output characteristics.

Included are load lines for two typical termination con-

figurations.

OUTPUT VOLTAGE (V)

VCC – 2 V

VCC – 1 V

VCC

100 Ω

DO(+)

200 Ω

DO(–)

200 Ω

VOH

10

20

30

40

Y LOAD

BDG1A, BPNGA, BDGLA, BPPGA (Gates A & B)

VOL

12-2271F

π LOAD

100 Ω

DO

12-2269F

BDP1A, BPNPA, BPPGA (Gates C & D)

Figure 4. Driver Test Circuit

A. Output Current vs. Output Voltage for Loads

Shown in C and D (BDG1A, BDP1A, BPNGA,

BPNPA, and BPPGA)

12-2271.bC

OUTPUT VOLTAGE (V)

VCC – 3 V

VCC – 2 V

VCC – 1 V

VCC

VOH

+5 V

10

20

30

40

110 Ω

Y LOAD

VOL

DUT

110 Ω

π LOAD

+60 V

SURGE

+

–

+60 V

SURGE

10 µs

DURATION

12-2818aC

+

–

10 µs

B. Output Current vs. Output Voltage for Loads

Shown in C and D (BDGLA)

1 ms

REPETITION

DURATION

1 ms

REPITITION

60 Ω

12-2640.aF

DO

Note: Surges can be applied simultaneously, but never in opposite

polarities.

90 Ω

Figure 5. Lightning-Surge Testing Configuration

(BPNGA, BPNPA, and BPPGA)

12-2270F

C. Y Load

100 Ω

DO(+)

DO(–)

200 Ω

12-2271F

D. π Load

Figure 6. Driver Output Current vs. Voltage

Characteristics

Agere Systems Inc.

7

Quad Differential Drivers

BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA

Data Sheet

January 1999

Temperature Characteristics

0

2.3

2.1

1.9

1.7

1.5

1.3

1.1

0.9

0.7

–0.5

VOH MAX

RANGE FOR tP1 AND tP2

MAX

–1.0

–1.5

MIN

VOH MIN

VOL MAX

–2.0

–2.5

0.5

0.3

–50 –25

VOL MIN

125 150

–50

–25

0

25

50

75

100

0

25

50

75

100

125 150

TEMPERATURE (°C)

12-3467F

12-3469aF

Figure 7. VOL and VOH Extremes vs. Temperature

Figure 9. Min and Max for tP1 and tP2 Propagation

Delays vs. Temperature

for 100 Ω Load

Handling Precautions

1.2

CAUTION: This device is susceptible to damage

as a result of electrostatic discharge.

Take proper precautions during both

handling and testing. Follow guide-

lines such as JEDEC Publication No.

108-A (Dec. 1988).

VOH – VOL TYP

1.0

0.8

VOH – VOL MIN

0.6

When handling and mounting line driver products,

proper precautions should be taken to avoid exposure

to electrostatic discharge (ESD). The user should

adhere to the following basic rules for ESD control:

0.4

0

–50

–25

0

25

50

75

100

125 150

1. Assume that all electronic components are sensi-

tive to ESD damage.

TEMPERATURE (°C)

12-3468F

2. Never touch a sensitive component unless properly

grounded.

Figure 8. Differential Voltage (VOH – VOL) vs.

Temperature for 100 Ω Load

3. Never transport, store, or handle sensitive compo-

nents except in a static-safe environment.

8

Agere Systems Inc.

Quad Differential Drivers

BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and

Data Sheet

January 1999

The HBM ESD threshold voltage presented here was

obtained by using these circuit parameters.

ESD Failure Models

Agere employs two models for ESD events that can

cause device damage or failure.

Table 5. Typical ESD Thresholds for Data

Transmission Drivers

1. A human-body model (HBM) that is used by most

of the industry for ESD-susceptibility testing and

protection-design evaluation. ESD voltage thresh-

olds are dependent on the critical parameters used

to define the model. A standard HBM (resistance =

1500 Ω, capacitance = 100 pF) is widely used and,

therefore, can be used for comparison purposes.

Device

HBM

Threshold

CDM

Threshold

BDG1A, BDGLA

BDP1A

>2500

>3000

>1000

>2000

BPPGA, BPNGA,

BPNPA

2. A charged-device model (CDM), which many

believe is the better simulator of electronics manu-

facturing exposure.

Table 6. ESD Damage Protection

ESD Threat Controls

Tables 5 and 6 illustrate the role these two models play

in the overall prevention of ESD damage. HBM ESD

testing is intended to simulate an ESD event from a

charged person. The CDM ESD testing simulates

charging and discharging events that occur in produc-

tion equipment and processes, e.g., an integrated cir-

cuit sliding down a shipping tube.

Personnel

Processes

Control

Model

Wrist straps

ESD shoes

Static-dissipative

materials

Antistatic flooring

Air ionization

Human-body model

(HBM)

Charged-device

model (CDM)

Latch-Up

Latch-up evaluation has been performed on the data transmission drivers. Latch-up testing determines if power-

supply current exceeds the specified maximum due to the application of a stress to the device under test. A device

is considered susceptible to latch-up if the power supply current exceeds the maximum level and remains at that

level after the stress is removed.

Agere performs latch-up testing per an internal test method that is consistent with JEDEC Standard No. 17 (previ-

ously JC-40.2) “CMOS Latch-Up Standardized Test Procedure.”

Latch-up evaluation involves three separate stresses to evaluate latch-up susceptibility levels:

1. dc current stressing of input and output pins.

2. Power supply slew rate.

3. Power supply overvoltage.

Table 7. Latch-Up Test Criteria and Test Results

dc Current Stress of Power Supply

Power Supply

Overvoltage

I/O Pins

≥150 mA

≥250 mA

Slew Rate

Data Transmission

Driver ICs

Minimum Criteria

Test Results

≤1 µs

≥1.75 × Vmax

≥2.25 × Vmax

≤100 ns

Based on the results in Table 6, the data transmission drivers pass the Agere latch-up testing requirements and are

considered not susceptible to latch-up.

Agere Systems Inc.

9

Quad Differential Drivers

BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA

Data Sheet

January 1999

Outline Diagrams

16-Pin DIP

Dimensions are in millimeters.

L

N

B

1

W

PIN #1 IDENTIFIER ZONE

H

SEATING PLANE

0.38 MIN

2.54 TYP

0.58 MAX

5-4410r.2 (C)

Package Dimensions

Maximum Width Maximum Width Maximum Height

Number of

Pins

Package

Description

Maximum Length

(L)

Without Leads

(B)

Including Leads

(W)

Above Board

(H)

(N)

PDIP3 (Plastic

Dual-In-Line

Package)

16

20.57

6.48

7.87

5.08

Note: The dimensions in this outline diagram are intended for informational purposes only. For detailed schematics to assist your design efforts,

please contact your Agere Sales Representative.

10

Agere Systems Inc.

Quad Differential Drivers

BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA

Data Sheet

January 1999

Outline Diagrams (continued)

16-Pin SOIC (SONB/SOG)

Dimensions are in millimeters.

L

N

B

1

PIN #1 IDENTIFIER ZONE

W

H

SEATING PLANE

0.10

0.61

0.51 MAX

1.27 TYP

0.28 MAX

5-4414r.3 (C)

Package Dimensions

Maximum Width Maximum Width Maximum Height

Number of

Package

Pins

Maximum Length

Description

Without Leads

(B)

Including Leads

(W)

Above Board

(H)

(N)

(L)

SONB (Small-

Outline, Narrow

Body)

16

10.11

4.01

6.17

1.73

SOG (Small-

Outline, Gull-

Wing)

16

10.49

7.62

10.64

2.67

Note: The dimensions in this outline diagram are intended for informational purposes only. For detailed schematics to assist your design efforts,

please contact your Agere Sales Representative.

Agere Systems Inc.

11

Quad Differential Drivers

BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA

Data Sheet

January 1999

Outline Diagrams (continued)

16-Pin SOIC (SOJ)

Dimensions are in millimeters.

L

N

B

1

PIN #1 IDENTIFIER ZONE

W

H

SEATING PLANE

0.10

1.27 TYP

0.51 MAX

0.79 MAX

5-4413r.3 (C)

Package Dimensions

Maximum Width Maximum Width Maximum Height

Number of

Package

Description

Pins

(N)

Maximum Length

(L)

Without Leads

(B)

Including Leads

(W)

Above Board

(H)

SOJ (Small-

16

10.41

7.62

8.81

3.18

Outline, J-Lead)

Note: The dimensions in this outline diagram are intended for informational purposes only. For detailed schematics to assist your design efforts,

please contact your Agere Sales Representative.

12

Agere Systems Inc.

Quad Differential Drivers

BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and

Data Sheet

January 1999

The power dissipated in the output is a function of the:

■ Termination scheme on the outputs

■ Termination resistors

Power Dissipation

System designers incorporating Agere data transmis-

sion drivers in their applications should be aware of

package and thermal information associated with these

components.

■ Duty cycle of the output

Package thermal impedance depends on:

■ Airflow

Proper thermal management is essential to the long-

term reliability of any plastic encapsulated integrated

circuit. Thermal management is especially important

for surface-mount devices, given the increasing circuit

pack density and resulting higher thermal density. A

key aspect of thermal management involves the junc-

tion temperature (silicon temperature) of the integrated

circuit.

■ Package type (e.g., DIP, SOIC, SOIC/NB)

The junction temperature can be calculated using the

previous equation, after power dissipation levels and

package thermal impedances are known.

Figure 10 illustrates the thermal impedance estimates

for the various package types as a function of airflow.

This figure shows that package thermal impedance is

higher for the narrow-body SOIC package. Particular

attention should, therefore, be paid to the thermal man-

agement issues when using this package type.

Several factors contribute to the resulting junction tem-

perature of an integrated circuit:

■ Ambient use temperature

■ Device power dissipation

In general, system designers should attempt to main-

tain junction temperature below 125 °C. The following

factors should be used to determine if specific data

transmission drivers in particular package types meet

the system reliability objectives:

■ Component placement on the board

■ Thermal properties of the board

■ Thermal impedance of the package

Thermal impedance of the package is referred to as

■ System ambient temperature

■ Power dissipation

■ Package type

Θ

ja and is measured in °C rise in junction temperature

per watt of power dissipation. Thermal impedance is

also a function of airflow present in system application.

The following equation can be used to estimate the

junction temperature of any device:

■ Airflow

T^j= TA + PD

Θ

ja

140

130

where:

T^jis device junction temperature (°C).

T^Ais ambient temperature (°C).

P^Dis power dissipation (W).

120

110

100

90

SOIC/NB

Θ

ja is package thermal impedance (junction to ambi-

80

ent—°C/W).

70

J-LEAD SOIC/GULL WING

The power dissipation estimate is derived from two fac-

tors:

60

50

40

DIP

■ Internal device power

0

200

400

600

800

1000 1200

■ Power associated with output terminations

AIRFLOW (ft./min.)

Multiplying I^CCtimes VCC provides an estimate of inter-

nal power dissipation.

12-2753F

Figure 10. Power Dissipation

Agere Systems Inc.

13

Quad Differential Drivers

BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA

Data Sheet

January 1999

Ordering Information

Part Number

Intern.

Term.

Surge

Prot.

Package Type

Comcode

Former

Pkg. Type

Former

Part #

BDG1A16E

None

220 Ω

None

220 Ω

No

16-pin, Plastic SOJ

Tape & Reel SOJ

16-pin, Plastic SOIC

Tape & Reel SOIC

Plastic SOIC/NB

107914186

107914194

107914160

107914178

107914202

107914210

107914004

107914293

107914301

107914319

107914327

107914335

107914228

107914236

107914244

107914251

107914269

107914277

107914285

107914343

107914350

107914368

107914376

107914384

107914392

107914400

107914418

107914426

107914434

107914442

107949745

107949752

107949760

107949778

107949786

107949794

1041

1141

1241

41

LG, MG, MGA

LP, MP, MPA

MGL3

BDG1A16E-TR

BDG1A16G

No

BDG1A16G-TR

BDG1A16NB

BDG1A16NB-TR

BDG1A16P

No

Tape & Reel SOIC/NB

16-pin, Plastic DIP

16-pin, Plastic SOJ

Tape & Reel SOJ

16-pin, Plastic SOIC

Tape & Reel SOIC

16-pin, Plastic DIP

16-pin, Plastic SOJ

Tape & Reel SOJ

16-pin, Plastic SOIC

Tape & Reel SOIC

Plastic SOIC/NB

No

BDP1A16E

No

1041

1141

41

BDP1A16E-TR

BDP1A16G

No

BDP1A16G-TR

BDP1A16P

No

BDGLA16E

No

1041

1141

1241

41

BDGLA16E-TR

BDGLA16G

No

MGL3

No

MGL3

BDGLA16G-TR

BDGLA16NB

BDGLA16NB-TR

BDGLA16P

No

MGL3

No

MGL3

No

Tape & Reel SOIC/NB

16-pin, Plastic DIP

16-pin, Plastic SOJ

Tape & Reel SOJ

16-pin, Plastic SOIC

Tape & Reel SOIC

Plastic SOIC/NB

MGL3

No

MGL3

BPNGA16E

Yes

1041

1141

1241

41

NG

BPNGA16E-TR

BPNGA16G

NG

BPNGA16G-TR

BPNGA16NB

BPNGA16NB-TR

BPNGA16P

NG

Tape & Reel SOIC/NB

16-pin, Plastic DIP

16-pin, Plastic SOJ

Tape & Reel SOJ

16-pin, Plastic SOIC

Tape & Reel SOIC

16-pin, Plastic DIP

16-pin, Plastic SOJ

Tape & Reel SOJ

16-pin, Plastic SOIC

Tape & Reel SOIC

16-pin, Plastic DIP

NG

BPNPA16E

1041

1141

41

NP

BPNPA16E-TR

BPNPA16G

NP

BPNPA16G-TR

BPNPA16P

NP

BPPGA16E

1041

1141

41

PG

BPPGA16E-TR

BPPGA16G

PG

BPPGA16G-TR

BPPGA16P

PG

14

Agere Systems Inc.

Quad Differential Drivers

BDG1A, BDP1A, BDGLA, BPNGA, BPNPA, and BPPGA

Data Sheet

January 1999

Notes

Agere Systems Inc.

15

For additional information, contact your Agere Systems Account Manager or the following:

INTERNET:

http://www.agere.com

E-MAIL:

docmaster@agere.com

N. AMERICA: Agere Systems Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18109-3286

1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106)

ASIA:

Agere Systems Hong Kong Ltd., Suites 3201 & 3210-12, 32/F, Tower 2, The Gateway, Harbour City, Kowloon

Tel. (852) 3129-2000, FAX (852) 3129-2020

CHINA: (86) 21-5047-1212 (Shanghai), (86) 10-6522-5566 (Beijing), (86) 755-695-7224 (Shenzhen)

JAPAN: (81) 3-5421-1600 (Tokyo), KOREA: (82) 2-767-1850 (Seoul), SINGAPORE: (65) 778-8833, TAIWAN: (886) 2-2725-5858 (Taipei)

Tel. (44) 7000 624624, FAX (44) 1344 488 045

EUROPE:

Agere Systems Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application.

January 1999

DS99-144HSI (Replaces DS99-044HSI)


型号：	BPNGA
厂家：	AGERE SYSTEMS
描述：	QUAD DIFFERENTIAL DRIVERS 四路差分驱动器驱动器
文件：	总16页 (文件大小：245K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BPNGA [AGERE]

相关型号：

BPNGA16E

BPNGA16E-TR

BPNGA16G

BPNGA16G-TR

BPNGA16NB

BPNGA16NB-TR

BPNGA16P

BPNPA

BPNPA16E

BPNPA16E-TR

BPNPA16G

BPNPA16G-TR