MAT01N [ADI]

Matched Monolithic Dual Transistor; 匹配的单片双晶体管
MAT01N
型号: MAT01N
厂家: ADI    ADI
描述:

Matched Monolithic Dual Transistor
匹配的单片双晶体管

晶体 晶体管
文件: 总8页 (文件大小:122K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Matched Monolithic  
Dual Transistor  
a
MAT01  
FEATURES  
PIN CONNECTION  
Low VOS (VBE Match): 40 V typ, 100 V max  
Low TCVOS: 0.5 V/؇C max  
High hFE: 500 min  
TO-78  
(H Suffix)  
Excellent hFE Linearity from 10 nA to 10 mA  
Low Noise Voltage: 0.23 V p-p—0.1 Hz to 10 Hz  
High Breakdown: 45 V min  
Available in Die Form  
PRODUCT DESCRIPTION  
The MAT01 is a monolithic dual NPN transistor. An exclusive  
Silicon Nitride “Triple-Passivation” process provides excellent  
stability of critical parameters over both temperature and time.  
Matching characteristics include offset voltage of 40 µV, tem-  
perature drift of 0.15 µV/°C, and hFE matching of 0.7%. Very  
high hFE is provided over a six decade range of collector current,  
including an exceptional hFE of 590 at a collector current of only  
10 nA. The high gain at low collector current makes the  
MAT01 ideal for use in low power, low level input stages.  
NOTE: Substrate is connected to case.  
BURN-IN CIRCUIT  
REV. A  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 617/329-4700  
Fax: 617/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 1997  
MAT01–SPECIFICATIONS  
(@ VCB = 15 V, IC = 10 A, TA = 25؇C, unless otherwise noted.)  
ELECTRICAL CHARACTERISTICS  
MAT01AH  
Typ  
MAT01GH  
Typ Min  
Parameter  
Symbol  
Conditions  
Min  
Max  
Min  
Units  
Breakdown Voltage  
Offset Voltage  
Offset Voltage Stability  
First Month  
Long Term  
Offset Current  
Bias Current  
BVCEO  
VOS  
IC = 100 µA  
45  
45  
V
mV  
0.04 0.1  
0.10 0.5  
VOS/Time  
(Note 1)  
(Note 2)  
2.0  
0.2  
0.1  
13  
2.0  
0.2  
µV/Mo  
µV/Mo  
nA  
IOS  
IB  
0.6  
20  
0.2  
18  
3.2  
40  
nA  
Current Gain  
hFE  
IC = 10 nA  
IC = 10 µA  
IC = 10 mA  
IC = 10 µA  
590  
770  
840  
0.7  
0.8  
430  
560  
610  
1.0  
1.2  
500  
250  
Current Gain Match  
hFE  
3.0  
8.0  
%
%
100 nA IC 10 mA  
Low Frequency Noise  
Voltage  
Broadband Noise  
Voltage  
en p-p  
en rms  
en  
0.1 Hz to 10 Hz3  
1 Hz to 10 kHz  
0.23 0.4  
0.60  
0.23 0.4  
0.60  
µV p-p  
µV rms  
Noise Voltage  
Density  
fO = 10 Hz3  
7.0  
6.1  
6.0  
0.5  
2
9.0  
7.6  
7.5  
3.0  
15  
7.0  
6.1  
6.0  
0.8  
3
9.0  
7.6  
7.5  
8.0  
70  
nV/Hz  
nV/Hz  
nV/Hz  
µV/V  
fO = 100 Hz3  
fO = 1000 Hz3  
0 VCB 30 V  
0 VCB 30 V  
Offset Voltage Change  
Offset Current Change  
Collector-Base  
Leakage Current  
Collector-Emitter  
Leakage Current  
Collector-Collector  
Leakage Current  
Collector Saturation  
Voltage  
VOS/VCB  
IOS/VCB  
pA/V  
ICBO  
ICES  
VCB = 30 V, IE = 04  
15  
50  
20  
50  
25  
90  
30  
200  
400  
400  
pA  
pA  
VCE = 30 V, VBE = 04, 5  
200  
200  
ICC  
VCE(SAT)  
VCC = 30 V5  
pA  
V
V
MHz  
pF  
IB = 0.1 mA, IC = 1 mA  
IB = 1 mA, IC = 10 mA  
VCE = 10 V, IC = 10 mA  
VCB = 15 V, IE = 0  
0.12 0.20  
0.12 0.25  
0.8  
450  
2.8  
0.8  
450  
2.8  
Gain-Bandwidth Product fT  
Output Capacitance  
Collector-Collector  
Capacitance  
COB  
CCC  
VCC = 0  
8.5  
8.5  
pF  
(@ V = 15 V, I = 10 A, –55؇C T +125؇C, unless otherwise noted.)  
ELECTRICAL CHARACTERISTICS  
CB  
C
A
MAT01AH  
Typ  
MAT01GH  
Typ  
Parameter  
Symbol  
Conditions  
Min  
Max  
Min  
Min  
Units  
Offset Voltage  
Average Offset  
Voltage Drift  
Offset Current  
Average Offset  
Current Drift  
VOS  
0.06 0.15  
0.14 0.70  
mV  
TCVOS  
IOS  
(Note 6)  
(Note 7)  
0.15 0.50  
0.35 1.8  
µV/°C  
nA  
0.9  
8.0  
1.5  
15.0  
TCIOS  
ΙΒ  
10  
28  
90  
60  
15  
36  
150  
130  
pA/°C  
nA  
Bias Current  
Current Gain  
hFE  
167  
400  
77  
300  
Collector-Base  
Leakage Current  
Collector-Emitter  
Leakage Current  
Collector-Collector  
Leakage Current  
ICBO  
TA = 125°C, VCB = 30 V,  
IE = 04  
15  
50  
30  
80  
25  
90  
50  
200  
400  
400  
nA  
nA  
nA  
ICES  
ICC  
TA = 125°C, VCE = 30 V,  
VBE = 04, 6  
300  
200  
TA = 125°C, VCC = 30 V,  
(Note 6)  
–2–  
REV. A  
MAT01  
(@ V = 15 V and I = 10 A, T = +25؇C, unless otherwise noted.)  
TYPICAL ELECTRICAL CHARACTERISTICS  
CB  
C
A
MAT01N  
Typical  
Parameter  
Symbol  
Conditions  
Units  
Average Offset Voltage Drift  
Average Offset Current Drift  
Collector-Emitter-Leakage  
Current  
TCVOS  
TCIOS  
0.35  
15  
µV/°C  
pA/°C  
ICES  
VCE = 30 V, VBE = 0  
90  
pA  
Collector-Base-Leakage  
Current  
Gain Bandwidth Product  
Offset Voltage Stability  
ICBO  
fT  
VOS/T  
VCB = 30 V, IE = 0  
25  
pA  
MHz  
µV/Mo  
µV/Mo  
VCE = 10 V, IC = 10 mA  
First Month (Note 1)  
Long-Term (Note 2)  
450  
2.0  
0.2  
NOTES  
1Exclude first hour of operation to allow for stabilization.  
2Parameter describes long-term average drift after first month of operation.  
3Sample tested.  
4The collector-base (ICBO) and collector-emitter (ICES) leakage currents may be  
reduced by a factor of two to ten times by connecting the substrate (package) to  
a potential which is lower than either collector voltage.  
5ICC and ICES are guaranteed by measurement of ICBO  
.
VOS  
6Guaranteed by VOS test (TCVOS  
for VOS Ӷ VBE) T = 298°K for TA = 25°C.  
T
7Guaranteed by IOS test limits over temperature.  
Specifications subject to change without notice.  
(@ V = 15 V, I = 10 A, T = +25؇C, unless otherwise noted.)  
WAFER TEST LIMITS  
CB  
C
A
MAT01N  
Limits  
Parameter  
Symbol  
Conditions  
Units  
Breakdown Voltage  
Offset Voltage  
Offset Current  
Bias Current  
Current Gain  
Current Gain Match  
Offset Voltage Change  
Offset Current Change  
Collector Saturation Voltage  
BVCEO  
VOS  
IOS  
IB  
hFE  
IC = 100 µA  
45  
V min  
mV max  
nA max  
nA max  
min  
0.5  
3.2  
40  
250  
8.0  
8.0  
70  
hFE  
% max  
VOS/VCB  
VOS/VCB  
VCE (SAT)  
0 VCB 30 V  
0 VCB 30 V  
IB = 0.1 mA, IC = 1 mA  
µV/V max  
pA/V max  
V max  
0.25  
NOTE  
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not  
guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.  
REV. A  
–3–  
MAT01  
ABSOLUTE MAXIMUM RATINGS1  
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C  
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . .+300°C  
DICE Junction Temperature . . . . . . . . . . . . –65°C to +150°C  
Collector-Base Voltage (BVCBO  
MAT01AH, GH, N . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 V  
Collector-Emitter Voltage (BVCEO  
MAT01AH, GH, N . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 V  
Collector-Collector Voltage (BVCC  
MAT01AH, GH, N . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 V  
Emitter-Emitter Voltage (BVEE  
MAT01AH, GH, N . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 V  
)
)
NOTES  
1Absolute maximum ratings apply to both DICE and packaged devices.  
2Application of reverse bias voltages in excess of rating shown can result in  
degradation of hFE and hFE matching characteristics. Do not attempt to measure  
BVEBO greater than the 5 V rating shown.  
)
)
3Rating applies to applications using heat sinking to control case temperature.  
Derate linearity at 16.4 mW/°C for case temperatures above 40°C.  
4Rating applies to applications not using heat sinking; device in free air only. Derate  
linearity at 6.3 mW/°C for ambient temperatures above 70°C.  
2
Emitter-Base Voltage (BVEBO  
)
. . . . . . . . . . . . . . . . . . . . . 5 V  
Collector Current (IC) . . . . . . . . . . . . . . . . . . . . . . . . . .25 mA  
Emitter Current (IE) . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA  
Total Power Dissipation  
Case Temperature 40°C3 . . . . . . . . . . . . . . . . . . . . 1.8 W  
Ambient Temperature 70°C4 . . . . . . . . . . . . . . . 500 mW  
Operating Ambient Temperature . . . . . . . . . –55°C to +125°C  
Operating Junction Temperature . . . . . . . . . –55°C to +150°C  
ORDERING GUIDE1  
VOS max  
(TA = +25؇C) Range  
Temperature  
Package  
Option  
Model  
MAT01AH2  
MAT01GH  
0.1 mV  
0.5 mV  
–55°C to +125°C TO-78  
–55°C to +125°C TO-78  
NOTES  
1Burn-in is available on commercial and industrial temperature range parts in  
TO-can packages.  
2For devices processed in total compliance to MIL-STD-883, add/883 after part  
number. Consult factory for 883 data sheet.  
DICE CHARACTERISTICS  
1. COLLECTOR (1)  
2. BASE (1)  
3. EMITTER (1)  
5. EMITTER (2)  
6. BASE (2)  
7. COLLECTOR (2)  
DIE SIZE 0.035 × 0.025 inch, 875 sq. mils  
(0.89 × 0.64 mm, 0.58 sq. mm)  
CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily  
accumulate on the human body and test equipment and can discharge without detection.  
Although the MAT01 features proprietary ESD protection circuitry, permanent damage may  
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD  
precautions are recommended to avoid performance degradation or loss of functionality.  
WARNING!  
ESD SENSITIVE DEVICE  
REV. A  
–4–  
MAT01  
Figure 7. Base-Emitter Voltage  
vs. Collector Current  
Figure 1. Offset Voltage  
vs. Temperature  
Figure 4. Offset Voltage vs. Time  
Figure 8. Saturation Voltage  
vs. Collector Current  
Figure 5. Current Gain  
vs. Temperature  
Figure 2. Current Gain  
vs. Collector Current  
Figure 9. Gain-Bandwidth  
vs. Collector Current  
Figure 6. Noise Current Density  
Figure 3. Noise Voltage  
REV. A  
–5–  
MAT01  
MAT01 TEST CIRCUITS  
Figure 10. MAT01 Matching Measurement Circuit  
Figure 11. MAT01 Noise Measurement Circuit  
REV. A  
–6–  
MAT01  
APPLICATION NOTES  
Application of reverse bias voltages to the emitter-base junctions  
in excess of ratings (5 V) may result in degradation of hFE and  
h
FE matching characteristics. Circuit designs should be checked  
to ensure that reverse bias voltages above 5 V cannot be applied  
during such transient conditions as at circuit turn-on and  
turn-off.  
Stray thermoelectric voltages generated by dissimilar metals at  
the contacts to the input terminals can prevent realization of the  
predicted drift performance. Both input terminals should be  
maintained at the same temperature, preferably close to the tem-  
perature of the device’s package.  
TYPICAL APPLICATIONS  
Figure 12. Precision Reference  
Figure 14. Precision Operational Amplifiers  
Figure 13. Basic Digital Thermometer Readout in  
Degrees Kelvin (°K)  
Figure 15. Digital Thermometer with Readout in °C  
REV. A  
–7–  
MAT01  
OUTLINE DIMENSIONS  
Dimensions shown in inches and (mm).  
H-06A  
6-Lead Metal Can (TO-78)  
REFERENCE PLANE  
0.750 (19.05)  
0.500 (12.70)  
0.185 (4.70)  
0.165 (4.19)  
0.250 (6.35) MIN  
0.050 (1.27) MAX  
0.100 (2.54) BSC  
4
0.160 (4.06)  
0.110 (2.79)  
5
0.045 (1.14)  
0.027 (0.69)  
0.200  
(5.08)  
BSC  
3
6
2
1
0.100  
(2.54)  
BSC  
0.019 (0.48)  
0.016 (0.41)  
0.034 (0.86)  
0.027 (0.69)  
0.040 (1.02) MAX  
0.021 (0.53)  
0.016 (0.41)  
0.045 (1.14)  
0.010 (0.25)  
45° BSC  
BASE & SEATING PLANE  
REV. A  
–8–  

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