ADM1021AARQ-REEL [ADI]

Low-Cost Microprocessor System Temperature Monitor; 低成本微处理器系统温度监控器
ADM1021AARQ-REEL
型号: ADM1021AARQ-REEL
厂家: ADI    ADI
描述:

Low-Cost Microprocessor System Temperature Monitor
低成本微处理器系统温度监控器

模拟IC 信号电路 微处理器 温度传感 光电二极管 监控
文件: 总16页 (文件大小:203K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Low-Cost Microprocessor  
a
System Temperature Monitor*  
ADM1021A  
FEATURES  
PRODUCT DESCRIPTION  
Alternative to the ADM1021  
On-Chip and Remote Temperature Sensing  
No Calibration Necessary  
1؇C Accuracy for On-Chip Sensor  
3؇C Accuracy for Remote Sensor  
Programmable Overtemperature/Undertemperature  
Limits  
Programmable Conversion Rate  
2-Wire SMBus Serial Interface  
Supports System Management Bus (SMBus) Alert  
200 mA Max Operating Current  
1 mA Standby Current  
The ADM1021A is a two-channel digital thermometer and  
undertemperature/overtemperature alarm, intended for use in  
personal computers and other systems requiring thermal monitor-  
ing and management. The device can measure the temperature  
of a microprocessor using a diode-connected PNP transistor, which  
may be provided on-chip in the case of the Pentium® III or similar  
processors, or can be a low-cost discrete NPN/PNP device such  
as the 2N3904/2N3906. A novel measurement technique cancels  
out the absolute value of the transistor’s base emitter voltage, so  
that no calibration is required. The second measurement channel  
measures the output of an on-chip temperature sensor, to monitor  
the temperature of the device and its environment.  
3 V to 5.5 V Supply  
Small 16-Lead QSOP Package  
The ADM1021A communicates over a two-wire serial interface  
compatible with SMBus standards. Undertemperature and  
overtemperature limits can be programmed into the devices over  
the serial bus, and an ALERT output signals when the on-chip  
or remote temperature is out of range. This output can be used  
as an interrupt, or as an SMBus alert.  
APPLICATIONS  
Desktop Computers  
Notebook Computers  
Smart Batteries  
Industrial Controllers  
Telecom Equipment  
Instrumentation  
FUNCTIONAL BLOCK DIAGRAM  
ADDRESS POINTER  
REGISTER  
ONE-SHOT  
REGISTER  
CONVERSION RATE  
REGISTER  
LOCAL TEMPERATURE  
LOW LIMIT REGISTER  
LOCAL TEMPERATURE  
VALUE REGISTER  
LOCAL TEMPERATURE  
LOW LIMIT COMPARATOR  
ON-CHIP TEMP.  
SENSOR  
LOCAL TEMPERATURE  
HIGH LIMIT COMPARATOR  
LOCAL TEMPERATURE  
HIGH LIMIT REGISTER  
D+  
D–  
A-TO-D  
ANALOG MUX  
CONVERTER  
REMOTE TEMPERATURE  
LOW LIMIT REGISTER  
REMOTE TEMPERATURE  
LOW LIMIT COMPARATOR  
BUSY  
RUN/STANDBY  
REMOTE TEMPERATURE  
HIGH LIMIT REGISTER  
REMOTE TEMPERATURE  
VALUE REGISTER  
REMOTE TEMPERATURE  
HIGH LIMIT COMPARATOR  
CONFIGURATION  
REGISTER  
STBY  
EXTERNAL DIODE OPEN-CIRCUIT  
INTERRUPT  
MASKING  
ALERT  
STATUS REGISTER  
SMBUS INTERFACE  
ADM1021A  
NC  
V
NC  
GND GND  
NC  
NC  
NC  
SDATA  
SCLK  
ADD0  
ADD1  
NC = NO CONNECT  
DD  
*Patents Pending  
REV. D  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© 2004 Analog Devices, Inc. All rights reserved.  
(T = TMIN to TMAX1, VDD = 3.0 V to 3.6 V, unless otherwise noted.)  
ADM1021A–SPECIFICATIONS  
A
Parameter  
Min Typ Max  
Unit  
Test Conditions/Comments  
POWER SUPPLY AND ADC  
Temperature Resolution  
Temperature Error, Local Sensor  
1
°C  
°C  
°C  
°C  
°C  
V
V
mV  
V
mV  
µA  
µA  
µA  
µA  
ms  
Guaranteed No Missed Codes  
1
–3  
–3  
–5  
3
+3  
+3  
+5  
3.6  
2.95  
Temperature Error, Remote Sensor  
TA = 60°C to 100°C  
Supply Voltage Range  
Note 2  
Undervoltage Lockout Threshold  
Undervoltage Lockout Hysteresis  
Power-On Reset Threshold  
POR Threshold Hysteresis  
Standby Supply Current  
2.5  
2.7  
25  
1.7  
50  
1
VDD Input, Disables ADC, Rising Edge  
0.9  
2.2  
5
VDD, Falling Edge3  
VDD = 3.3 V, No SMBus Activity  
SCLK at 10 kHz  
0.25 Conversions/Sec Rate  
2 Conversions/Sec Rate  
From Stop Bit to Conversion Complete  
(Both Channels)  
4
Average Operating Supply Current  
Autoconvert Mode, Averaged Over 4 Seconds  
Conversion Time  
130 200  
225 330  
115 170  
65  
D+ Forced to D– + 0.65 V  
Remote Sensor Source Current  
120  
7
205 300  
µA  
µA  
V
High Level3  
12  
0.7  
50  
16  
Low Level3  
D-Source Voltage  
Address Pin Bias Current (ADD0, ADD1)  
µA  
Momentary at Power-On Reset  
SMBUS INTERFACE  
Logic Input High Voltage, VIH  
STBY, SCLK, SDATA  
Logic Input Low Voltage, VIL  
STBY, SCLK, SDATA  
2.2  
V
V
VDD = 3 V to 5.5 V  
VDD = 3 V to 5.5 V  
0.8  
SMBus Output Low Sink Current  
ALERT Output Low Sink Current  
Logic Input Current, IIH, IIL  
SMBus Input Capacitance, SCLK, SDATA  
SMBus Clock Frequency  
SMBus Clock Low Time, tLOW  
SMBus Clock High Time, tHIGH  
SMBus Start Condition Setup Time, tSU:STA  
SMBus Repeat Start Condition  
Setup Time, tSU:STA  
6
1
–1  
mA  
mA  
µA  
pF  
kHz  
µs  
SDATA Forced to 0.6 V  
ALERT Forced to 0.4 V  
+1  
5
100  
4.7  
4
4.7  
250  
tLOW between 10% Points  
tHIGH between 90% Points  
µs  
µs  
ns  
Between 90% and 90% Points  
SMBus Start Condition Hold Time, tHD:STA  
SMBus Stop Condition Setup Time, tSU:STO  
SMBus Data Valid to SCLK  
Rising Edge Time, tSU:DAT  
SMBus Data Hold Time, tHD:DAT  
SMBus Bus Free Time, tBUF  
SCLK Falling Edge to SDATA  
Valid Time, tVD, DAT  
4
4
250  
µs  
µs  
ns  
Time from 10% of SDATA to 90% of SCLK  
Time from 90% of SCLK to 10% of SDATA  
Time from 10% or 90% of SDATA to 10%  
of SCLK  
0
4.7  
µs  
µs  
µs  
Between Start/Stop Conditions  
Master Clocking in Data  
1
NOTES  
1TMAX = 100°C; TMIN = 0°C.  
2Operation at VDD = 5 V guaranteed by design, not production tested.  
3Guaranteed by design, not production tested.  
Specifications subject to change without notice.  
REV. D  
–2–  
ADM1021A  
ABSOLUTE MAXIMUM RATINGS*  
PIN FUNCTION DESCRIPTIONS  
Positive Supply Voltage (VDD) to GND . . . . . . –0.3 V to +6 V  
D+, ADD0, ADD1 . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V  
D– to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.6 V  
SCLK, SDATA, ALERT, STBY . . . . . . . . . . . –0.3 V to +6 V  
Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
Pin No.  
Mnemonic Description  
1, 5, 9, 13, 16 NC  
2
3
No Connect  
VDD  
D+  
Positive Supply, 3 V to 5.5 V  
Positive Connection to Remote  
Temperature Sensor  
Input Current, D– . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
1 mA  
ESD Rating, All Pins (Human Body Model) . . . . . . . . 2000 V  
Continuous Power Dissipation  
4
6
D–  
Negative Connection to Remote  
Temperature Sensor  
Up to 70°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 650 mW  
Derating above 70°C . . . . . . . . . . . . . . . . . . . . . 6.7 mW/°C  
Operating Temperature Range . . . . . . . . . . –55°C to +125°C  
Maximum Junction Temperature (TJ max) . . . . . . . . . . 150°C  
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C  
Lead Temperature, (Soldering 10 sec) . . . . . . . . . . . . . 300°C  
IR Reflow Peak Temperature . . . . . . . . . . . . . . . . . . . . . 220°C  
*Stresses above those listed under Absolute Maximum Ratings may cause perma-  
nent damage to the device. This is a stress rating only; functional operation of the  
device at these or any other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect device reliability.  
ADD1  
Three-State Logic Input, Higher  
Bit of Device Address  
7, 8  
10  
GND  
Supply 0 V Connection  
ADD0  
Three-State Logic Input, Lower  
Bit of Device Address  
11  
12  
ALERT  
Open-Drain Logic Output Used as  
Interrupt or SMBus Alert  
SDATA  
Logic Input/Output, SMBus Serial  
Data. Open-Drain Output.  
14  
15  
SCLK  
Logic Input, SMBus Serial Clock  
STBY  
Logic Input Selecting Normal  
Operation (High) or Standby Mode  
(Low)  
THERMAL CHARACTERISTICS  
16-Lead QSOP Package: θJA = 150°C/W.  
ORDERING GUIDE  
PIN CONFIGURATION  
Model  
Temperature Package  
Range Description  
Package  
Option  
1
2
3
4
5
6
7
8
16  
15  
NC  
NC  
V
STBY  
DD  
ADM1021AARQ  
0°C to 100°C 16-Lead QSOP RQ-16  
0°C to 100°C 16-Lead QSOP RQ-16  
0°C to 100°C 16-Lead QSOP RQ-16  
0°C to 100°C 16-Lead QSOP RQ-16  
14 SCLK  
13 NC  
D+  
D–  
ADM1021AARQ-REEL  
ADM1021AARQ-REEL7  
ADM1021AARQZ*  
ADM1021AARQZ-REEL* 0°C to 100°C 16-Lead QSOP RQ-16  
ADM1021AARQZ-REEL7* 0°C to 100°C 16-Lead QSOP RQ-16  
EVAL-ADM1021AEB  
ADM1021A  
TOP VIEW  
(Not to Scale)  
12 SDATA  
NC  
11  
ADD1  
GND  
GND  
ALERT  
10  
ADD0  
9 NC  
Evaluation Board  
NC = NO CONNECT  
* Z = Pb-Lead free  
tHD;STA  
tR  
tLOW  
tF  
SCL  
SDA  
tSU;STA  
tSU;STO  
tHD;STA  
tHIGH  
tHD;DAT  
tSU;DAT  
tBUF  
S
P
P
S
Figure 1. Diagram for Serial Bus Timing  
CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily  
accumulate on the human body and test equipment and can discharge without detection. Although the  
ADM1021A features proprietary ESD protection circuitry, permanent damage may occur on devices  
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended  
to avoid performance degradation or loss of functionality.  
REV. D  
–3–  
ADM1021A–Typical Performance Characteristics  
20  
15  
D+ TO GND  
2
1
10  
5
UPPER SPEC LEVEL  
DEV10  
0
0
–5  
–10  
–15  
D+ TO V  
DD  
–1  
–2  
–3  
LOWER SPEC LEVEL  
–20  
–25  
–30  
60  
70  
90  
TEMPERATURE – ؇C  
100  
50  
80  
110  
120  
1
10  
100  
LEAKAGE RESISTANCE – M  
TPC 1. Temperature Error vs. PC Board Track Resistance  
TPC 4. Temperature Error of ADM1021A vs. Pentium  
III Temperature  
5
14  
12  
4
10  
8
250mV p-p REMOTE  
3
6
4
2
2
100mV p-p REMOTE  
1
0
0
–1  
100  
1k  
10k  
100k  
1M  
10M  
100M  
2
4
6
8
10  
12  
14  
16  
18  
20  
22  
24  
FREQUENCY – Hz  
CAPACITANCE – nF  
TPC 2. Temperature Error vs. Power Supply Noise  
Frequency  
TPC 5. Temperature Error vs. Capacitance Between D+  
and D–  
9
70  
60  
100mV p-p  
8
7
6
50  
40  
5
4
V
= 3.3V  
DD  
30  
20  
3
50mV p-p  
2
1
10  
0
V
= 5V  
DD  
25mV p-p  
1M  
0
1
10  
100  
1k  
10k  
100k  
1
5
10  
25  
50  
75  
100 250 500 750 1000  
10M  
100M  
FREQUENCY – Hz  
SCLK FREQUENCY – kHz  
TPC 3. Temperature Error vs. Common-Mode Noise  
Frequency  
TPC 6. Standby Supply Current vs. Clock Frequency  
–4–  
REV. D  
ADM1021A  
4
3
2
1
0
100  
80  
60  
40  
20  
0
10mV p-p  
–20  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
100k  
1M  
10M  
FREQUENCY – Hz  
100M  
1G  
SUPPLY VOLTAGE – V  
TPC 7. Temperature Error vs. Differential-Mode Noise  
Frequency  
TPC 9. Standby Supply Current vs. Supply Voltage  
125  
550  
500  
REMOTE  
TEMPERATURE  
100  
450  
400  
350  
300  
250  
INT  
TEMPERATURE  
75  
50  
25  
0
200  
3.3V  
150  
5V  
100  
50  
0.0625  
0
1
2
3
4
5
6
7
8
9
10  
0.125  
0.25  
0.5  
1
2
4
8
TIME – Seconds  
CONVERSION RATE – Hz  
TPC 8. Operating Supply Current vs. Conversion Rate  
TPC 10. Response to Thermal Shock  
FUNCTIONAL DESCRIPTION  
On initial power-up, the remote and local temperature values  
default to –128°C. Since the device normally powers up converting,  
a measurement of local and remote temperature is made and these  
values are then stored before a comparison with the stored limits  
is made. However, if the part is powered up in standby mode  
(STBY pin pulled low), no new values are written to the register  
before a comparison is made. As a result, both RLOW and LLOW  
are tripped in the Status Register, thus generating an ALERT out-  
put. This may be cleared in one of two ways:  
The ADM1021A contains a two-channel A-to-D converter with  
special input-signal conditioning to enable operation with remote and  
on-chip diode temperature sensors. When the ADM1021A is operat-  
ing normally, the A-to-D converter operates in a free-running mode.  
The analog input multiplexer alternately selects either the on-chip  
temperature sensor to measure its local temperature, or the remote  
temperature sensor. These signals are digitized by the ADC and  
the results stored in the Local and Remote Temperature Value  
Registers as 8-bit, twos complement words.  
1. Change both the local and remote lower limits to –128°C  
and read the status register (which in turn clears the ALERT  
output).  
The measurement results are compared with local and remote,  
high and low temperature limits, stored in four on-chip registers.  
Out-of-limit comparisons generate flags that are stored in the  
status register, and one or more out-of-limit results will cause  
the ALERT output to pull low.  
2. Take the part out of standby and read the status register  
(which in turn clears the ALERT output). This will work only  
if the measured values are within the limit values.  
The limit registers can be programmed, and the device con-  
trolled and configured, via the serial System Management Bus.  
The contents of any register can also be read back via the SMBus.  
MEASUREMENT METHOD  
A simple method of measuring temperature is to exploit the  
negative temperature coefficient of a diode, or the base-emitter  
voltage of a transistor, operated at constant current. Unfortu-  
nately, this technique requires calibration to null out the effect  
of the absolute value of VBE, which varies from device to device.  
Control and configuration functions consist of:  
Switching the device between normal operation and standby  
mode.  
Masking or enabling the ALERT output.  
Selecting the conversion rate.  
REV. D  
–5–  
ADM1021A  
V
DD  
I
N 
؋
 I  
I
BIAS  
V
D+  
C1*  
D–  
OUT+  
TO ADC  
REMOTE  
SENSING  
TRANSISTOR  
V
OUT–  
BIAS  
DIODE  
LOWPASS FILTER  
fC = 65kHz  
*CAPACITOR C1 IS OPTIONAL. IT IS ONLY NECESSARY IN NOISY ENVIRONMENTS.  
C1 = 2.2nF TYPICAL, 3nF MAX.  
Figure 2. Input Signal Conditioning  
The technique used in the ADM1021A is to measure the change  
in VBE when the device is operated at two different currents.  
for the ADM1021. The main reason for this is to improve  
the noise immunity of the part.  
This is given by:  
2. As a result of the greater Remote Sensor Source Current the  
operating current of the ADM1021A is higher than that of  
the ADM1021, typically 205 mA versus 160 mA.  
VBE = KT/q × ln(N)  
where:  
3. The temperature measurement range of the ADM1021A is  
0°C to 127°C, compared with –128°C to +127°C for the  
ADM1021. As a result, the ADM1021 should be used if  
negative temperature measurement is required.  
K is Boltzmann’s constant,  
q is charge on the electron (1.6 × 10–19 coulombs),  
T is absolute temperature in kelvins,  
N is ratio of the two currents.  
4. The power-on reset values of the remote and local tempera-  
ture values are –128°C in the ADM1021A as compared with  
0°C in the ADM1021. As the part is powered up converting  
(except when the part is in standby mode, i.e., Pin 15 is  
pulled low) the part will measure the actual values of remote  
and local temperature and write these to the registers.  
Figure 2 shows the input signal conditioning used to measure the  
output of an external temperature sensor. This figure shows the  
external sensor as a substrate transistor, provided for tempera-  
ture monitoring on some microprocessors, but it could equally  
well be a discrete transistor. If a discrete transistor is used, the  
collector will not be grounded and should be linked to the base.  
To prevent ground noise interfering with the measurement, the  
more negative terminal of the sensor is not referenced to ground,  
but is biased above ground by an internal diode at the D– input.  
If the sensor is operating in a noisy environment, C1 may optionally  
be added as a noise filter. Its value is typically 2200 pF, but should  
be no more than 3000 pF. See the section on layout considerations  
for more information on C1.  
5. The four MSBs of the Revision Register may be used to  
identify the part. The ADM1021 Revision Register reads  
0xh and the ADM1021A reads 3xh.  
6. The power-on default value of the Address Pointer Register  
is undefined in the ADM1021A and is equal to 00h in the  
ADM1021. As a result, a value must be written to the Address  
Pointer Register before a read is done in the ADM1021A.  
The ADM1021 is capable of reading back local temperature  
without writing to the Address Pointer Register as it defaulted  
to the local temperature measurement register at power-up.  
To measure VBE, the sensor is switched between operating currents  
of I and N × I. The resulting waveform is passed through a 65 kHz  
low-pass filter to remove noise, then to a chopper-stabilized ampli-  
fier that performs the functions of amplification and rectification of  
the waveform to produce a dc voltage proportional to VBE. This  
voltage is measured by the ADC to give a temperature output in  
8-bit twos complement format. To reduce the effects of noise  
further, digital filtering is performed by averaging the results of  
16 measurement cycles.  
7. Setting the mask bit (Bit 7 Config Reg) on the ADM1021A  
will mask current and future ALERTs. On the ADM1021  
the mask bit will only mask future ALERTs. Any current  
ALERT will have to be cleared using an ARA.  
TEMPERATURE DATA FORMAT  
One LSB of the ADC corresponds to 1°C, so the ADC can theo-  
retically measure from –128°C to +127°C, although the device  
does not measure temperatures below 0°C so the actual range is  
0°C to 127°C. The temperature data format is shown in Table I.  
Signal conditioning and measurement of the internal tempera-  
ture sensor is performed in a similar manner.  
The results of the local and remote temperature measurements  
are stored in the local and remote temperature value registers,  
and are compared with limits programmed into the local and  
remote high and low limit registers.  
DIFFERENCES BETWEEN THE ADM1021 AND THE  
ADM1021A  
Although the ADM1021A is pin-for-pin compatible with the  
ADM1021, there are some differences between the two devices.  
Below is a summary of these differences and reasons for the changes.  
1. The ADM1021A forces a larger current through the remote  
temperature sensing diode, typically 205 µA versus 90 µA  
REV. D  
–6–  
ADM1021A  
Table I. Temperature Data Format  
Value Registers  
The ADM1021A has two registers to store the results of local  
and remote temperature measurements. These registers are  
written to by the ADC and can only be read over the SMBus.  
Temperature  
Digital Output  
0°C  
1°C  
0 000 0000  
0 000 0001  
0 000 1010  
0 001 1001  
0 011 0010  
0 100 1011  
0 110 0100  
0 111 1101  
0 111 1111  
Status Register  
10°C  
25°C  
50°C  
75°C  
100°C  
125°C  
127°C  
Bit 7 of the Status Register indicates when it is high that the  
ADC is busy converting. Bits 5 to 3 are flags that indicate the  
results of the limit comparisons.  
If the local and/or remote temperature measurement is above the  
corresponding high temperature limit or below the corresponding  
low temperature limit, then one or more of these flags will be set.  
Bit 2 is a flag that is set if the remote temperature sensor is open-  
circuit. These five flags are NOR’d together, so that if any of them  
is high, the ALERT interrupt latch will be set and the ALERT  
output will go low. Reading the Status Register will clear the five  
flag bits, provided the error conditions that caused the flags to be  
set have gone away. While a limit comparator is tripped due to a  
value register containing an out-of-limit measurement, or the sen-  
sor is open-circuit, the corresponding flag bit cannot be reset. A  
flag bit can only be reset if the corresponding value register con-  
tains an in-limit measurement, or the sensor is good.  
REGISTERS  
The ADM1021A contains nine registers that are used to store  
the results of remote and local temperature measurements,  
high and low temperature limits, and to configure and control  
the device. A description of these registers follows, and further  
details are given in Tables II to IV. It should be noted that the  
ADM1021A’s registers are dual port, and have different addresses  
for read and write operations. Attempting to write to a read address,  
or to read from a write address, will produce an invalid result.  
Register addresses above 0Fh are reserved for future use or used  
for factory test purposes and should not be written to.  
Table II. Status Register Bit Assignments  
Bit  
Name  
Function  
Address Pointer Register  
7
BUSY  
1 When ADC Converting  
The Address Pointer Register itself does not have, nor does it  
require, an address, as it is the register to which the first data  
byte of every write operation is written automatically. This data  
byte is an address pointer that sets up one of the other registers  
for the second byte of the write operation, or for a subsequent  
read operation.  
6
5
4
3
2
1–0  
LHIGH*  
LLOW*  
RHIGH*  
RLOW*  
OPEN*  
1 When Local High Temp Limit Tripped  
1 When Local Low Temp Limit Tripped  
1 When Remote High Temp Limit Tripped  
1 When Remote Low Temp Limit Tripped  
1 When Remote Sensor Open-Circuit  
Reserved  
*These flags stay high until the status register is read or they are reset by POR.  
Table III. List of ADM1021A Registers  
READ Address (Hex)  
WRITE Address (Hex)  
Name  
Power-On Default  
Not Applicable  
00  
01  
02  
Not Applicable  
Not Applicable  
Not Applicable  
Not Applicable  
Address Pointer  
Local Temp. Value  
Remote Temp. Value  
Status  
Undefined  
1000 0000 (80h) (–128°C)  
1000 0000 (80h) (–128°C)  
Undefined  
03  
04  
05  
06  
07  
08  
09  
0A  
0B  
0C  
Configuration  
Conversion Rate  
Local Temp. High Limit  
Local Temp. Low Limit  
Remote Temp. High Limit  
Remote Temp. Low Limit  
One-Shot  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Manufacturer Device ID  
Die Revision Code  
0000 0000 (00h)  
0000 0010 (02h)  
0111 1111 (7Fh) (+127°C)  
1100 1001 (C9h) (–55°C)  
0111 1111 (7Fh) (+127°C)  
1100 1001 (C9h) (–55°C)  
0D  
0E  
Not Applicable  
0F1  
10  
11  
12  
13  
14  
15  
17  
19  
20  
FE  
FF  
Not Applicable  
11  
12  
13  
14  
16  
18  
Not Applicable  
21  
Not Applicable  
Not Applicable  
Undefined2  
Undefined2  
Undefined2  
Undefined2  
Undefined2  
Undefined2  
Undefined2  
Undefined2  
Undefined2  
0100 0001 (41h)  
0011 xxxx (3xh)  
NOTES  
1Writing to address 0F causes the ADM1021A to perform a single measurement. It is not a data register as such and it does not matter what data is written to it.  
2These registers are reserved for future versions of the device.  
REV. D  
–7–  
ADM1021A  
The ALERT interrupt latch is not reset by reading the Status  
Register, but will be reset when the ALERT output has been  
serviced by the master reading the device address, provided the  
error condition has gone away and the Status Register flag bits  
have been reset.  
One-Shot Register  
The one-shot register is used to initiate a single conversion and  
comparison cycle when the ADM1021A is in standby mode,  
after which the device returns to standby. This is not a data  
register as such and it is the write operation that causes the one-  
shot conversion. The data written to this address is irrelevant and  
is not stored.  
Configuration Register  
Two bits of the configuration register are used. If Bit 6 is 0, which  
is the power-on default, the device is in operating mode with the  
ADC converting. If Bit 6 is set to 1, the device is in standby  
mode and the ADC does not convert. Standby mode can also  
be selected by taking the STBY pin low. In standby mode the val-  
ues stored in the Remote and Local Temperature Registers remain  
at the value they were when the part was placed in standby.  
SERIAL BUS INTERFACE  
Control of the ADM1021A is carried out via the serial bus. The  
ADM1021A is connected to this bus as a slave device, under the  
control of a master device. Note that the SMBus and SCL pins  
are three-stated when the ADM1021A is powered down and will  
not pull down the SMBus.  
Bit 7 of the configuration register is used to mask the ALERT out-  
put. If Bit 7 is 0, which is the power-on default, the ALERT output  
is enabled. If Bit 7 is set to 1, the ALERT output is disabled.  
ADDRESS PINS  
In general, every SMBus device has a 7-bit device address (except  
for some devices that have extended, 10-bit addresses). When  
the master device sends a device address over the bus, the slave  
device with that address will respond. The ADM1021A has two  
address pins, ADD0 and ADD1, to allow selection of the device  
address, so that several ADM1021As can be used on the same  
bus, and/or to avoid conflict with other devices. Although only  
two address pins are provided, these are three-state, and can be  
grounded, left unconnected, or tied to VDD, so that a total of  
nine different addresses are possible, as shown in Table VI.  
Table IV. Configuration Register Bit Assignments  
Power-On  
Default  
Bit  
Name  
Function  
7
MASK1  
0 = ALERT Enabled  
1 = ALERT Masked  
0 = Run  
1 = Standby  
Reserved  
0
6
RUN/STOP  
0
0
5–0  
It should be noted that the state of the address pins is only sampled  
at power-up, so changing them after power-up will have no effect.  
Conversion Rate Register  
The lowest three bits of this register are used to program the con-  
version rate by dividing the ADC clock by 1, 2, 4, 8, 16, 32, 64,  
or 128, to give conversion times from 125 ms (Code 07h) to 16  
seconds (Code 00h). This register can be written to and read back  
over the SMBus. The higher five bits of this register are unused  
and must be set to zero. Use of slower conversion times greatly  
reduces the device power consumption, as shown in Table V.  
Table VI. Device Addresses  
ADD0  
ADD1  
Device Address  
0
0
0
NC  
NC  
NC  
1
1
1
0
NC  
1
0
NC  
1
0
NC  
1
0011 000  
0011 001  
0011 010  
0101 001  
0101 010  
0101 011  
1001 100  
1001 101  
1001 110  
Table V. Conversion Rate Register Codes  
Average Supply Current  
µA Typ at VCC = 3.3 V  
Data  
Conversion/sec  
00h  
0.0625  
150  
150  
150  
150  
150  
150  
160  
180  
01h  
02h  
0.125  
0.25  
ADD0, ADD1 sampled at power-up only.  
03h  
0.5  
The serial bus protocol operates as follows:  
04h  
05h  
1
2
1. The master initiates data transfer by establishing a START  
condition, defined as a high-to-low transition on the serial  
data line SDATA, while the serial clock line SCLK remains  
high. This indicates that an address/data stream will follow.  
All slave peripherals connected to the serial bus respond to  
the START condition and shift in the next eight bits, consisting  
of a 7-bit address (MSB first) plus an R/W bit, which deter-  
mines the direction of the data transfer, i.e., whether data  
will be written to or read from the slave device.  
06h  
4
07h  
08h to FFh  
8
Reserved  
Limit Registers  
The ADM1021A has four limit registers to store local and remote,  
high and low temperature limits. These registers can be written  
to and read back over the SMBus. The high limit registers  
perform a > comparison while the low limit registers perform a  
< comparison. For example, if the high limit register is pro-  
grammed as a limit of 80°C, measuring 81°C will result in an  
alarm condition. Even though the temperature measurement  
range is from 0؇ to 127°C, it is possible to program the limit  
register with negative values. This is for backwards-compatibility  
with the ADM1021.  
The peripheral whose address corresponds to the transmitted  
address responds by pulling the data line low during the low  
period before the ninth clock pulse, known as the Acknowl-  
edge Bit. All other devices on the bus now remain idle while  
the selected device waits for data to be read from or written  
to it. If the R/W bit is a 0, the master will write to the slave  
device. If the R/W bit is a 1, the master will read from the  
slave device.  
REV. D  
–8–  
ADM1021A  
2. Data is sent over the serial bus in sequences of nine clock  
pulses, eight bits of data followed by an Acknowledge Bit  
from the slave device. Transitions on the data line must occur  
during the low period of the clock signal and remain stable  
during the high period, as a low-to-high transition when the  
clock is high may be interpreted as a stop signal. The number  
of data bytes that can be transmitted over the serial bus in a  
single read or write operation is limited only by what the  
master and slave devices can handle.  
Any number of bytes of data may be transferred over the serial  
bus in one operation, but it is not possible to mix read and write  
in one operation, because the type of operation is determined at  
the beginning and cannot subsequently be changed without  
starting a new operation.  
In the case of the ADM1021A, write operations contain either  
one or two bytes, while read operations contain one byte.  
To write data to one of the device data registers or read data  
from it, the Address Pointer Register must be set so that the  
correct data register is addressed, data can then be written into  
that register or read from it. The first byte of a write operation  
always contains a valid address that is stored in the Address  
Pointer Register. If data is to be written to the device, the write  
operation contains a second data byte that is written to the reg-  
ister selected by the address pointer register.  
3. When all data bytes have been read or written, stop conditions  
are established. In write mode, the master will pull the data line  
high during the 10th clock pulse to assert a stop condition. In  
read mode, the master device will override the acknowledge bit  
by pulling the data line high during the low period before the  
ninth clock pulse. This is known as No Acknowledge. The  
master will then take the data line low during the low period  
before the 10th clock pulse, then high during the 10th clock  
pulse to assert a stop condition.  
9
1
9
1
SCLK  
D6  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
D7  
D5  
D4  
D3  
D2  
D1  
SDATA  
START BY  
D0  
R/W  
ACK. BY  
ACK. BY  
ADM1021A  
MASTER  
ADM1021A  
FRAME 2  
FRAME 1  
SERIAL BUS ADDRESS BYTE  
ADDRESS POINTER REGISTER BYTE  
1
9
SCL (CONTINUED)  
SDA (CONTINUED)  
D5  
D4  
D3  
D2  
D1  
D7  
D6  
D0  
ACK. BY  
STOP BY  
MASTER  
ADM1021A  
FRAME 3  
DATA BYTE  
Figure 3. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register  
1
9
1
9
SCLK  
A1  
A0  
A3  
A2  
A6  
D7  
D6  
D4  
D2  
SDATA  
A5  
A4  
D5  
D3  
D1  
D0  
R/W  
START BY  
MASTER  
ACK. BY  
ADM1021A  
ACK. BY  
ADM1021A  
STOP BY  
MASTER  
FRAME 1  
SERIAL BUS ADDRESS BYTE  
FRAME 2  
ADDRESS POINTER REGISTER BYTE  
Figure 4. Writing to the Address Pointer Register Only  
1
9
9
1
SCLK  
D6  
D5  
D2  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
D7  
D4  
D3  
D1  
D0  
SDATA  
START BY  
R/W  
ACK. BY  
NO ACK.  
BY MASTER  
STOP BY  
MASTER  
MASTER  
ADM1021A  
FRAME 1  
SERIAL BUS ADDRESS BYTE  
FRAME 2 DATA BYTE FROM ADM1021A  
Figure 5. Reading Data from a Previously Selected Register  
–9–  
REV. D  
ADM1021A  
This is illustrated in Figure 3. The device address is sent over  
the bus followed by R/W set to 0. This is followed by two data  
bytes. The first data byte is the address of the internal data reg-  
ister to be written to, which is stored in the Address Pointer  
Register. The second data byte is the data to be written to the  
internal data register.  
1. SMBALERT is pulled low.  
2. Master initiates a read operation and sends the Alert Response  
Address (ARA = 0001 100). This is a general call address  
that must not be used as a specific device address.  
3. The device whose ALERT output is low responds to the Alert  
Response Address and the master reads its device address. The  
address of the device is now known and it can be interrogated  
in the usual way.  
When reading data from a register there are two possibilities:  
1. If the ADM1021A’s Address Pointer Register value is unknown  
or not the desired value, it is first necessary to set it to the  
correct value before data can be read from the desired data  
register. This is done by performing a write to the ADM1021A  
as before, but only the data byte containing the register read  
address is sent, as data is not to be written to the register.  
This is shown in Figure 4.  
4. If more than one device’s ALERT output is low, the one with  
the lowest device address will have priority, in accordance with  
normal SMBus arbitration.  
5. Once the ADM1021A has responded to the Alert Response  
Address, it will reset its ALERT output, provided that the  
error condition that caused the ALERT no longer exists. If  
the SMBALERT line remains low, the master will send the  
ARA again, and so on until all devices whose ALERT outputs  
were low have responded.  
A read operation is then performed consisting of the serial  
bus address, R/W bit set to 1, followed by the data byte read  
from the data register. This is shown in Figure 5.  
2. If the Address Pointer Register is known to be already at the  
desired address, data can be read from the corresponding data  
register without first writing to the Address Pointer Register,  
so Figure 4 can be omitted.  
LOW POWER STANDBY MODES  
The ADM1021A can be put into a low power standby mode  
using hardware or software, that is, by taking the STBY input  
low, or by setting Bit 6 of the Configuration Register. When  
STBY is high, or Bit 6 is low, the ADM1021A operates normally.  
When STBY is pulled low or Bit 6 is high, the ADC is inhibited,  
so any conversion in progress is terminated without writing the  
result to the corresponding value register.  
NOTES  
1. Although it is possible to read a data byte from a data register  
without first writing to the Address Pointer Register, if the  
Address Pointer Register is already at the correct value, it is  
not possible to write data to a register without writing to the  
Address Pointer Register, because the first data byte of a  
write is always written to the Address Pointer Register.  
The SMBus is still enabled. Power consumption in the standby  
mode is reduced to less than 10 µA if there is no SMBus activity,  
or 100 µA if there are clock and data signals on the bus.  
2. Remember that the ADM1021A registers have different  
addresses for read and write operations. The write address  
of a register must be written to the Address Pointer if data  
is to be written to that register, but it is not possible to read  
data from that address. The read address of a register must  
be written to the Address Pointer before data can be read  
from that register.  
These two modes are similar but not identical. When STBY is  
low, conversions are completely inhibited. When Bit 6 is set but  
STBY is high, a one-shot conversion of both channels can be initi-  
ated by writing XXh to the One-Shot Register (address 0Fh).  
SENSOR FAULT DETECTION  
The ADM1021A has a fault detector at the D+ input that detects  
if the external sensor diode is open-circuit. This is a simple  
voltage comparator that trips if the voltage at D+ exceeds  
VCC – 1 V (typical). The output of this comparator is checked  
when a conversion is initiated, and sets Bit 2 of the Status Register  
if a fault is detected.  
ALERT OUTPUT  
The ALERT output goes low whenever an out-of-limit mea-  
surement is detected, or if the remote temperature sensor is  
open-circuit. It is an open-drain and requires a 10 kpull-up to  
VDD. Several ALERT outputs can be wire-ANDed together, so  
that the common line will go low if one or more of the ALERT  
outputs goes low.  
If the remote sensor voltage falls below the normal measuring  
range, for example due to the diode being short-circuited, the  
ADC will output –128°C (1000 0000). Since the normal operat-  
ing temperature range of the device only extends down to 0°C,  
this output code will never be seen in normal operation, so it  
can be interpreted as a fault condition.  
The ALERT output can be used as an interrupt signal to a pro-  
cessor, or it may be used as an SMBALERT. Slave devices on  
the SMBus can normally not signal to the master that they want  
to talk, but the SMBALERT function allows them to do so.  
In this respect, the ADM1021A differs from and improves upon  
competitive devices that output zero if the external sensor goes  
short-circuit. These devices can misinterpret a genuine 0°C  
measurement as a fault condition.  
One or more ALERT outputs are connected to a common  
SMBALERT line connected to the master. When the SMBALERT  
line is pulled low by one of the devices, the following procedure  
occurs as illustrated in Figure 6.  
If the external diode channel is not being used and is shorted  
out, the resulting ALERT may be cleared by writing 80h (–128°C)  
to the low limit register.  
MASTER  
RECEIVES  
SMBALERT  
NO  
ACK  
START ALERT RESPONSE ADDRESS  
ACK DEVICE ADDRESS  
STOP  
RD  
MASTER SENDS  
ARA AND READ  
COMMAND  
DEVICE SENDS  
ITS ADDRESS  
Figure 6. Use of SMBALERT  
REV. D  
–10–  
ADM1021A  
APPLICATIONS INFORMATION  
LAYOUT CONSIDERATIONS  
FACTORS AFFECTING ACCURACY  
Digital boards can be electrically noisy environments, and because  
the ADM1021A is measuring very small voltages from the  
remote sensor, care must be taken to minimize noise induced at  
the sensor inputs. The following precautions should be taken:  
Remote Sensing Diode  
The ADM1021A is designed to work with substrate transistors  
built into processors, or with discrete transistors. Substrate  
transistors will generally be PNP types with the collector connected  
to the substrate. Discrete types can be either PNP or NPN,  
connected as a diode (base shorted to collector). If an NPN  
transistor is used, the collector and base are connected to D+ and  
the emitter to D–. If a PNP transistor is used, the collector and  
base are connected to D– and the emitter to D+.  
1. Place the ADM1021A as close as possible to the remote  
sensing diode. Provided that the worst noise sources such as  
clock generators, data/address buses, and CRTs are avoided,  
this distance can be four to eight inches.  
2. Route the D+ and D– tracks close together, in parallel, with  
grounded guard tracks on each side. Provide a ground plane  
under the tracks if possible.  
The user has no choice in the case of substrate transistors, but if  
a discrete transistor is used, the best accuracy will be obtained  
by choosing devices according to the following criteria:  
3. Use wide tracks to minimize inductance and reduce noise pickup.  
10 mil track minimum width and spacing is recommended.  
1. Base-emitter voltage greater than 0.25 V at 6 µA, at the high-  
4. Try to minimize the number of copper/solder joints, which  
can cause thermocouple effects. Where copper/solder joints  
are used, make sure that they are in both the D+ and D– paths  
and at the same temperature.  
est operating temperature.  
2. Base-emitter voltage less than 0.95 V at 100 µA, at the lowest  
operating temperature.  
3. Base resistance less than 100 .  
Thermocouple effects should not be a major problem as 1°C  
corresponds to about 240 µV, and thermocouple voltages are  
about 3 µV/°C of temperature difference. Unless there are  
two thermocouples with a big temperature differential between  
them, thermocouple voltages should be much less than 240 µV.  
4. Small variation in hFE (say 50 to 150), which indicates tight  
control of VBE characteristics.  
Transistors such as 2N3904, 2N3906, or equivalents in SOT-23  
package are suitable devices to use.  
5. Place a 0.1 µF bypass capacitor close to the VDD pin, and  
2200 pF input filter capacitors across D+, D– close to the  
ADM1021A.  
Thermal Inertia and Self-Heating  
Accuracy depends on the temperature of the remote-sensing  
diode and/or the internal temperature sensor being at the same  
temperature as that being measured, and a number of factors  
can affect this. Ideally, the sensor should be in good thermal con-  
tact with the part of the system being measured, for example the  
processor. If it is not, the thermal inertia caused by the mass of  
the sensor will cause a lag in the response of the sensor to a tem-  
perature change. In the case of the remote sensor this should not  
be a problem, as it will be either a substrate transistor in the pro-  
cessor or a small package device such as SOT-23 placed in close  
proximity to it.  
GND  
D+  
10 mil  
10 mil  
10 mil  
10 mil  
D–  
10 mil  
10 mil  
GND  
10 mil  
The on-chip sensor, however, will often be remote from the  
processor and will only be monitoring the general ambient tem-  
perature around the package. The thermal time constant of the  
QSOP-16 package is about 10 seconds.  
Figure 7. Arrangement of Signal Tracks  
6. If the distance to the remote sensor is more than eight inches,  
the use of twisted pair cable is recommended. This will work  
up to about 6 to 12 feet.  
In practice, the package will have electrical, and hence thermal,  
connection to the printed circuit board, so the temperature rise  
due to self-heating will be negligible.  
REV. D  
–11–  
ADM1021A  
The SCLK and SDATA pins of the ADM1021A can be inter-  
faced directly to the SMBus of an I/O chip. Figure 9 shows how  
the ADM1021A might be integrated into a system using this  
type of I/O controller.  
7. For really long distances (up to 100 feet), use shielded twisted  
pair such as Belden #8451 microphone cable. Connect the  
twisted pair to D+ and D– and the shield to GND close to  
the ADM1021A. Leave the remote end of the shield uncon-  
nected to avoid ground loops.  
V
3.3V  
Because the measurement technique uses switched current sources,  
excessive cable and/or filter capacitance can affect the measure-  
ment. When using long cables, the filter capacitor may be  
reduced or removed.  
DD  
ADM1021A  
0.1F  
ALL 10k⍀  
STBY  
D+  
D–  
IN  
SCLK  
SDATA  
ALERT  
C1*  
TO CONTROL  
CHIP  
I/O  
OUT  
2N3904  
Cable resistance can also introduce errors. 1 series resistance  
introduces about 1°C error.  
SHIELD  
ADD0  
ADD1  
SET TO REQUIRED  
ADDRESS  
*C1 IS OPTIONAL  
GND  
APPLICATION CIRCUITS  
Figure 8 shows a typical application circuit for the ADM1021A,  
using a discrete sensor transistor connected via a shielded,  
twisted pair cable. The pull-ups on SCLK, SDATA, and ALERT  
are required only if they are not already provided elsewhere in  
the system.  
Figure 8. Typical Application Circuit  
PROCESSOR  
D–  
D+  
ADM1021A  
SYSTEM BUS  
SDATA  
SCLK  
ALERT  
SYSTEM  
MEMORY  
DISPLAY  
GMCH  
DISPLAY  
CACHE  
PCI SLOTS  
HARD  
CD ROM DISK  
PCI BUS  
ICH  
I/O CONTROLLER  
HUB  
2 IDE PORTS  
SMBUS  
SUPER  
I/O  
USB USB  
2 USB PORTS  
FWH  
(FIRMWARE HUB)  
Figure 9. Typical System Using ADM1021A  
REV. D  
–12–  
ADM1021A  
OUTLINE DIMENSIONS  
16-Lead Shrink Small Outline Package [QSOP]  
(RQ-16)  
Dimensions shown in inches  
0.193  
BSC  
16  
1
9
8
0.154  
BSC  
0.236  
BSC  
PIN 1  
0.069  
0.053  
0.065  
0.049  
8؇  
0؇  
0.010  
0.004  
0.012  
0.008  
0.025  
BSC  
0.050  
0.016  
SEATING  
PLANE  
0.010  
0.006  
COPLANARITY  
0.004  
COMPLIANT TO JEDEC STANDARDS MO-137AB  
REV. D  
–13–  
ADM1021A  
Revision History  
Location  
Page  
3/04—Data Sheet changed from REV. C to REV. D.  
Changes to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Updated Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Change to Figure 9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
4/03—Data Sheet changed from REV. B to REV. C.  
Added ESD Caution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
3/02—Data Sheet changed from REV. A to REV. B.  
Figures and TPCs renumbered . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UNIVERSAL  
Text Change to Figure 9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Change to SERIAL BUS INTERFACE section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
REV. D  
–14–  
–15–  
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