AD8643TRZ-EP-R7 [ADI]
Low Power, Rail-to-Rail Output, Precision JFET Quad Amplifier;
| 型号： | AD8643TRZ-EP-R7 |
| 厂家： | 
ADI |
| 描述： | Low Power, Rail-to-Rail Output, Precision JFET Quad Amplifier 放大器 光电二极管 |
| 文件： | 总12页 (文件大小：236K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Power, Rail-to-Rail,
Output Precision JFET Amplifier
AD8643-EP
PIN CONFIGURATION
FEATURES
Low supply current: 250 μA maximum
Very low input bias current: 1 pA maximum
Low offset voltage: 750 μV maximum
Single-supply operation: 5 V to 26 V
Dual-supply operation: 2.5 V to 13 V
Rail-to-rail output
OUT A
–IN A
+IN A
V+
1
2
3
4
5
6
7
14 OUT D
13 –IN D
12 +IN D
11 V–
AD8643-EP
TOP VIEW
(Not to Scale)
+IN B
–IN B
OUT B
10 +IN C
9
8
–IN C
Unity-gain stable
No phase reversal
OUT C
Figure 1. 14-Lead SOIC (R-14)
ENHANCED PRODUCT FEATURES
Supports defense and aerospace applications
(AQEC standard)
Military temperature range (−55°C to +125°C)
Controlled manufacturing baseline
1 assembly/test site
1 fabrication site
Enhanced product change notification
Qualification data available on request
APPLICATIONS
Line-/battery-powered instruments
Photodiode amplifiers
Precision current sensing
Precision filters
Portable audio
GENERAL DESCRIPTION
The AD8643-EP is a low power, precision JFET input amplifier
featuring extremely low input bias current and rail-to-rail output.
The ability to swing nearly rail-to-rail at the input and rail-to-rail at
the output enables designers to buffer CMOS digital-to-analog
converters (DACs), ASICs, and other wide output swing devices
in single-supply systems. The outputs remain stable with capacitive
loads of more than 500 pF.
The AD8643-EP is suitable for applications using multichannel
boards that require low power to manage heat. Other applications
include photodiodes and battery management.
The AD8643-EP is fully specified over the military temperature
range of −55°C to +125°C. This device is available in a 14-lead SOIC.
Additional applications information is available in the AD8643
data sheet.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2011 Analog Devices, Inc. All rights reserved.
AD8643-EP
TABLE OF CONTENTS
Features .............................................................................................. 1
Electrical Characteristics..............................................................3
Absolute Maximum Ratings ............................................................5
Thermal Resistance.......................................................................5
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Outline Dimensions....................................................................... 12
Ordering Guide .......................................................................... 12
Enhanced Product Features ............................................................ 1
Applications....................................................................................... 1
Pin Configuration............................................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
REVISION HISTORY
1/11—Revision 0: Initial Version
Rev. 0 | Page 2 of 12
AD8643-EP
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VS = 5.0 V, VCM = 2.5 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
50
1000
1.8
1.9
1
μV
−55°C < TA < +85°C
+85°C < TA < +125°C, VCM = 1.5 V
mV
mV
pA
Input Bias Current
IB
0.25
−55°C < TA < +125°C
−55°C < TA < +125°C
180
0.5
60
pA
pA
pA
Input Offset Current
IOS
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift
0
74
80
3
V
dB
V/mV
μV/°C
CMRR
AVO
ΔVOS/ΔT
VCM = 0 V to 2.5 V
RL = 10 kΩ, VO = 0.5 to 4.5 V
−55°C < TA < +125°C
93
140
2.5
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
VOL
IOUT
4.95
4.94
V
V
V
V
IL = 1 mA, −55°C to +125°C
IL = 1 mA, −55°C to +125°C
Output Voltage Low
0.05
0.05
0.01
6
Output Current
mA
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
PSRR
ISY
VS = 5 V to 26 V
90
107
195
dB
μA
μA
250
270
−55°C < TA < +125°C
DYNAMIC PERFORMANCE
Slew Rate
SR
2
V/μs
Gain Bandwidth Product
Phase Margin
GBP
Øm
2.5
50
MHz
Degrees
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
eN p-p
eN
iN
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
4.0
28.5
0.5
μV p-p
nV/√Hz
fA/√Hz
Rev. 0 | Page 3 of 12
AD8643-EP
VS= 13 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
Symbol
Test Conditions/Comments
Min
Typ
70
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
IB
1000
1.8
1
260
0.5
65
μV
mV
pA
pA
pA
−55° < TA < +125°C
–55°C < TA < +125°C
−55°C < TA < +125°C
Input Bias Current
0.25
Input Offset Current
IOS
pA
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift
−13
90
215
+10
V
dB
V/mV
μV/°C
CMRR
AVO
ΔVOS/ΔT
VCM = −13 V to +10 V
RL = 10 kΩ, VO = –11 V to +11 V
−55°C < TA < +125°C
107
290
2.5
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
VOL
IOUT
12.95
12.94
V
V
V
V
IL = 1 mA, −55°C to +125°C
IL = 1 mA, −55°C to +125°C
Output Voltage Low
−12.95
−12.94
Output Current
12
mA
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
PSRR
ISY
VS = 2.5 V to 13 V
−55°C < TA < +125°C
90
107
200
dB
μA
μA
290
330
DYNAMIC PERFORMANCE
Slew Rate
SR
3
V/μs
Gain Bandwidth Product
Phase Margin
GBP
Øm
3.5
60
MHz
Degrees
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
eN p-p
eN
iN
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
4.2
27.5
0.5
μV p-p
nV/√Hz
fA/√Hz
Rev. 0 | Page 4 of 12
AD8643-EP
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Absolute maximum ratings apply at 25°C, unless otherwise noted.
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3.
Parameter
Rating
Table 4. Thermal Resistance
Supply Voltage
27.3 V
Input Voltage
V− to V+
Package Type
θJA
θJC
Unit
Differential Input Voltage
Output Short-Circuit Duration
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
Supply Voltage
Indefinite
−65°C to +150°C
−55°C to +125°C
−65°C to +150°C
300°C
14-Lead SOIC (R)
120
36
°C/W
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. 0 | Page 5 of 12
AD8643-EP
TYPICAL PERFORMANCE CHARACTERISTICS
80
20
18
16
14
12
10
8
V
= 5V
= 1.5V
V
= ±13V
SY
SY
V
CM
70
60
50
40
30
20
6
4
10
0
2
0
T
V
(μV/°C)
OS
C
V
(mV)
OS
Figure 2. Input Offset Voltage
Figure 5. Offset Voltage Drift
16
14
12
10
8
4.5
V
= ±13V
SY
V
= ±13V
= 25°C
SY
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
T
A
6
4
2
0
–0.5
–15 –13 –11 –9 –7 –5 –3 –1
1
3
5
7
9
11 13 15
OFFSET VOLTAGE (μV/°C)
V
(V)
CM
Figure 6. Input Bias Current vs. VCM
Figure 3. Offset Voltage Drift
1000
100
10
70
60
50
40
30
20
10
0
V
= ±13V
V
= ±2.5V
SY
SY
1
0.1
0
25
50
75
100
125
150
TEMPERATURE (°C)
V
(mV)
OS
Figure 7. Input Bias Current vs. Temperature
Figure 4. Input Offset Voltage
Rev. 0 | Page 6 of 12
AD8643-EP
1.0
0.8
10M
1M
V
= +5V OR ±5V
SY
0.6
0.4
0.2
V
= ±13V
SY
0
–0.2
–0.4
–0.6
–0.8
–1.0
100k
10k
V
= ±2.5V
SY
–5
–4
–3
–2
–1
0
1
2
3
4
5
0.1
1
10
100
V
(V)
CM
Figure 8. Input Bias Current vs. VCM
Figure 11. Open-Loop Gain vs. Load Resistance
1000
900
800
700
600
500
400
300
200
100
0
1000
100
10
V
= ±13V
SY
A
B
C
D
E
A. V = ±13V, V = ±11V, R = 10kΩ
SY
O
L
B. V = ±13V, V = ±11V, R = 2kΩ
SY
O
L
C. V = +5V, V = +0.5V/+4.5V, R = 10kΩ
SY
O
L
D. V = +5V, V = +0.5V/+4.5V, R = 2kΩ
SY
O
L
E. V = +5V, V = +0.5V/+4.5V, R = 600Ω
SY
O
L
–100
1
–15 –13 –11 –9 –7 –5 –3 –1
1
3
5
7
9
11 13 15
–70 –50 –30 –10 10
30
50
70
90 110 130 150
V
(V)
CM
TEMPERATURE (°C)
Figure 9. Input Offset Voltage (VOS) vs. VCM
Figure 12. Open-Loop Gain vs. Temperature
500
400
600
500
V
= 5V
SY
V
= ±13V
SY
400
300
300
200
200
100
100
0
0
–100
–200
–300
–400
–500
–600
–100
–200
–300
–400
–500
–15
–10
–5
0
5
10
15
0
0.5
1.0
1.5
(V)
2.0
2.5
OUTPUT VOLTAGE (V)
V
CM
Figure 13. Input Error Voltage vs. Output Voltage for Resistive Loads
Figure 10. Input Offset Voltage vs. VCM
Rev. 0 | Page 7 of 12
AD8643-EP
10000
1000
100
10
250
200
V
= 5V
V
= ±5V
SY
SY
POS RAIL
V
– V
OH
SY
150
R
R
= 1kΩ
= 2kΩ
100
L
50
L
V
OL
0
R
= 10kΩ
L
R
= 100kΩ
L
–50
–100
–150
–200
–250
–300
–350
R = 1kΩ
L
R
= 100kΩ
L
R
= 10kΩ
L
NEG RAIL
R
= 2kΩ
L
1
0.001
0.01
0.1
1
10
100
0
50
100
150
200
250
300
350
LOAD CURRENT (mA)
OUTPUT VOLTAGE FROM SUPPLY RAIL (mV)
Figure 14. Input Error Voltage vs. Output Voltage
Within 300 mV of Supply Rails
Figure 17. Output Saturation Voltage vs. Load Current
800
700
600
500
400
300
200
100
0
70
60
50
40
30
20
10
0
315
V
R
C
=
= 2k
= 40pF
±
13V
Ω
SY
270
225
180
135
90
L
L
GAIN
PHASE
+25°C
45
+125°C
0
–55°C
–10
–20
–45
–90
–135
–30
10k
4
8
12
16
(V)
20
24
28
100k
1M
FREQUENCY (Hz)
10M
V
SY
Figure 15. Quiescent Current vs. Supply Voltage at Different Temperatures
Figure 18. Open-Loop Gain and Phase Margin vs. Frequency
10000
70
60
315
270
225
180
135
90
V
= ±13V
SY
V
R
C
= 5V
SY
= 2kΩ
L
L
= 40pF
V
– V
OH
SY
50
1000
100
10
40
GAIN
30
20
–V – V
PHASE
SY
OL
10
45
0
0
–10
–20
–30
–45
–90
–135
1
10k
100k
1M
FREQUENCY (Hz)
10M
0.001
0.01
0.1
1
10
100
LOAD CURRENT (mA)
Figure 16. Output Saturation Voltage vs. Load Current
Figure 19. Open-Loop Gain and Phase Margin vs. Frequency
Rev. 0 | Page 8 of 12
AD8643-EP
70
60
140
120
100
80
V
V
V
= 5V
V
R
C
=
= 2k
= 40pF
±
13V
Ω
SY
SY
SY
SY
L
L
50
40
G = +100
G = +10
G = +1
30
60
20
40
10
20
0
0
–10
–20
–30
–20
–40
–60
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 20. Closed-Loop Gain vs. Frequency
Figure 23. CMRR vs. Frequency
70
60
140
120
100
80
= ±13V
50
+PSRR
40
G = +100
G = +10
G = +1
30
60
20
–PSRR
40
10
20
0
0
–10
–20
–30
–20
–40
–60
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 24. PSRR vs. Frequency
Figure 21. Closed-Loop Gain vs. Frequency
140
120
100
80
140
= 5V
V
= ±13V
SY
120
100
80
+PSRR
60
60
40
40
–PSRR
20
20
0
0
–20
–40
–60
–20
–40
–60
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 25. PSRR vs. Frequency
Figure 22. CMRR vs. Frequency
Rev. 0 | Page 9 of 12
AD8643-EP
1000
15
10
5
V
= ±13V
SY
V = ±13V
S
GAIN = +5
G = +100
100
10
TS + (1%)
TS + (0.1%)
0
G = +10
1
–5
–10
–15
G = +1
TS – (0.1%)
0.1
0.01
TS – (1%)
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
SETTLING TIME (μs)
Figure 29. Output Swing and Error vs. Settling Time
Figure 26. Output Impedance vs. Frequency
1000
100
10
70
60
50
40
30
20
10
0
V
= 5V
SY
V
R
=
±
13V
Ω
S
= 10k
= 100mV p-p
= +1
L
G = +100
V
IN
A
V
G = +10
OS–
1
G = +1
OS+
0.1
0.01
1
10
100
1000
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
CAPACITANCE (pF)
Figure 27. Output Impedance vs. Frequency
Figure 30. Small Signal Overshoot vs. Load Capacitance
70
60
50
40
30
20
10
0
T
V
= ±13V
SY
V
R
= ±2.5V
S
= 10kΩ
L
V
= 100mV p-p
= +1
IN
A
1
V
V
IN
OS–
OS+
2
V
OUT
CH1 10.0V CH2 10.0V
M400μs
0.00000s
A CH1
1.00V
1
10
100
1000
T
CAPACITANCE (pF)
Figure 31. Small Signal Overshoot vs. Load Capacitance
Figure 28. No Phase Reversal
Rev. 0 | Page 10 of 12
AD8643-EP
1k
100
10
V
= ±13V
G = +1M
S
V
= 5V
SY
CH1 p-p = 4.26V
1
1
CH1 1.00V
M1.00s
A
CH1
–20.0V
10
100
1k
10k
FREQUENCY (Hz)
Figure 32. 0.1 Hz to 10 Hz Noise
Figure 35. Voltage Noise Density
0.004
0.001
V
= ±2.5V
G = +1M
S
V
= ±13V
SY
8V p-p INPUT
LOAD = 100kΩ
GAIN = +1
CH1 p-p = 4.06V
1V p-p INPUT
2V p-p INPUT
0.0001
1
4V p-p INPUT
0.00001
0.000001
CH1 1.00V
M1.00s
A CH1
–20.0V
1
100
1k
FREQUENCY (Hz)
10k 20k
Figure 33. 0.1 Hz to 10 Hz Noise
Figure 36. Total Harmonic Distortion + Noise vs. Frequency
–40
1k
20kΩ
V
= ±13V
SY
–50
–60
2kΩ
–
+
–
+
–70
2kΩ
2kΩ
V
IN
–80
100
–90
V
= 18V p-p
IN
–100
–110
–120
–130
–140
–150
–160
V
= 4.5V p-p
IN
10
V
= 9V p-p
100
IN
1
20
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
10k
FREQUENCY (Hz)
Figure 34. Voltage Noise Density
Figure 37. Channel Separation
Rev. 0 | Page 11 of 12
AD8643-EP
OUTLINE DIMENSIONS
8.75 (0.3445)
8.55 (0.3366)
8
7
14
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
1.27 (0.0500)
BSC
0.50 (0.0197)
0.25 (0.0098)
45°
1.75 (0.0689)
1.35 (0.0531)
0.25 (0.0098)
0.10 (0.0039)
8°
0°
COPLANARITY
0.10
SEATING
PLANE
1.27 (0.0500)
0.40 (0.0157)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 38. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-14)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1
AD8643TRZ-EP
AD8643TRZ-EP-R7
Temperature Range
Package Description
14-lead SOIC_N
14-lead SOIC_N
Package Option
−55°C to +125°C
−55°C to +125°C
R-14
R-14
1 Z = RoHS Compliant Part.
©2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D09590-0-1/11(0)
Rev. 0 | Page 12 of 12
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