AD8512ARMZ-REEL [ADI]
Precision, Very Low Noise, Low Input Bias Current, Wide Bandwidth JFET Operational Amplifiers; 精密，极低噪声，低输入偏置电流，宽带宽JFET运算放大器
| 型号： | AD8512ARMZ-REEL |
| 厂家： | 
ADI |
| 描述： | Precision, Very Low Noise, Low Input Bias Current, Wide Bandwidth JFET Operational Amplifiers |
| 文件： | 总20页 (文件大小：682K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Precision, Very Low Noise, Low Input Bias Current,
Wide Bandwidth JFET Operational Amplifiers
AD8510/AD8512/AD8513
FEATURES
PIN CONFIGURATIONS
Fast settling time: 500 ns to 0.1%
Low offset voltage: 400 µV max
Low TCVOS: 1 µV/°C typ
Low input bias current: 25 pA typ
Dual-supply operation: 5 V to 15 V
Low noise: 8 nV/√Hz
8
1
OUT A
–IN A
+IN A
V–
V+
OUT A
–IN A
+IN A
V–
V+
AD8512
TOP VIEW
AD8512
OUT B
–IN B
+IN B
OUT B
–IN B
+IN B
TOP VIEW
(Not to Scale)
(Not to Scale)
5
4
Figure 1. 8-Lead MSOP (RM Suffix)
Figure 2. 8-Lead SOIC (R Suffix)
Low distortion: 0.0005%
No phase reversal
Unity gain stable
NC
–IN
+IN
V–
NC
V+
NC
–IN
+IN
V–
NC
V+
AD8510
TOP VIEW
AD8510
TOP VIEW
OUT
NC
OUT
NC
(Not to Scale)
(Not to Scale)
APPLICATIONS
Instrumentation
Multipole filters
Precision current measurement
Photodiode amplifiers
Sensors
Figure 3. 8-Lead MSOP (RM Suffix)
Figure 4. 8-Lead SOIC (R Suffix)
1
14
OUT A
–IN A
+IN A
V+
1
2
3
4
5
6
7
14 OUT D
13 –IN D
12 +IN D
11 V–
OUT A
–IN A
+IN A
V+
OUT D
–IN D
+IN D
V–
AD8513
AD8513
TOP VIEW
TOP VIEW
(Not to Scale)
(Not to Scale)
+IN B
–IN B
OUT B
10 +IN C
+IN B
–IN B
OUT B
+IN C
–IN C
OUT C
Audio
9
8
–IN C
OUT C
8
7
Figure 5. 14-Lead SOIC (R Suffix)
Figure 6. 14-Lead TSSOP (RU Suffix)
GENERAL DESCRIPTION
Fast slew rate and great stability with capacitive loads make the
AD8510/AD8512/AD8513 a perfect fit for high performance
filters. Low input bias currents, low offset, and low noise result
in a wide dynamic range of photodiode amplifier circuits. Low
noise and distortion, high output current, and excellent speed
make the AD8510/AD8512/AD8513 a great choice for audio
applications.
The AD8510, AD8512, AD8513 are single-, dual-, and quad-
precision JFET amplifiers that feature low offset voltage, input
bias current, input voltage noise, and input current noise.
The combination of low offsets, low noise, and very low input
bias currents makes these amplifiers especially suitable for high
impedance sensor amplification and precise current measure-
ments using shunts. The combination of dc precision, low noise,
and fast settling time results in superior accuracy in medical
instruments, electronic measurement, and automated test
equipment. Unlike many competitive amplifiers, the AD8510/
AD8512/AD8513 maintain their fast settling performance even
with substantial capacitive loads. Unlike many older JFET
amplifiers, the AD8510/AD8512/ AD8513 do not suffer from
output phase reversal when input voltages exceed the maximum
common-mode voltage range.
The AD8510/AD8512 are both available in 8-lead narrow SOIC
and 8-lead MSOP packages. MSOP packaged parts are only
available in tape and reel. The AD8513 is available in 14-lead
SOIC and TSSOP packages.
The AD8510/AD8512/AD8513 are specified over the –40°C to
+125°C extended industrial temperature range.
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
www.analog.com
© 2004 Analog Devices, Inc. All rights reserved.
AD8510/AD8512/AD8513
TABLE OF CONTENTS
Specifications............................................................................................3
Total Noise Including Source Resistors................................... 13
Settling Time............................................................................... 14
Overload Recovery Time .......................................................... 14
Capacitive Load Drive ............................................................... 14
Open-Loop Gain and Phase Response.................................... 15
Precision Rectifiers..................................................................... 16
I-V Conversion Applications .................................................... 17
Outline Dimensions ..............................................................................19
Ordering Guide .......................................................................... 20
Electrical Characteristics............................................................. 4
Absolute Maximum Ratings ..................................................................6
ESD Caution.................................................................................. 6
Typical Performance Characteristics....................................................7
General Application Information........................................................13
Input Overvoltage Protection ................................................... 13
Output Phase Reversal............................................................... 13
THD + Noise............................................................................... 13
REVISION HISTORY
6/04—Data Sheet Changed from Rev. D to Rev. E
Changes to Format.............................................................Universal
Changes to Specifications................................................................ 3
Updated Outline Dimensions....................................................... 19
3/03—Data Sheet Changed from Rev. A to Rev. B
Updated Figure 5 ............................................................................ 11
Updated Outline Dimensions....................................................... 15
8/02—Data Sheet Changed from Rev. 0 to Rev. A
10/03—Data Sheet Changed from Rev. C to Rev. D
Added AD8510 Model.......................................................Universal
Added Pin Configurations ...............................................................1
Changes to Specifications.................................................................2
Changes to Ordering Guide.............................................................4
Changes to TPCs 2 and 3..................................................................5
Added new TPCs 10 and 12.............................................................6
Replaced TPC 20 ...............................................................................8
Replaced TPC 27 ...............................................................................9
Changes to General Application Information Section .............. 10
Changes to Figure 5........................................................................ 11
Changes to I-V Conversion Applications Section...................... 13
Changes to Figures 13 and 14 ....................................................... 13
Changes to Figure 17...................................................................... 14
Added AD8513 Model ......................................................Universal
Changes to Specifications................................................................ 3
Added Figures 36 through 40........................................................ 10
Added new Figures 55 and 57....................................................... 17
Changes to Ordering Guide .......................................................... 20
9/03—Data Sheet Changed from Rev. B to Rev. C
Changes to Ordering Guide ........................................................... 4
Updated Figure 2 ............................................................................ 10
Changes to Input Overvoltage Protection section .................... 10
Changes to Figures 10 and 11 ....................................................... 12
Changes to Photodiode Circuits section ..................................... 13
Changes to Figures 13 and 14 ....................................................... 13
Deleted Precision Current Monitoring section .......................... 14
Updated Outline Dimensions ...................................................... 15
Rev. E | Page 2 of 20
AD8510/AD8512/AD8513
SPECIFICATIONS
@ VS = 5 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Symbol
VOS
Conditions
Min
Typ
0.08
0.1
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage (B Grade)1
0.4
0.8
0.9
1.8
75
0.7
7.5
50
mV
mV
mV
mV
pA
nA
nA
pA
nA
nA
−40°C < TA < +125°C
−40°C < TA < +125°C
Offset Voltage (A Grade)
Input Bias Current
VOS
IB
21
−40°C < TA < +85°C
−40°C < TA < +125°C
Input Offset Current
IOS
5
−40°C < TA < +85°C
−40°C < TA < +125°C
0.3
0.5
Input Capacitance
Differential
Common-Mode
12.5
11.5
pF
pF
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift (B Grade)1
Offset Voltage Drift (A Grade)
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Output Voltage High
Output Voltage Low
Output Voltage High
Output Voltage Low
Output Current
−2.0
86
65
+2.5
V
dB
V/mV
µV/°C
µV/°C
CMRR
AVO
∆VOS/∆T
∆VOS/∆T
VCM = −2.0 V to +2.5 V
RL = 2 kΩ, VO = −3 V to +3 V
100
107
0.9
5
12
1.7
VOH
VOL
VOH
VOL
VOH
VOL
IOUT
RL = 10 kΩ
−40°C < TA < +125°C
RL = 2 kΩ,
−40°C < TA < +125°C
RL = 600 Ω
−40°C < TA < +125°C
+4.1
+3.9
+3.7
40
+4.3
−4.9
+ 4.2
−4.9
+4.1
−4.8
54
V
V
V
V
V
V
mA
−4.7
−4.5
−4.2
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
AD8510/AD8512/AD8513
AD8510/AD8512
PSRR
ISY
VS = 4.5 V to 18 V
86
130
2.0
dB
VO = 0 V
−40°C < TA < +125°C
−40°C < TA < +125°C
2.3
2.5
2.75
mA
mA
mA
AD8513
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Settling Time
THD + Noise
Phase Margin
SR
GBP
tS
THD + N
ΦO
RL = 2 kΩ
20
8
0.4
0.0005
44.5
V/µs
MHz
µs
To 0.1%, 0 V to 4 V Step, G = +1
1 kHz, G = +1, RL = 2 kΩ
%
Degrees
NOISE PERFORMANCE
Voltage Noise Density
en
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
34
12
8.0
7.6
2.4
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
µV p-p
10
Peak-to-Peak Voltage Noise
en p-p
0.1 Hz to 10 Hz Bandwidth
5.2
1 AD8510/AD8512 only.
Rev. E | Page 3 of 20
AD8510/AD8512/AD8513
ELECTRICAL CHARACTERISTICS
@ VS = 15 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage (B Grade)1
VOS
0.08
0.4
0.8
mV
mV
−40°C < TA < +125°C
−40°C < TA < +125°C
Offset Voltage (A Grade)
Input Bias Current
VOS
IB
0.1
25
1.0
1.8
80
0.7
10
75
0.3
0.5
mV
mV
pA
nA
nA
pA
nA
nA
−40°C < TA < +85°C
−40°C < TA < +125°C
Input Offset Current
IOS
6
−40°C < TA < +85°C
−40°C < TA < +125°C
Input Capacitance
Differential
Common-Mode
12.5
11.5
pF
pF
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
−13.5
86
115
+13.0
V
CMRR
AVO
VCM = −12.5 V to +12.5 V
VO = −13.5 V to +13.5 V
RL = 2 kΩ, VCM = 0 V
108
196
dB
V/mV
Offset Voltage Drift (B Grade)1
Offset Voltage Drift (A Grade)
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Output Voltage High
∆VOS/∆T
∆VOS/∆T
1.0
1.7
5
12
µV/°C
µV/°C
VOH
VOL
VOH
VOL
VOH
RL = 10 kΩ
−40°C < TA < +125°C
RL = 2 kΩ
−40°C < TA < +125°C
RL = 600 Ω, TA = 25°C
−40°C < TA < +125°C
RL = 600 Ω, TA = 25°C
−40°C < TA < +125°C
+14.0
+13.8
+14.2
−14.9
+14.1
–14.8
+13.9
V
V
V
V
V
V
V
V
−14.6
−14.5
Output Voltage Low
Output Voltage High
+13.5
11.4
Output Voltage Low
VOL
IOUT
−14.3
70
−13.8
−12.1
Output Current
POWER SUPPLY
mA
Power Supply Rejection Ratio
Supply Current/Amplifier
AD8510/AD8512/AD8513
AD8510/AD8512
PSRR
ISY
VS = 4.5 V to 18 V
86
dB
VO = 0 V
−40°C < TA < +125°C
−40°C < TA < +125°C
2.2
2.5
2.6
3.0
mA
mA
mA
AD8513
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Settling Time
SR
GBP
tS
RL = 2 kΩ
20
8
0.5
0.9
0.0005
52
V/µs
MHz
µs
µs
%
To 0.1%, 0 V to 10 V Step, G = +1
To 0.01%, 0 V to 10 V Step, G = +1
1 kHz, G = +1, RL = 2 kΩ
THD + Noise
Phase Margin
THD + N
ΦO
Degrees
Rev. E | Page 4 of 20
AD8510/AD8512/AD8513
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
NOISE PERFORMANCE
Voltage Noise Density
en
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
34
12
8.0
7.6
2.4
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
µV p-p
10
Peak-to-Peak Voltage Noise
en p-p
0.1 Hz to 10 Hz Bandwidth
5.2
1 AD8510/AD8512 only.
Rev. E | Page 5 of 20
AD8510/AD8512/AD8513
ABSOLUTE MAXIMUM RATINGS
Table 3. AD8510/AD8512/AD8513 Stress Ratings1
Table 4. Thermal Resistance
Package Type
8-Lead MSOP (RM)
8-Lead SOIC (R)
14-Lead SOIC (R)
14-Lead TSSOP (RU)
2
Parameter
Rating
18 V
VS
θJA
θJC
45
43
36
35
Unit
°C/W
°C/W
°C/W
°C/W
Supply Voltage
Input Voltage
210
158
120
180
Output Short-Circuit Duration to GND
Observe Derating
Curves
Storage Temperature Range
R, RM Packages
Operating Temperature Range
Junction Temperature Range
R, RM Packages
Lead Temperature Range
(Soldering, 10 sec)
Electrostatic Discharge (HBM)
−65°C to +150°C
−40°C to +125°C
1 Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those listed in
the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device
reliability.
−65°C to +150°C
300°C
2 θJA is specified for worst-case conditions, i.e., θJA is specified for device
soldered in circuit board for surface-mount packages.
2000 V
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
this product features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
Rev. E | Page 6 of 20
AD8510/AD8512/AD8513
TYPICAL PERFORMANCE CHARACTERISTICS
120
100k
10k
V
= ±5V, ±15V
V
= ±15V
= 25°C
SY
SY
T
A
100
80
1k
60
40
20
100
10
1
0
–0.5 –0.4 –0.3 –0.2 –0.1
0
0.1 0.2 0.3 0.4 0.5
–40 –25 –10
5
20
35
50
65
80
95 110 125
TEMPERATURE (°C)
INPUT OFFSET VOLTAGE (mV)
Figure 10. Input Bias Current vs. Temperature
Figure 7. Input Offset Voltage Distribution
30
25
20
1000
100
10
V
= ±15V
SY
B GRADE
±15V
15
10
±5V
1
5
0
0.1
0
1
2
3
4
5
6
–40 –25 –10
5
20
35
50
65
80
95 110 125
T V
C
(µV/°C)
TEMPERATURE (°C)
OS
Figure 8. AD8510/AD8512 TCVOS Distribution
Figure 11. Input Offset Current vs. Temperature
30
25
20
40
35
30
25
20
15
10
5
V
= ±15V
SY
T
A
= 25°C
A GRADE
15
10
5
0
0
8
13
18
23
28
30
0
1
2
3
4
5
6
T V
C
(µV/°C)
OS
SUPPLY VOLTAGE (V+ – V– )
Figure 9. AD8510/AD8512 TCVOS Distribution
Figure 12. Input Bias Current vs. Supply Voltage
Rev. E | Page 7 of 20
AD8510/AD8512/AD8513
2.8
2.0
T
A
= 25°C
T
A
= 25°C
1.9
1.8
1.7
2.6
2.4
2.2
2.0
1.8
1.6
1.5
1.4
1.3
1.2
1.1
1.0
1.6
1.4
1.2
1.0
8
13
18
23
28
30
8
13
18
23
28
33
SUPPLY VOLTAGE (V+ – V–)
SUPPLY VOLTAGE (V+ – V–)
Figure 16. AD8510 Supply Current vs. Supply Voltage
Figure 13. AD8512 Supply Current per Amplifier vs. Supply Voltage
70
60
16
315
V
V
= ±15V
OL
SY
V
R
C
= ±15V
= 2.5kΩ
SY
270
225
180
14
12
10
8
L
= 20pF
SCOPE
V
OH
50
40
30
20
10
φ
M
= 52 DEGREES
135
90
45
6
V
V
OL
OH
V
= ±5V
SY
0
0
–10
–20
–30
4
–45
2
0
–90
–135
50M
0
10
20
30
40
50
60
70
80
10k
100k
1M
FREQUENCY (Hz)
10M
LOAD CURRENT (mA)
Figure 14. AD8510/AD8512 Output Voltage vs. Load Current
Figure 17. Open-Loop Gain and Phase vs. Frequency
2.50
2.50
2.25
2.00
1.75
1.50
±15V
2.25
±5V
2.00
±15V
1.75
±5V
1.50
1.25
1.00
1.25
1.00
–40 –25 –10
5
20
35 50
65
80
95 110 125
–40 –25 –10
5
20
35 50
65
80
95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 15. AD8512 Supply Current per Amplifier vs. Temperature
Figure 18. AD8510 Supply Current vs. Temperature
Rev. E | Page 8 of 20
AD8510/AD8512/AD8513
300
270
240
210
180
150
120
90
70
60
V
V
= ±15V
= 50mV
SY
IN
V
= ±15V, ±5V
SY
50
40
30
20
10
A
= 100
= 10
= 1
V
A
= 1
V
A
V
A
= 100
V
0
–10
–20
–30
A
V
60
A
= 10
V
30
0
100
1k
10k
1M
FREQUENCY (Hz)
10M
100M
100k
1k
10k
50M
100k
FREQUENCY (Hz)
1M
10M
Figure 19. Closed-Loop Gain vs. Frequency
Figure 22. Output Impedance vs. Frequency
120
100
80
60
40
20
0
32
28
24
20
16
12
V
= ±5V TO ±15V
SY
V
= ±15V
SY
8
4
0
100
1k
10k
100k
1M
10M
100M
0
5.0
7.5 10.0 12.5 15.0 17.5 20.0 22.5
FREQUENCY (kHz)
2.5
SY
25.0
FREQUENCY (Hz)
Figure 20. CMRR vs. Frequency
Figure 23. Voltage Noise Density
120
100
V
= ±15V
V
= ±5V, ±15V
SY
80
60
–PSRR
+PSRR
40
20
0
–20
100
1k
10k
100k
1M
10M
100M
TIME (1s/DIV)
FREQUENCY (Hz)
Figure 24. 0.1 Hz to 10 Hz Input Voltage Noise
Figure 21. PSRR vs. Frequency
Rev. E | Page 9 of 20
AD8510/AD8512/AD8513
280
245
210
175
140
105
90
80
70
V
SY
= ±5V TO ±15V
V
R
= ±15V
Ω
SY
= 2k
L
60
50
40
30
+OS
–OS
70
35
0
20
10
0
0
10
20
30
40
FREQUENCY (Hz)
50
60
70
80
90
100
10
10k
1
100
CAPACITANCE (pF)
1k
Figure 28. Small Signal Overshoot vs. Load Capacitance
Figure 25. Voltage Noise Density vs. Frequency
70
60
50
40
30
20
10
0
315
270
V
= ±5V
= 2.5kΩ
V
R
C
A
= ±15V
SY
SY
R
C
φ
= 2kΩ
= 100pF
= 1
L
L
L
V
= 20pF
SCOPE
= 44.5 DEGREES
M
225
180
135
90
45
0
–10
–45
–20
–30
–90
–135
10k
100k
1M
10M
50M
TIME (1µs/DIV)
FREQUENCY (Hz)
Figure 26. Large Signal Transient Response
Figure 29. Open-Loop Gain and Phase vs. Frequency
120
100
80
60
40
20
0
V
R
C
A
= ±15V
SY
V
= ±5V
= 2kΩ
= 100pF
= 1
SY
L
L
V
100k
10k
FREQUENCY (Hz)
100
1k
1M
10M
100M
TIME (100ns/DIV)
Figure 27. Small Signal Transient Response
Figure 30. CMRR vs. Frequency
Rev. E | Page 10 of 20
AD8510/AD8512/AD8513
300
270
240
210
180
150
120
V
V
= ±5V
= 50mV
SY
IN
V
= ±5V
= 2kΩ
= 100pF
= 1
SY
R
C
A
L
L
V
A
= 1
V
A
V
= 100
90
60
30
0
A
= 10
V
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
TIME (100ns/DIV)
Figure 31. Output Impedance vs. Frequency
Figure 34. Small Signal Transient Response
100
90
V
SY
= ±5V
V
R
= ±5V
Ω
SY
= 2k
L
80
70
60
50
40
+OS
–OS
30
20
10
0
TIME (1s/DIV)
1
10
100
CAPACITANCE (pF)
1k
10k
Figure 32. 0.1 Hz to 10 Hz Input Voltage Noise
Figure 35. Small Signal Overshoot vs. Load Capacitance
100
90
80
70
60
50
40
30
20
10
V
= ±5V
= 2kΩ
= 100pF
= 1
SY
V
= ±15V
S
R
C
A
L
L
V
0
TIME (1µs/DIV)
0
6
1
2
3
4
5
T
V
(µV/°C)
OS
C
Figure 33. Large Signal Transient Response
Figure 36. AD8513 TCVOS Distribution
Rev. E | Page 11 of 20
AD8510/AD8512/AD8513
120
100
80
16
14
12
10
8
V
= ±5V
S
V
V
V
= ±15V
SY
OL
OH
60
6
40
V
= ±5V
SY
V
V
OL
4
OH
20
2
0
0
0
1
6
0
10
20
30
40
50
60
70
80
2
3
4
5
T
V
(µV/°C)
LOAD CURRENT (mA)
C
OS
Figure 39. AD8513 Output Voltage vs. Load Current
Figure 37. AD8513 TCVOS Distribution
3.0
2.5
2.0
1.5
1.0
0.5
0
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
T
= 25°C
A
±15V
±5V
1.5
8
18
23
28
33
13
–40 –25 –10
5
20
35
50
65
80
95 110 125
SUPPLY VOLTAGE (V+ – V–)
TEMPERATURE (°C)
Figure 40. AD8513 Supply Current vs. Temperature
Figure 38. AD8513 Supply Current vs. Supply Voltage
Rev. E | Page 12 of 20
AD8510/AD8512/AD8513
GENERAL APPLICATION INFORMATION
0.01
INPUT OVERVOLTAGE PROTECTION
V
R
= ±5V
SY
= 100k
Ω
L
The AD8510/AD8512/AD8513 have internal protective
circuitry that allows voltages as high as 0.7 V beyond the
supplies to be applied at the input of either terminal without
causing damage. For higher input voltages, a series resistor is
necessary to limit the input current. The resistor value can be
determined from the formula
BW = 22kHz
0.001
VIN − VS
≤ 5mA
RS
With a very low offset current of <0.5 nA up to 125°C, higher
resistor values can be used in series with the inputs. A 5 kΩ
resistor will protect the inputs to voltages as high as 25 V
beyond the supplies and will add less than 10 µV to the offset.
0.0001
20
100
1k
20k
FREQUENCY (Hz)
Figure 42. THD + N vs. Frequency
TOTAL NOISE INCLUDING SOURCE RESISTORS
OUTPUT PHASE REVERSAL
The low input current noise and input bias current of the
AD8510/AD8512/AD8513 make them the ideal amplifiers for
circuits with substantial input source resistance. Input offset
voltage increases by less than 15 nV per 500 Ω of source
resistance at room temperature. The total noise density of the
circuit is
Phase reversal is a change of polarity in the transfer function of
the amplifier. This can occur when the voltage applied at the
input of an amplifier exceeds the maximum common-mode
voltage.
Phase reversal can cause permanent damage to the device and
may result in system lockups. The AD8510/AD8512/AD8513 do
not exhibit phase reversal when input voltages are beyond the
supplies.
2
2
enTOTAL
where:
=
en
+
in RS
)
+ 4kTRS
V
= ±5V
SY
en is the input voltage noise density of the parts.
in is the input current noise density of the parts.
RS is the source resistance at the noninverting terminal.
k is Boltzman’s constant (1.38 × 10–23 J/K).
A
V
R
L
= 1
= 10k
Ω
V
OUT
T is the ambient temperature in Kelvin (T = 273 + °C).
For RS < 3.9 kΩ, en dominates and enTOTAL ≈ en.
V
IN
The current noise of the AD8510/AD8512/AD8513 is so low
that its total density does not become a significant term unless
RS is greater than 165 MΩ, an impractical value for most
applications.
The total equivalent rms noise over a specific bandwidth is
expressed as
TIME (20
µ
s/DIV)
Figure 41. No Phase Reversal
enTOTAL = enTOTAL BW
THD + NOISE
The AD8510/AD8512/AD8513 have low total harmonic distor-
tion and excellent gain linearity, making these amplifiers a great
choice for precision circuits with high closed-loop gain, and for
audio application circuits. Figure 42 shows that the AD8510/
AD8512/AD8513 have approximately 0.0005% of total distor-
tion when configured in positive unity gain (the worst case) and
driving a 100 kΩ load.
where BW is the bandwidth in Hertz.
Note that the above analysis is valid for frequencies larger than
150 Hz and assumes flat noise above 10 kHz. For lower frequen-
cies, flicker noise (1/f) must be considered.
Rev. E | Page 13 of 20
AD8510/AD8512/AD8513
SETTLING TIME
V
A
R
= ±15V
= –100
= 10kΩ
SY
V
L
Settling time is the time it takes the output of the amplifier to
reach and remain within a percentage of its final value after a
pulse has been applied at the input. The AD8510/AD8512/
AD8513 settle to within 0.01% in less than 900 ns with a step of
0 V to 10 V in unity gain. This makes the each of the parts an
excellent choice as a buffer at the output of DACs whose settling
time is typically less than 1 µs.
+15V
0V
0V
–200mV
In addition to their fast settling time and fast slew rate, the
AD8510/AD8512/AD8513’s low offset voltage drift and input
offset current maintain full accuracy of 12-bit converters over
the entire operating temperature range.
TIME (2µs/DIV)
Figure 44. Negative Overload Recovery
OVERLOAD RECOVERY TIME
CAPACITIVE LOAD DRIVE
Overload recovery, also known as overdrive recovery, is the time
it takes the output of an amplifier to recover from a saturated
condition to its linear region. This recovery time is particularly
important in applications where the amplifier must amplify
small signals in the presence of large transient voltages.
The AD8510/AD8512/AD8513 are unconditionally stable at all
gains in inverting and noninverting configurations. They are
capable of driving up to 1000 pF of capacitive loads without
oscillation in unity gain, the worst-case configuration.
However, as with most amplifiers, driving larger capacitive loads
in a unity gain configuration may cause excessive overshoot and
ringing or even oscillation. A simple snubber network reduces
the amount of overshoot and ringing significantly. The advan-
tage of this configuration is that the output swing of the ampli-
fier is not reduced, because RS is outside the feedback loop.
Figure 43 shows the positive overload recovery of the
AD8510/AD8512/AD8513. The output recovers in
approximately 200 ns from a saturated condition.
V
V
A
R
= ±15V
= 200mV
= –100
SY
IN
V
L
0V
= 10kΩ
V+
–15V
7
200mV
0V
6
AD8510
V
OUT
4
200mV
R
S
C
S
C
L
V–
TIME (2µs/DIV)
Figure 45. Snubber Network Configuration
Figure 43. Positive Overload Recovery
Figure 46 shows a scope photograph of the output of the
AD8510/AD8512/AD8513 in response to a 400 mV pulse. The
circuit is configured in positive unity gain (worst-case) with a
load experience of 500 pF.
The negative overdrive recovery time shown in Figure 44 is less
than 200 ns.
In addition to the fast recovery time, the AD8510/AD8512/
AD8513 show excellent symmetry of the positive and negative
recovery times. This is an important feature for transient signal
rectification, because the output signal is kept equally undis-
torted throughout any given period.
Rev. E | Page 14 of 20
AD8510/AD8512/AD8513
OPEN-LOOP GAIN AND PHASE RESPONSE
V
C
R
= ±15V
= 500pF
=10kΩ
SY
L
L
In addition to their impressive low noise, low offset voltage, and
offset current, the AD8510/AD8512/AD8513 have excellent
loop gain and phase response even when driving large resistive
and capacitive loads. They were compared to the OPA2132
under the same conditions. With a 2.5 kΩ load at the output, the
AD8510/AD8512/AD8513 have more than 8 MHz of band-
width and a phase margin of more than 52°.
The OPA2132, on the other hand, has only 4.5 MHz of band-
width and 28° of phase margin under the same test conditions.
Even with a 1 nF capacitive load in parallel with the 2 kΩ load
at the output, the AD8510/AD8512/AD8513 show much better
response than the OPA2132, whose phase margin is degraded to
less than 0, indicating oscillation.
TIME (1µs/DIV)
Figure 46. Capacitive Load Drive without Snubber
When the snubber circuit is used, the overshoot is reduced from
55% to less than 3% with the same load capacitance. Ringing is
virtually eliminated, as shown in Figure 47.
70
60
315
270
225
190
V
R
C
= ±15V
SY
= 2.5kΩ
L
L
= 0
50
40
30
20
10
V
= ±15V
=10kΩ
= 500pF
=100Ω
=1nF
SY
R
L
C
L
R
S
C
S
135
90
45
0
0
–10
–20
–30
–45
–90
–135
50M
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 48. Frequency Response of the AD8510/AD8512/AD8513
TIME (1µs/DIV)
70
315
270
225
190
V
R
C
= ±15V
SY
60
= 2.5k
= 0
Ω
L
L
Figure 47. Capacitive Load with Snubber Network
50
40
30
20
10
Optimum values for RS and CS depend on the load capacitance
and input stray capacitance and are determined empirically.
Table 5 shows a few values that can be used as starting points.
135
90
45
Table 5. Optimum Values for Capacitive Loads
0
0
–10
–20
–30
CLOAD
500 pF
2 nF
RS (Ω)
100
70
CS
–45
1 nF
100 pF
300 pF
–90
–135
50M
5 nF
60
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 49. Frequency Response of the OPA2132
Rev. E | Page 15 of 20
AD8510/AD8512/AD8513
PRECISION RECTIFIERS
Rectifying circuits are used in a multitude of applications. One
of the most popular uses is in the design of regulated power
supplies, where a rectifier circuit is used to convert an input
sinusoid to a unipolar output voltage. There are some potential
problems for amplifiers used in this manner.
When the input voltage (VIN) is negative, the output is zero. The
magnitude of VIN is doubled at the inputs of the op amp. This
voltage can exceed the power supply voltage, which would dam-
age some amplifiers permanently. The op amp must come out of
saturation when VIN is negative. This delays the output signal
because the amplifier requires time to enter its linear region.
TIME (1ms/DIV)
The AD8510/AD8512/AD8513 have a very fast overdrive
recovery time, which makes them great choices for the
rectification of transient signals. The symmetry of the positive
and negative recovery times is also important in keeping the
output signal undistorted.
Figure 51. Half-Wave Rectifier Signal (Out A)
Figure 50 shows the test circuit of the rectifier. The first stage of
the circuit is a half-wave rectifier. When the sine wave applied at
the input is positive, the output follows the input response.
During the negative cycle of the input, the output tries to swing
negative to follow the input, but the power supply restrains it to
zero. In a similar fashion, the second stage is a follower during
the positive cycle of the sine wave and an inverter during the
negative cycle.
R2
10kΩ
R3
10kΩ
TIME (1ms/DIV)
Figure 52. Full-Wave Rectifier Signal (Out B)
5V
8
V
6
5
IN
3V p-p
4
2/2
7
3
2
AD8512
1/2
OUT B
(HALF WAVE)
R1
1kΩ
8
1
AD8512
4
5V
OUT A
(HALF WAVE)
Figure 50. Half-Wave and Full-Wave Rectifier
Rev. E | Page 16 of 20
AD8510/AD8512/AD8513
I-V CONVERSION APPLICATIONS
Photodiode Circuits
includes external parasitic capacitance. Ct creates a pole in the
frequency response, which may lead to an unstable system. To
ensure stability and optimize the bandwidth of the signal, a
capacitor is placed in the feedback loop of the circuit shown in
Figure 53. It creates a zero and yields a bandwidth whose corner
frequency is 1/(2π(R2Cf)).
Common applications for I-V conversion include photodiode
circuits, where the amplifier is used to convert a current emitted
by a diode placed at the positive input terminal into an output
voltage.
The AD8510/AD8512/AD8513’s low input bias current, wide
bandwidth, and low noise make them each an excellent choice
for various photodiode applications, including fax machines,
fiber optic controls, motion sensors, and bar code readers.
The value of R2 can be determined by the ratio V/ID, where V is
the desired output voltage of the op amp and ID is the diode
current. For example, if ID is 100 µA and a 10 V output voltage is
desired, R2 should be 100 kΩ. Rd is a junction resistance that
drops typically by a factor of 2 for every 10°C increase in
temperature. A typical value for Rd is 1000 MΩ. Since Rd >> R2,
the circuit behavior is not impacted by the effect of the junction
resistance. The maximum signal bandwidth is
The circuit shown in Figure 53 uses a silicon diode with zero
bias voltage. This is known as a Photovoltaic Mode; this
configuration limits the overall noise and is suitable for
instrumentation applications.
Cf
ft
R2
fMAX
=
2πR2Ct
VEE
where ft is the unity gain frequency of the amplifier.
4
Using the parameters above, Cf ≈ 1 pF, which yields a signal
2
bandwidth of about 2.6 MHz.
6
AD8510
3
Rd
Ct
7
Ct
2πR2 ft
Cf =
VCC
where ft is the unity gain frequency of the op amp, achieves a
phase margin, Φm, of approximately 45°.
Figure 53. Equivalent Preamplifier Photodiode Circuit
A larger signal bandwidth can be attained at the expense of
additional output noise. The total input capacitance (Ct)
consists of the sum of the diode capacitance (typically 3 pF to
4 pF) and the amplifier’s input capacitance (12 pF), which
A higher phase margin can be obtained by increasing the value
of Cf. Setting Cf to twice the previous value yields approximately
Φm = 65° and a maximally flat frequency response, but reduces
the maximum signal bandwidth by 50%.
Rev. E | Page 17 of 20
AD8510/AD8512/AD8513
Signal Transmission Applications
One popular signal transmission method uses pulse-width
modulation. High data rates may require a fast comparator
rather than an op amp. However, the need for sharp and
undistorted signals may favor using a linear amplifier.
The AD8510/AD8512/AD8513 make excellent voltage
comparators. In addition to a high slew rate, the AD8510/
AD8512/AD8513 have a very fast saturation recovery time. In
the absence of feedback, the amplifiers are in open-loop mode
(very high gain). In this mode of operation, they spend much of
their time in saturation.
TIME (2ms/DIV)
The circuit in Figure 54 compares two signals of different
frequencies, namely a 100 Hz sine wave and a 1 kHz triangular
wave. Figure 56 shows a scope photograph of the output wave-
form. A pull-up resistor (typically 5 kΩ) may be connected from
the output to VCC if the output voltage needs to reach the posi-
tive rail. The trade-off is that power consumption will be higher.
Figure 56. Pulse-Width Modulation
Crosstalk
Crosstalk, also known as channel separation, is a measure of
signal feedthrough from one channel to the other on the same
IC. The AD8512/AD8513 have a channel separation better than
−90 dB for frequencies up to 10 kHz, and better than −50 dB for
frequencies up to 10 MHz. Figure 57 shows the typical channel
separation behavior between amplifier A (driving amplifier),
with respect to amplifiers B, C, and D.
+15V
3
7
6
V
OUT
0
–20
–40
2
4
V1
–15V
V2
CH-B
–60
–80
Figure 54. Pulse-Width Modulator
CH-C
–100
–120
–140
–160
V
OUT
CH-D
20kΩ
2.2kΩ
+V
S
2
3
6
5
8
1
7
5kΩ
18V p-p
100
1k
10k
100k
1M
10M
4
5kΩ
FREQUENCY (Hz)
V
IN
–V
S
V
OUT
10V
CROSSTALK = 20 LOG
Figure 57. Channel Separation
IN
Figure 55. Crosstalk Test Circuit
Rev. E | Page 18 of 20
AD8510/AD8512/AD8513
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
5.10
5.00
4.90
8
1
5
4
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
14
8
7
4.50
4.40
4.30
6.40
BSC
1.27 (0.0500)
BSC
0.50 (0.0196)
0.25 (0.0099)
× 45°
1.75 (0.0688)
1.35 (0.0532)
1
0.25 (0.0098)
0.10 (0.0040)
PIN 1
8°
0.51 (0.0201)
0.31 (0.0122)
0.65
BSC
1.05
1.00
0.80
0° 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
0.40 (0.0157)
0.20
1.20
MAX
0.09
0.75
0.60
0.45
8°
0°
COMPLIANT TO JEDEC STANDARDS MS-012AA
0.15
0.05
0.30
0.19
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
SEATING
PLANE
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153AB-1
Figure 58. 8-Lead Standard Small Outline Package [SOIC]
Narrow Body (R-8)
Figure 60. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters and (inches)
Dimensions show in millimeters
3.00
BSC
8.75 (0.3445)
8.55 (0.3366)
8
5
4
14
1
8
7
4.90
BSC
3.00
BSC
4.00 (0.1575)
3.80 (0.1496)
6.20 (0.2441)
5.80 (0.2283)
PIN 1
1.27 (0.0500)
BSC
0.50 (0.0197)
0.25 (0.0098)
1.75 (0.0689)
1.35 (0.0531)
× 45°
0.65 BSC
0.25 (0.0098)
0.10 (0.0039)
1.10 MAX
8°
0°
0.15
0.00
0.51 (0.0201)
0.31 (0.0122)
SEATING
PLANE
1.27 (0.0500)
0.40 (0.0157)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
0.80
0.60
0.40
8°
0°
0.38
0.22
0.23
0.08
COMPLIANT TO JEDEC STANDARDS MS-012AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COPLANARITY
0.10
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187AA
Figure 59. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Figure 61. 14-Lead Standard Small Outline Package [SOIC]
Narrow Body (R-14)
Dimensions shown in millimeters
Dimensions shown in millimeters and (inches)
Rev. E | Page 19 of 20
AD8510/AD8512/AD8513
ORDERING GUIDE
Model
Temperature Range
Package Description
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
14-Lead SOIC
14-Lead SOIC
14-Lead SOIC
14-Lead TSSOP
14-Lead TSSOP
Package Option
RM-8
RM-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
Branding Information
AD8510ARM-REEL
AD8510ARM-R2
AD8510AR
AD8510AR-REEL
AD8510AR-REEL7
AD8510ARZ1
AD8510ARZ-REEL1
AD8510ARZ-REEL71
AD8510BR
AD8510BR-REEL
AD8510BR-REEL7
AD8512ARM-REEL
AD8512ARM-R2
AD8512ARMZ-REEL1
AD8512ARMZ-R21
AD8512AR
AD8512AR-REEL
AD8512AR-REEL7
AD8512ARZ1
AD8512ARZ-REEL1
AD8512ARZ-REEL71
AD8512BR
AD8512BR-REEL
AD8512BR-REEL7
AD8513AR
AD8513AR-REEL
AD8513AR-REEL7
AD8513ARU
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
B7A
B7A
R-8
R-8
RM-8
RM-8
RM-8
RM-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-8
R-14
R-14
R-14
RU-14
RU-14
B8A
B8A
B8A
B8A
AD8513ARU-REEL
1 Z = Pb-free part.
©
2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C02729–0–6/04(E)
Rev. E | Page 20 of 20
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