LTC6269 [ADI]
1nV/âHz 420MHz GBW, 180V/μs, Low Distortion Rail-to-Rail Output Op Amps;
| 型号： | LTC6269 |
| 厂家： | 
ADI |
| 描述： | 1nV/âHz 420MHz GBW, 180V/μs, Low Distortion Rail-to-Rail Output Op Amps |
| 文件： | 总28页 (文件大小：2264K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC6226/LTC6227
Hz
1nV/√ 420MHz GBW, 180V/µs,
Low Distortion Rail-to-Rail Output Op Amps
FEATURES
DESCRIPTION
The LTC®6226/LTC6227 are very fast, low noise rail-to-rail
output, unity gain stable single/dual op amps, with a gain-
bandwidth product of 420MHz and a slew rate of 180V/μs.
The low input referred voltage noise of only 1nV/√Hz and
n
Ultra Low Voltage Noise: 1nV/√Hz
n
Low Distortion: HD2/HD3<–90dB at 4V ,1MHz
C
P-P
into 1kΩ
n
n
n
n
n
n
n
n
n
n
n
n
n
High Slew Rate: 180V/μs
GBW = 420MHz
low distortion of less than –90dB for 4V signals at
C
P-P
–3dB Frequency (A = +1): 330MHz
1MHz makes them ideal for applications that require high
dynamic range and deal with very fast signals, such as
driving A/D converters.
V
Input Common Mode Range Includes Negative Rail
Output Swings Rail-to-Rail
Supply Current: 5.5mA/Channel Typ
Operating Supply Range: 2.8V to 11.75V
Input Offset Voltage: 95μV Max
Offset Drift :0.4μV/°C
Low Power Shutdown
Very High Open Loop Gain: 9V/μV (139dB), R = 1kΩ
Operating Temp Range: –40°C to 125°C
Single in 8-Lead SOIC, TSOT-23, 2mm × 2mm DFN.
Duals in 3mm × 3mm DFN, MS8E
The combination of low offset, low offset drift, high gain
(139dB) and high CMRR (114dB) make these excellent
devices for high dynamic range applications.
The LTC6226 family maintains excellent performance for
supply voltages of 2.8V to 11.75V and the devices are fully
specified at supplies of 3V, 5V and 10V ( 5V).
L
With an input range extending to the negative rail and
rail-to-rail output stage, the operational amplifier can
accommodate wide swinging signals, and true single
supply operation.
APPLICATIONS
n
Optical Electronics: Fast AC-Coupled Transimpedance
For space constrained applications, the amplifiers come
in 2mm × 2mm DFN (single) and 3mm × 3mm DFN
(dual) packages. The devices are also available in 8-lead
SOIC,TSOT-23 and MS8E.
Amplifiers
n
Driving High Dynamic Range A/D Converters
n
Active Filters
Video Amplifiers
n
These amplifiers can be used as replacements for many high
speed op amps to improve speed, noise and dynamic range.
All registered trademarks and trademarks are the property of their respective owners.
n
Low Voltage Low Distortion Amplification
16-Bit ADC Driver Performance
Input Signal = –0.5dBFS
TYPICAL APPLICATION
fSMPL = 4Msps, fIN = 50kHz
High Performance Transparent LTC6227 Based Driver for the 16-Bit AD7380
0
ꢀꢁ0
ꢀꢁꢂꢃꢄ
ꢀ0ꢁꢂꢃ ꢄꢅꢆꢇꢈ ꢉꢄꢊꢅꢋꢌ
ꢀꢁꢀ
ꢀꢁR ꢂ ꢃꢄ ꢅꢆ
ADR4533
ꢇꢈꢉ ꢂ ꢊꢄ0ꢋꢌꢍ ꢅꢆ
ꢀꢎꢉR ꢂ ꢄ0ꢍꢌꢏ ꢅꢆ
5V
ꢀꢁ0
3.3V
3.3V
+
ꢀꢁ0
1/2 LTC6227
2.2µF
3.3V
2.5V
0V
ꢀꢁ0
–
33Ω
68pF
ꢀꢁ00
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀꢁꢂ0
+
–
V
V
V
CC REF LOGIC
IN
330pF
AD7380
3.3V
0V
+
68pF
33Ω
1/2 LTC6227
IN
62267 TA01a
–
0
ꢀ00
ꢀ00
ꢀꢁ00
ꢀꢁ00
ꢀ000
–2.5V
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊꢋ
ꢀꢁꢂꢃꢄꢄꢅꢅ ꢁꢆ0ꢇꢈ
Rev 0
1
Document Feedback
For more information www.analog.com
LTC6226/LTC6227
ABSOLUTE MAXIMUM RATINGS (Note 1)
–
+
Total Supply Voltage (V to V ).................................12V
Output Current (Note 3) ..................................... 100mA
Output Short-Circuit Duration.............Thermally Limited
Storage Temperature Range .................. –65°C to 125°C
Maximum Junction Temperature .......................... 150°C
MSOP Lead Temperature (Soldering 10s).............300°C
–
+
Input Voltage (–IN, +IN, SHDN)....V – 0.3V to V + 0.3V
Input Current (–IN, +IN, SHDN) (Note 2).............. 10mA
Operating Temperature Range
LTC6226I/LTC6227I (Note 4)...............–40°C to 85°C
LTC6226H/LTC6227H (Note 4) .......... –40°C to 125°C
Specified Temperature Range
LTC6226I/LTC6227I (Note 4)...............–40°C to 85°C
LTC6226H/LTC6227H (Note 4) .......... –40°C to 125°C
PIN CONFIGURATION
ꢈꢉꢊ ꢋꢌꢍꢎ
ꢆꢇꢈ ꢉꢊꢋꢌ
ꢕ
ꢒꢓ
ꢑꢌꢔ
ꢏꢌꢔ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢇ
SHDN
ꢇꢘꢆ ꢀ
ꢖ
ꢃ ꢉ
ꢏ
ꢋ
ꢉ
ꢁ
ꢄ SHDN
ꢅ ꢖꢊꢗ
ꢕ
ꢖ
ꢉꢐꢈ
ꢕꢊꢗ ꢂ
ꢑ
ꢑ
ꢋ
ꢋ
ꢍꢃ ꢈꢎꢏꢐꢎꢑꢋ
ꢃꢒꢓꢋꢎꢔ ꢈꢓꢎꢍꢆꢊꢏ ꢆꢍꢇꢆꢒꢁꢂ
ꢕꢄ ꢊꢖꢗꢘꢖꢙꢍ
ꢄꢚꢛꢍꢖꢜ ꢊꢛꢖꢕꢈꢌꢗ ꢕꢉ
T
= 150°C, θ = 192°C/W (NOTE 8)
JMAX
JA
T
JMAX
= 150°C, θ = 120°C/W (NOTE 8)
JA
ꢀꢁꢂ ꢃꢄꢅꢆ
ꢊ
ꢆꢄꢒ ꢌꢉꢓꢔ
ꢋ
ꢐ
ꢚ
ꢙ
ꢁꢇꢀ
ꢈꢄꢉ
ꢃ
ꢝ
ꢔ
ꢜ
ꢄꢅꢆꢇ
ꢈꢉꢊꢇ
ꢋꢉꢊꢇ
ꢀ
ꢁ
ꢂ
ꢃ
ꢍ ꢌ
ꢛ
ꢎ ꢄꢅꢆꢑ
ꢏ ꢈꢉꢊꢑ
ꢐ ꢋꢉꢊꢑ
ꢊꢄꢉ
ꢈ
ꢃ
ꢝ
ꢈ
ꢈ
ꢌ
ꢈ
ꢌ
ꢃ
SHDN
ꢕꢖꢓ ꢒꢇꢗꢘꢇꢙꢓ
ꢍꢚꢛꢓꢇꢜ ꢒꢛꢇꢖꢆꢉꢗ ꢕꢖꢄꢒ
ꢋꢌ ꢂꢍꢌꢎꢍꢏꢅ
ꢐꢑꢒꢅꢍꢋ ꢓꢔꢕꢕ × ꢔꢕꢕꢖ ꢂꢒꢍꢗꢀꢄꢌ ꢋꢘꢉ
T
= 150°C, θ = 35°C/W (NOTE 8)
JMAX
JA
–
EXPOSED PAD (PIN 9) IS V , MUST BE SOLDERED TO PCB
T
= 150°C, θ = 80°C/W (NOTE 8)
JMAX
JA
–
EXPOSED PAD (PIN 7) IS V , MUST BE SOLDERED TO PCB
ꢀꢁꢂ ꢃꢄꢅꢆ
ꢇꢇ
ꢞ
ꢁꢟꢀꢊ
ꢇ
ꢝ
ꢑ
ꢛ
ꢜ
ꢇ0
ꢗ
ꢃ
ꢈꢄꢖꢊ
ꢁꢟꢀꢠ
ꢈꢄꢖꢠ
ꢞꢄꢖꢊ
ꢚ
ꢈ
ꢃ
ꢈ
ꢃ
ꢙ
ꢞꢄꢖꢠ
SHDNA
ꢘ
SHDNB
ꢉꢉ ꢂꢊꢋꢌꢊꢍꢅ
ꢇ0ꢎꢏꢅꢊꢉ ꢐꢑꢒꢒ × ꢑꢒꢒꢓ ꢂꢏꢊꢔꢀꢄꢋ ꢉꢕꢖ
T
= 125°C, θ = 43°C/W (NOTE 8)
JMAX
JA
–
EXPOSED PAD (PIN 11) IS V , MUST BE SOLDERED TO PCB
Rev 0
2
For more information www.analog.com
LTC6226/LTC6227
ORDER INFORMATION
LEAD FREE FINISH
LTC6226IS6#TRMPBF
LTC6226HS6#TRMPBF
LTC6226IDC#TRMPBF
LTC6226HDC#TRMPBF
LTC6226IS8#PBF
TAPE AND REEL
PART MARKING
LTHGY
LTHGY
LHGZ
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 85°C
–40ºC to 125°C
–40°C to 85°C
–40ºC to 125°C
–40°C to 85°C
–40ºC to 125°C
–40°C to 85°C
–40ºC to 125°C
–40°C to 85°C
–40ºC to 125°C
LTC6226IS6#TRPBF
LTC6226HS6#TRPBF
LTC6226IDC#TRPBF
LTC6226HDC#TRPBF
LTC6226IS8#TRPBF
LTC6226HS8#TRPBF
LTC6227IMS8E#TRPBF
LTC6227HMS8E#TRPBF
LTC6227IDD#TRPBF
LTC6227HDD#TRPBF
6-Lead TSOT-23
6-Lead TSOT-23
6-Lead 2mm × 2mm DFN
6-Lead 2mm × 2mm DFN
8-Lead SOIC-8
LHGZ
6226
LTC6226HS8#PBF
6226
8-Lead SOIC-8
LTC6227IMS8E#PBF
LTC6227HMS8E#PBF
LTC6227IDD#PBF
LTHHB
LTHHB
LHHC
8-Lead MSOP, Exposed Pad
8-Lead MSOP, Exposed Pad
10-Lead 3mm × 3mm DFN
10-Lead 3mm × 3mm DFN
LTC6227HDD#PBF
LHHC
Contact the factory for parts specified with wider operating temperature ranges.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
ELECTRICAL CHARACTERISTICS (VS = 5V) The ldenotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C. VS = ±5V,VCM = 0V, VSHDN = floating unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
OS
Input Offset Voltage
–95
–225
20
95
225
μV
μV
l
ΔV
Input Offset Voltage Match (Channel to
Channel, LTC6227, Note 5)
–140
–400
18
140
400
μV
μV
OS
l
l
T
Input Offset Voltage Drift
Input Bias Current (Note 6)
0.4
μV/°C
CVOS
I
B
–20
–25
–8.4
μA
μA
l
l
l
l
ΔI
Input Bias Current Match
(Channel to Channel,LTC6227, Note 5)
–2
–3
0.3
0.2
2
3
µA
µA
B
I
Input Offset Current
–0.35
–0.5
0.35
0.5
μA
µA
OS
ΔI
Input OffsetCurrent Match
(Channel to Channel, LTC6227, Note 5)
–0.7
–1
0.15
0.7
1
µA
µA
OS
e
Input Noise Voltage Spectral Density
Integrated 1/f Noise
f = 1MHz
1
nV/√Hz
n
0.1Hz to 10Hz
f = 1MHz
0.77
2.4
μV
P-P
i
n
Input Noise Current Spectral Density
Input Capacitance
pA/√Hz
C
Differential Mode
Common Mode
3
1
pF
pF
IN
R
IN
Input Resistance
Differential Mode
Common Mode
4.7
6
kΩ
MΩ
A
Large Signal Voltage Gain
R = 1kΩ to Half Supply V = 4V
OUT
114
110
139
110
114
dB
dB
VOL
L
l
l
R = 100Ω to Half Supply V
= 2.5V
93
88
dB
dB
L
OUT
–
+
CMRR
Common Mode Rejection Ratio
V
= V – 0.1V to V – 1.2V
100
95
dB
dB
CM
l
l
–
+
V
Input Common Mode Range (Note 10)
Positive Power Supply Rejection Ratio
V – 0.1
V – 1.2
V
CMR
+
–
+
PSRR
V = –1V, V = 1.8V to 10.75V
100
95
115
dB
dB
l
Rev 0
3
For more information www.analog.com
LTC6226/LTC6227
ELECTRICAL CHARACTERISTICS (VS = 5V) The ldenotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C. VS = ±5V,VCM = 0V, VSHDN = floating unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
–
+
–
PSRR
Negative Power Supply Rejection Ratio
V = 1.5V, V = –1.3V to –10.25V
103
108
127
dB
dB
l
l
+
–
Supply Voltage Range (V – V ) (Note 7)
Output Swing Low (V – V
2.8
11.75
V
V
)
EE
No Load
19
100
330
14
21
26
mV
mV
OL
OH
OUT
l
l
l
l
l
l
l
l
l
I
I
= 5mA
45
120
mV
mV
SINK
SINK
= 25mA
427
670
mV
mV
V
Output Swing High (V – V
)
OUT
No Load
20
26
mV
mV
CC
I
I
= 5mA
140
600
–64
60
180
200
mV
mV
SINK
= 25mA
1000
1370
mV
mV
SOURCE
I
SC
Output Short-Circuit Current
Supply Current per Channel
Sourcing
Sinking
–42
–35
mA
mA
45
32
mA
mA
I
I
5.5
350
5.8
7.4
mA
mA
S
+
Disable Supply Current Per Channel, Amplifier
Off
V
SHDN
= V – 2.75V
450
520
μA
μA
SD
l
l
l
l
l
+
V
V
SHDN Pin Input Voltage Low, Disable Amplifier
SHDN Pin Input Voltage High, Enable Amplifier
SHDN Pin Input Current, Disable Amplifier
SHDN Pin Input Current, Enable Amplifier
Output Leakage Current in Shutdown
–3dB Closed Loop Bandwidth
V – 2.75
V
V
L_SHDN
H_SHDN
L_SHDN
H_SHDN
OSD
+
V – 1.6
–10
+
I
I
I
V
V
= V – 2.75V
–2.5
–0.3
100
330
420
10
10
μA
SHDN
+
= V – 1.6V
–10
μA
SHDN
nA
BW
A = 1, R = 1kΩ to Half Supply
V
MHz
L
GBW
Gain-Bandwidth Product
f = 5MHz, R = 1kΩ to Half Supply
350
300
MHz
MHz
L
l
+
+
t
t
t
Turn-On Time
V
V
= V – 2.75V to V – 1.6V
2100
800
58
ns
ns
ns
ns
ns
ON
SHDN
+
+
Turn-Off Time
= V – 1.6V to V – 2.75V
OFF
SHDN
Settling Time to 0.1%
A = 1, 2V Output Step, R = 1kΩ
V L
S_0.1
A = 1, 4V Output Step, R = 1kΩ
61
V
L
t
Settling Time to 0.01%
A = 1, 6V Output Step, R = 1kΩ
150
S_0.01
V
L
Rev 0
4
For more information www.analog.com
LTC6226/LTC6227
ELECTRICAL CHARACTERISTICS (VS = 5V) The ldenotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C. VS = ±5V,VCM = 0V, VSHDN = floating unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
A = +4, 8V Output Step (Note 9)
MIN
TYP
MAX
UNITS
SR
Slew Rate
115
90
180
V/μS
V/μS
V
l
FPBW
Full Power Bandwidth
V
= 8V , A = +2, THD < –40dBc
5.5
MHz
OUT
P-P
V
HD2/HD3 Harmonic Distortion, R = 1kΩ to Half Supply, f = 100kHz, V = 4V
P-P
–128/–136
–99/–91
–104/–95
–89/–79
–91/–80
dBc
dBc
dBc
dBc
dBc
L
C
O
A = +1
f = 1MHz, V = 4V
V
C O P-P
f = 1MHz, V = 2V
C
O
P-P
P-P
P-P
f = 2MHz, V = 4V
C
O
f = 2MHz, V = 2V
C
O
Harmonic Distortion, R = 100Ω to Half Supply, f = 100kHz, V = 4V
–111/–123
–93/–77
–96/–80
–89/–70
–90/–70
dBc
dBc
dBc
dBc
dBc
L
C
O
P-P
P-P
A = +1
f = 1MHz, V = 4V
V
C O
f = 1MHz, V = 2V
C
O
P-P
P-P
P-P
f = 2MHz, V = 4V
C
O
f = 2MHz, V = 2V
C
O
ΔG
Differential Gain
Differential Phase
A = 2, R = 150Ω
0.4
%
%
V
L
A = +1, R = 1kΩ
0.08
V
L
Δθ
A = 2, R = 150Ω
0.025
0.13
Deg
Deg
V
L
A = +1, R = 1kΩ
V
L
ELECTRICAL CHARACTERISTICS (VS = 5V, 0V) The l denotes the specifications which apply
over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 5V, 0V,VCM = VOUT = 2.5V, VSHDN = floating
unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
OS
Input Offset Voltage
–100
–235
20
100
235
μV
μV
l
ΔV
Input Offset Voltage Match
–140
–400
18
140
400
µV
µV
OS
l
l
(Channel to Channel, LTC6227, Note 5)
T
Input Offset Voltage Drift
Input Bias Current (Note 5)
0.4
μV/°C
CVOS
I
B
–20
–25
–8.4
μA
μA
l
l
ΔI
Input Bias Current Match
(Channel to Channel, LTC6227, Note 5)
–2
–3
0.3
0.2
2
3
µA
µA
B
I
Input Offset Current
–0.35
–0.5
0.35
0.5
μA
µA
OS
ΔI
Input Offset Current Match
(Channel to Channel, LTC6227, Note 5)
–0.7
–1
0.15
0.7
1
µA
µA
OS
l
e
Input Noise Voltage Spectral Density
Integrated 1/f Noise
f = 1MHz
1
nV/√Hz
n
0.1Hz to 10Hz
f = 1MHz
0.77
2.4
μV
P-P
i
n
Input Noise Current Spectral Density
Input Capacitance
pA/√Hz
C
Differential Mode
Common Mode
3
1
pF
pF
IN
R
IN
Input Resistance
Differential Mode
Common Mode
4.7
6
kΩ
MΩ
A
Large Signal Voltage Gain
R = 1kΩ to Half Supply
OUT
114
110
135
120
114
dB
dB
VOL
L
l
l
V
= 0.5V to 4.5V
R = 100Ω to Half Supply
105
93
dB
dB
L
OUT
V
= 0.9V to 4.1V
–
+
CMRR
Common Mode Rejection Ratio
V
= V – 0.1V to V – 1.2V
99
95
dB
dB
CM
Rev 0
5
For more information www.analog.com
LTC6226/LTC6227
ELECTRICAL CHARACTERISTICS (VS = 5V, 0V) The l denotes the specifications which apply
over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 5V, 0V,VCM = VOUT = 2.5V, VSHDN = floating
unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
–
+
l
l
V
Input Common Mode Range (Note 10)
Positive Power Supply Rejection Ratio
V – 0.1
V – 1.2
V
CMR
+
–
–
+
PSRR
V = –1V, V = 1.8V to 10.75V
100
95
115
127
dB
dB
+
–
PSRR
Negative Power Supply Rejection Ratio
V = 1.5V, V = –1.3V to –10.25V
103
100
dB
dB
l
l
+
–
Supply Voltage Range (V – V ) (Note 7)
Output Swing Low (V – V
2.8
11.75
V
V
V
)
EE
No Load
16
90
21
23
mV
mV
OL
OUT
l
l
l
l
l
l
l
l
l
I
I
= 5mA
110
155
mV
mV
SINK
= 15mA
220
11
270
370
mV
mV
SINK
Output Swing High (V – V
)
No Load
15
20
mV
mV
OH
CC
OUT
I
I
= 5mA
150
331
–52
57
180
200
mV
mV
SINK
= 15mA
500
650
mV
mV
SOURCE
I
SC
Output Short-Circuit Current
Supply Current per Channel
Sourcing
Sinking
–34
–30
mA
mA
42
30
mA
mA
I
I
5.8
245
6.3
7.6
mA
mA
S
+
Disable Supply Current Per Amplifier, Amplifier
Off
V
SHDN
= V – 2.65V
310
330
μA
μA
SD
l
l
l
l
l
+
V
V
SHDN Pin Input Voltage Low, Disable Amplifier
SHDN Pin Input Voltage High, Enable Amplifier
SHDN Pin Input Current, Disable Amplifier
SHDN Pin Input Current, Enable Amplifier
Output Leakage Current in Shutdown
–3dB Closed Loop Bandwidth
V – 2.65
V
V
L_SHDN
H_SHDN
L_SHDN
H_SHDN
OSD
+
V – 1.6
+
I
I
I
V
V
= V – 2.65V
–10
–10
–2.9
–0.3
100
490
430
10
10
μA
SHDN
+
= V – 1.6V
μA
SHDN
nA
BW
A = 1, R = 1kΩ to Half Supply
V
MHz
L
GBW
Gain-Bandwidth Product
f = 5MHz, R = 1kΩ to Half Supply
350
290
MHz
MHz
L
l
+
+
t
t
t
Turn-On Time
V
V
= V – 2.65V to V – 1.6V
2100
800
59
ns
ns
ns
ON
SHDN
+
+
Turn-Off Time
= V – 1.6V to V – 2.65V
OFF
SHDN
Settling Time to 0.1%
A = 1, 2V Output Step, R = 1kΩ
V L
S_0.1
Rev 0
6
For more information www.analog.com
LTC6226/LTC6227
ELECTRICAL CHARACTERISTICS (VS = 5V, 0V) The l denotes the specifications which apply
over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 5V, 0V,VCM = VOUT = 2.5V, VSHDN = floating
unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
140
6
MAX
UNITS
V/μS
MHz
SR
Slew Rate
A = +4, 4V Output Step (Note 9)
V
FPBW
Full Power Bandwidth
V
= 4V , A = +2, THD < –40dBc
OUT P-P V
HD2/HD3 Harmonic Distortion, R = 1kΩ to Half Supply
f = 100kHz, V = 2V
P-P
–125/–135
–104/–106
–90/–90
dBc
dBc
dBc
L
C
O
f = 1MHz, V = 2V
C
O
P-P
f = 2MHz, V = 2V
C
O
P-P
Harmonic Distortion, R = 100Ω to Half Supply f = 100kHz, V = 2V
–112/–128
–96/–88
–88/–74
dBc
dBc
dBc
L
C
O
P-P
P-P
f = 1MHz, V = 2V
C
O
f = 2MHz, V = 2V
C
O
P-P
ΔG
Differential Gain
Differential Phase
A = 2, R = 150Ω
0.17
0.09
%
%
V
L
A = +1, R = 1kΩ
V
L
Δθ
A = 2, R = 150Ω
0.3
0.04
Deg
Deg
V
L
A = +1, R = 1kΩ
V
L
ELECTRICAL CHARACTERISTICS (VS = 3V, 0V) The l denotes the specifications which apply
over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 3V, 0V,VCM = 1.5V, VSHDN = floating unless
otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
OS
Input Offset Voltage
–110
–250
24
110
250
μV
μV
l
ΔV
Input Offset Voltage Match
–140
–400
18
140
400
µV
µV
OS
l
l
(Channel to Channel, LTC6227, Note 5)
T
Input Offset Voltage Drift
Input Bias Current (Note 6)
0.4
μV/°C
CVOS
I
B
Bias Cancellation Disabled
–20
–26
–8.4
μA
μA
l
l
l
l
ΔI
Input Bias Current Match
(Channel to Channel, LTC6227, Note 5)
–2
–3
0.3
0.2
2
3
µA
µA
B
I
Input Offset Current
–0.35
–0.5
0.35
0.5
μA
µA
OS
ΔI
Input Offset Current Match
(Channel to Channel,LTC6227, Note 5)
–0.7
–1
0.15
0.7
1
μA
µA
OS
e
Input Noise Voltage Spectral Density
Integrated 1/f Noise
f = 1MHz
1
nV/√Hz
n
0.1Hz to 10Hz
f = 1MHz
0.77
2.4
μV
P-P
i
n
Input Current Noise Spectral Density
Input Capacitance
pA/√Hz
C
Differential Mode
Common Mode
3
1
pF
pF
IN
R
IN
Input Resistance
Differential Mode
Common Mode
4.7
6
kΩ
MΩ
A
Large Signal Voltage Gain
R = 1kΩ to Half Supply,
OUT
114
100
135
114
114
dB
dB
VOL
L
(V
l
= V
1V)
CM
R = 100Ω to Half Supply,
dB
L
OUT
(V
= V
1V)
CM
–
+
CMRR
Common Mode Rejection Ratio
V
CM
= V – 0.1V to V – 1.2V
98
90
dB
dB
l
l
–
+
V
Input Common Mode Range (Note 10)
Positive Power Supply Rejection Ratio
V – 0.1
V – 1.2
V
CMR
+
–
+
PSRR
V = –1V, V = 1.8V to 10.75V
100
95
115
dB
dB
l
Rev 0
7
For more information www.analog.com
LTC6226/LTC6227
ELECTRICAL CHARACTERISTICS (VS = 3V, 0V) The l denotes the specifications which apply
over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 3V, 0V,VCM = 1.5V, VSHDN = floating unless
otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
–
+
–
PSRR
Negative Power Supply Rejection Ratio
V = 1.5V, V = –1.3V to –10.25V
103
100
127
dB
dB
l
l
+
–
Supply Voltage Range (V – V ) (Note 7)
Output Swing Low (V – V
2.8
11.75
V
V
)
EE
No Load
12
91
14
18
mV
mV
OL
OH
OUT
l
l
l
l
l
l
I
I
= 5mA
121
160
mV
mV
SINK
= 10mA
161
10
205
275
mV
mV
SINK
V
Output Swing High (V – V
)
OUT
No Load
14
18
mV
mV
CC
I
I
= 5mA
150
250
180
230
mV
mV
SINK
= 10mA
330
430
mV
mV
SOURCE
I
Output Short Circuit Current
Supply Current/Channel
Sourcing
Sinking
47
57
mA
mA
SC
I
I
5.5
6
mA
mA
S
l
l
7.25
+
Disable Supply Current, Amplifier Off
V
SHDN
= V – 2.65V
195
247
278
μA
µA
SD
+
l
l
l
l
V
V
SHDN Pin Input Voltage Low, Disable Amplifier
SHDN Pin Input Voltage High, Enable Amplifier
SHDN Pin Input Current, Disable Amplifier
SHDN Pin Input Current, Enable Amplifier
Output Leakage Current in Shutdown
–3dB Closed Loop Bandwidth
V – 2.65
V
V
L_SHDN
H_SHDN
L_SHDN
H_SHDN
OSD
+
V – 1.6
–10
+
I
I
I
V
V
= V – 2.65V
–2.9
0.3
10
10
μA
SHDN
+
= V – 1.6V
–10
μA
SHDN
100
450
415
nA
BW
A = 1, R = 1kΩ to Half Supply
MHz
V
L
GBW
Gain-Bandwidth Product
f = 5MHz, R = 1kΩ to Half Supply
340
280
MHz
MHz
L
l
+
+
t
t
t
Turn-On Time
V
V
= V – 2.65V to V – 1.6V
2100
800
84
ns
ns
ns
ON
SHDN
+
+
Turn-Off Time
= V – 1.6V to V – 2.65V
OFF
SHDN
Settling Time to 0.1%
A = 1, V = 1V, 1V Output Step,
V CM
R = 1kΩ to V
S_0.1
L
CM
SR
Slew Rate (Note 9)
A = +4, 2V Output Step
100
8
V/μS
MHz
V
FPBW
Full Power Bandwidth
V
= 2V , A = –1, THD < –40dBc
OUT P-P V
Rev 0
8
For more information www.analog.com
LTC6226/LTC6227
ELECTRICAL CHARACTERISTICS (VS = 3V, 0V) The l denotes the specifications which apply
over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = 3V, 0V,VCM = 1.5V, VSHDN = floating unless
otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
HD2/HD3 Harmonic Distortion, R = 1kΩ to V
,
f = 100kHz
–122/–137
–108/–111
–95/–95
dBc
dBc
dBc
L
CM
C
V
= 1V , V = 1V
f = 1MHz
OUT
P-P CM
C
f = 2MHz
C
Harmonic Distortion, R = 100Ω to V
,
f = 100kHz
–113/–130
–100/–94
–90/–79
dBc
dBc
dBc
L
CM
C
V
= 1V , V = 1V
f = 1MHz
OUT
P-P CM
C
f = 2MHz
C
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 5: Matching parameters are the difference between amplifiers A and
B on the LTC6227.
Note 6: The input bias current is the average of the average of the currents
through the positive and negative input pins.
Note 2: The inputs are protected by back-to-back diodes. If any of
the input or shutdown pins goes 300mV beyond either supply or the
differential input voltage exceeds 0.7V, the input current should be limited
to less than 10mA.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output current is high.
Note 7: Supply Voltage Range is guaranteed by Power Supply Rejection
Ratio test.
Note 8: Thermal resistance varies with the amount of PC board metal
connected to the package. The specified values are with short traces
connected to the leads.
Note 9: Middle 2/3 of the output waveform is observed for Slew Rate.
Note 4: The LTC6226I/LTC6227I are guaranteed functional and specified
over the temperature range of –40°C to 85°C. The LTC6226H/LTC6227H
are guaranteed and specified functional over the temperature range of
–40°C to 125°C.
R = 1k to half supply.
Note 10: Input Common Mode Range is guaranteed by Common Mode
Rejection Ratio Test.
L
VS = ±5V, VCM = 0V, RL = 1kΩ to Half Supply,
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
Offset Distribution
Offset Distribution
Offset Distribution
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀ
ꢀ
ꢀꢁ
ꢀ ꢀ ꢁꢂꢃꢄ
ꢀ ꢁꢂꢃ 0ꢂ
ꢀ
ꢀ ꢁꢂꢃ 0ꢂ
ꢀ
ꢀ
ꢀꢁ
ꢀ ꢁꢂꢃꢄ
ꢁꢂ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ 0ꢁ
ꢀꢁ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ
ꢀ
ꢀ
00
00
ꢁ00 ꢂꢃꢄꢀꢅ
0
0
0
ꢀꢁ0 ꢀꢁ0 ꢀꢁ0 ꢀꢁ0 ꢀꢁ0
0
ꢀ0 ꢀ0 ꢀ0 ꢀ0 ꢀ0
ꢀꢁ0 ꢀꢁ0 ꢀꢁ0 ꢀꢁ0 ꢀꢁ0
0
ꢀ0 ꢀ0 ꢀ0 ꢀ0 ꢀ0
ꢀꢁ0 ꢀꢁ0 ꢀꢁ0 ꢀꢁ0 ꢀꢁ0
0
ꢀ0 ꢀ0 ꢀ0 ꢀ0 ꢀ0
ꢀꢁꢂꢃꢄ ꢅꢆꢆꢇꢈꢄ ꢉꢅꢊꢄꢋꢌꢈ ꢍꢎꢉꢏ
ꢀꢁꢂꢃꢄ ꢅꢆꢆꢇꢈꢄ ꢉꢅꢊꢄꢋꢌꢈ ꢍꢎꢉꢏ
ꢀꢁꢂꢃꢄ ꢅꢆꢆꢇꢈꢄ ꢉꢅꢊꢄꢋꢌꢈ ꢍꢎꢉꢏ
ꢀꢁꢁꢀꢂ ꢃ0ꢄ
ꢀꢁꢁꢀꢂ ꢃ0ꢁ
ꢀꢁꢁꢀꢂ ꢃ0ꢄ
Rev 0
9
For more information www.analog.com
LTC6226/LTC6227
VS = ±5V, VCM = 0V, RL = 1kΩ to Half Supply,
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
VOS vs Temperature, 10V Supply
VOS vs Temperature, 5V Supply
VOS vs Temperature, 3V Supply
ꢀ00
ꢀ0
ꢀ0
ꢀ00
ꢀ0
ꢀ0
ꢀ00
ꢀ0
ꢀ0
ꢀ
ꢀ
ꢁꢂ
ꢀ 0ꢁ
ꢀ
ꢀ ꢁꢂꢃ 0ꢂ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ ꢁꢂꢃ 0ꢂ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ ꢁꢂꢃꢄꢅꢂꢆ
ꢀ ꢁꢂꢃꢄꢅꢂꢆ
ꢀ ꢁꢂꢃꢄꢅꢂꢆ
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
0
0
0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁꢁ ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀ0ꢁ ꢀꢁꢂ
ꢀꢁꢁ ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀ0ꢁ ꢀꢁꢂ
ꢀꢁꢁ ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀ0ꢁ ꢀꢁꢂ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢁꢀꢂ ꢃ0ꢄ
ꢀꢁꢁꢂ ꢃ0ꢄ
ꢀꢁꢁꢀꢂ ꢃ0ꢀ
Offset Voltage vs
Input Common Mode Voltage
Offset Voltage vs Output Current
Warm Up Drift vs Time
ꢀ00
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀ00
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
0
ꢀ00
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀ
ꢀ
ꢀ ꢁꢂ
ꢀ
ꢀ ꢁꢂ
ꢀ
ꢀ
ꢀ
ꢀ
ꢁꢂ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ ꢁꢂꢃꢄꢅ
ꢀ
ꢀ ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ ꢁꢂꢂꢃꢄ
ꢀ
ꢀ
ꢀ0
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ0
ꢀ
ꢀꢁꢂꢃꢄ
ꢀꢁꢂꢃ
ꢀ0
ꢀꢁꢂꢃ
0
ꢀꢁꢁꢂꢃ
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0 ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁ
0
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ ꢀ0
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢁꢂꢃꢁꢂ ꢄꢁRRꢅꢆꢂ ꢇꢈꢉꢊ
ꢀꢁꢂꢃ ꢄꢅꢀꢃR ꢆꢇꢈꢃR ꢉꢆ ꢊꢋꢌꢍ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢇꢆꢁ ꢇꢆꢈꢉ ꢊꢆꢋꢄꢌꢍꢉ ꢎꢊꢏ
ꢀꢁꢁꢀꢂ ꢃ0ꢄ
ꢀꢁꢁꢀꢂ ꢃ0ꢄ
ꢀꢁꢁꢀꢂ ꢃ0ꢂ
Input Noise Voltage and Noise
Current Spectral Densities
vs Frequency
Input Bias Current vs
Input Common Mode Voltage
0.1Hz to 10Hz Voltage Noise
ꢀ00ꢁ0
ꢀ00ꢁ0
ꢀ00ꢁ0
ꢀ00ꢁ0
ꢀ00ꢁ0
0
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀ
ꢀ
ꢁꢂ
ꢀ
ꢀ
ꢀ
ꢁꢂ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ ꢁꢂꢂꢃꢄ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ00
ꢀ0
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀꢁꢁ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁ00ꢂ0
ꢀꢁ00ꢂ0
ꢀꢁ00ꢂ0
ꢀꢁ00ꢂ0
ꢀꢁ00ꢂ0
ꢀ ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄꢅ
ꢀ
e
ꢀ
0ꢀꢁ
ꢀꢁꢁꢀꢂ ꢃꢄꢄ
ꢀꢁꢂꢃꢄꢅ
0ꢀꢁ
ꢀ
ꢀ0 ꢀ00 ꢀꢁ ꢀ0ꢁ ꢀ00ꢁ ꢀꢁ ꢀ0ꢁꢀ00ꢁ
ꢀꢁꢂꢃ ꢀꢁꢂꢃ ꢀꢁꢂꢃ ꢀꢁꢂꢃ ꢀꢁꢂꢁ ꢀ0ꢁꢂ 0ꢀꢁ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢇꢆꢁ ꢇꢆꢈꢉ ꢊꢆꢋꢄꢌꢍꢉ ꢎꢊꢏ
ꢀꢁꢁꢀꢂ ꢃꢄꢁ
ꢀꢁꢁꢀꢂ ꢃꢄ0
Rev 0
10
For more information www.analog.com
LTC6226/LTC6227
VS = ±±V, VCM = 0V, RL = 1kΩ to Half Supply,
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 2±°C, unless otherwise noted.
Supply Current vs Input Common
Mode Voltage
Supply Current
Supply Current vs Supply Voltage
vs SHDN Pin Voltage
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢀ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0
ꢀ
ꢀ ꢁ ꢀꢁ
ꢀ
ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢀ
ꢀ ꢁꢂꢃꢄꢅ
ꢀꢁ ꢂ ꢃꢀ
ꢀ
ꢀꢁꢂꢃ
ꢀ ꢀ ꢁꢂꢃꢄꢅ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀꢁꢂꢃ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀꢁꢁꢂꢃ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ
ꢀ ꢁꢂꢂꢃꢄ
ꢀ
ꢀ
ꢀ ꢁꢂꢂꢃꢄ
ꢀ
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ0 ꢀꢀ ꢀꢁ
ꢀꢁꢂꢃꢀꢁꢂꢃꢀꢁꢂꢁꢀꢁꢂꢃꢀꢁꢂꢃꢀ0ꢁꢂ 0ꢀꢁ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁ0 ꢀꢁꢂ
ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢁꢀꢂꢃ ꢄꢅꢆꢆꢃꢇ ꢈꢁꢃꢀꢂꢉꢊ ꢋꢈꢌ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢇꢆꢁ ꢇꢆꢈꢉ ꢊꢆꢋꢄꢌꢍꢉ ꢎꢊꢏ
SHDN ꢀꢁꢂ ꢃꢄꢅꢆꢇꢈꢉ ꢊꢃꢋ
ꢀꢁꢁꢀꢂ ꢃꢄꢅ
ꢀꢁꢁꢀꢂ ꢃ0ꢄꢅ
ꢀꢁꢁꢀꢂ ꢃꢄꢅ
SHDN Pin Current
Output Saturation Voltage
vs SHDN Pin Voltage
Minimum Supply Voltage
vs Load Current (Output High)
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀ00
ꢀ0
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄꢅ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂ
ꢀ
ꢀ ꢁ ꢀꢁꢂ
ꢀꢀ
ꢀ
ꢀ
ꢁꢂ
ꢀꢁ
ꢀ
0
ꢀꢁꢂꢃ
ꢀꢁꢂ0
ꢀꢁꢂꢃ
ꢀꢁ0ꢂ0
ꢀꢁꢂꢃꢄ
ꢀꢁꢂꢃ0
ꢀꢁꢂꢃꢄ
ꢀꢁ0ꢂ0
ꢀ
ꢀ ꢁꢂꢃꢄꢅ
ꢀ
ꢀ0
ꢀ
ꢀ ꢁꢂꢂꢃꢄ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
0ꢀꢁ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ0
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ0
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ ꢁꢂꢃꢄꢅ
ꢀ
ꢀ
ꢀ ꢁꢂꢂꢃꢄ
ꢀ
ꢀ
ꢀ ꢁꢂꢂꢃꢄ
ꢀ
0
ꢀ
ꢀ ꢁꢂꢃꢄꢅ
ꢀ
ꢀꢁ0
0ꢀ0ꢁ
ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢁꢀ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁ0 ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁ0
0ꢀ00ꢁ
0ꢀ0ꢁ
0ꢀꢁ
ꢀ
ꢀ0
ꢀ00
SHDN ꢀꢁꢂ ꢃꢄꢅꢆꢇꢈꢉ ꢊꢃꢋ
ꢀꢁꢀꢂꢃ ꢄꢅꢆꢆꢃꢇ ꢈꢁꢃꢀꢂꢉꢊ ꢋꢈꢌ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢊꢂꢋ
ꢀꢁꢁꢀꢂ ꢃꢄꢀ
ꢀꢁꢁꢀꢂ ꢃꢄꢂ
ꢀꢁꢁꢀꢂ ꢃꢄꢅ
Output Saturation Voltage
Output Short Circuit Current
vs Supply Voltage
vs Load Current (Output Low)
Open Loop Gain, VS = ±5V
ꢀ
ꢀ00
ꢀ0
ꢀ0
ꢀꢁ
ꢀ
ꢀ ꢁꢂꢂꢃꢄ
ꢀ
ꢀꢁꢂꢃ
ꢀ
ꢀ
ꢀ
ꢁꢂ
R =1kΩ
R =100Ω
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄꢅ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ
ꢀ ꢁꢂꢃꢄꢅ
ꢀ
ꢀ0
ꢀ
0ꢀꢁ
0
0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ00
ꢀꢁ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ ꢁꢂꢃꢄꢅ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ0
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ
ꢀ ꢁꢂ ꢃꢄ
ꢀ
ꢀ
ꢀ ꢁꢂꢂꢃꢄ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ
ꢀ ꢁꢂꢂꢃꢄ
ꢀ
ꢀꢁꢂRꢃꢄ
ꢀ
0ꢀ0ꢁ
0ꢀ00ꢁ
0ꢀ0ꢁ
0ꢀꢁ
ꢀ
ꢀ0
ꢀ00
ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢀ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ ꢀ0ꢁ0ꢀ0ꢁꢂꢀꢀꢁꢂ
ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢁꢂꢃ ꢄꢅRRꢆꢇꢈ ꢉꢊꢂꢋ
ꢀꢁꢀꢂꢃ ꢄꢅꢆꢆꢃꢇ ꢈꢁꢃꢀꢂꢉꢊ ꢋꢈꢌ
ꢀꢁꢂꢃꢁꢂ ꢄꢀꢅꢂꢆꢇꢈ ꢉꢄꢊ
ꢀꢁꢁꢀꢂ ꢃꢄꢅ
ꢀꢁꢁꢀꢂ ꢃꢁ0
ꢀꢁꢁꢀꢂ ꢃꢁꢄ
Rev 0
11
For more information www.analog.com
LTC6226/LTC6227
VS = ±5V, VCM = 0V, RL = 1kΩ to Half Supply,
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
Open Loop Gain, VS = ±2.5V
Open Loop Gain, VS = ±1.5V
Gain vs Frequency AV = 1
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ
R =1kΩ
R =1kΩ
ꢀ
ꢀ
R =100Ω
R =100Ω
ꢀ
ꢀ
ꢀꢁ
ꢀꢁ
0
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀ
0
0
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ0
ꢀ
ꢂ
ꢃ ꢀ
ꢁ
ꢀꢁ
R
= 1kΩ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂ ꢃꢄ
ꢀ
ꢀ ꢁꢂ ꢃꢄ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂꢃ ꢀꢁ ꢀꢁꢂꢃ ꢀꢁ ꢀ0ꢁꢂ
0
0ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂꢃ
ꢀꢁ
ꢀ0ꢁꢂ
0
0ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀ0ꢁ
ꢀ00ꢁ
ꢀꢁ
ꢀ0ꢁ
ꢀ00ꢁ
ꢀꢁ
ꢀꢁꢂꢃꢁꢂ ꢄꢀꢅꢂꢆꢇꢈ ꢉꢄꢊ
ꢀꢁꢂꢃꢁꢂ ꢄꢀꢅꢂꢆꢇꢈ ꢉꢄꢊ
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊ
ꢀꢁꢁꢀꢂ ꢃꢁꢁ
ꢀꢁꢁꢀꢂ ꢃꢁꢁ
ꢀꢁꢁꢀꢂ ꢃꢁꢄ
Open Loop Gain and Phase
vs Frequency
Gain Bandwidth and Phase
Margin vs Supply Voltage
Gain vs Frequency AV = 2
ꢀꢁ0
ꢀꢀꢁ
ꢀꢀ0
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀ0ꢁ
ꢀ00
ꢀ0
ꢀꢁ
ꢀꢁ
ꢀꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀ
ꢀ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃꢄ
ꢀꢁꢂꢃꢄ ꢅꢂRꢆꢇꢈ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀꢀ
ꢀꢁ
ꢀꢁ
ꢀ0
ꢀ
ꢀ ꢁꢂꢃꢄ ꢅꢆꢇꢇꢃꢈ
ꢀꢁ
ꢀ
R
= 1kΩ TO HALF SUPPLY
ꢀ
0
ꢀ
ꢀ ꢁꢂ ꢃꢄ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀ
ꢂ ꢃꢀ
ꢁ
ꢀ
ꢀ ꢁꢂ ꢃꢄ
ꢀ
ꢀ
R
ꢀ ꢁꢂ
ꢀꢁꢂꢃ ꢄꢁꢃꢅꢆꢂꢅꢇꢈ ꢉRꢊꢅꢋꢌꢇ
ꢀ
R
R
ꢀ
ꢀ R = 301kΩ
ꢀ
ꢀ ꢁꢂꢃ ꢄ
ꢀ
ꢀ
ꢀ
= 1kΩ
= 1kΩ
ꢀ
ꢀꢁ
ꢀꢁꢂ0 ꢀꢁꢂꢃ ꢀꢁꢂꢃ ꢀꢁꢂꢀ ꢀꢁꢂꢂ ꢀ0ꢁꢂꢃ ꢀꢀꢁꢂꢃ
ꢀ00ꢁ ꢀꢁ
ꢀ0ꢁ
ꢀ00ꢁ
ꢀ00ꢁ
ꢀ0ꢁ
ꢀ00ꢁ
ꢀꢁ
ꢀ0ꢁ
ꢀ00ꢁ
ꢀꢁ
ꢀꢁꢀꢂꢃ ꢄꢅꢆꢆꢃꢇ ꢈꢁꢃꢀꢂꢉꢊ ꢋꢈꢌ
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊ
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊ
ꢀꢁꢁꢀꢂ ꢃꢁꢂ
ꢀꢁꢁꢀꢂ ꢃꢁꢀ
ꢀꢁꢁꢀꢂ ꢃꢁꢄ
Gain Bandwidth and Phase
Margin vs Temperature
Output Impedance
vs Frequency
Common Mode Rejection Ratio
vs Frequency
ꢀ00
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢀ0
ꢀ00
ꢀ0
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢀ
ꢀ0
ꢀ00
ꢀ0
ꢀꢀ0
ꢀ00
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
0
ꢀꢁꢂꢃꢄ ꢅꢂRꢆꢇꢈꢉ ꢊ
ꢀ
ꢁꢂꢃꢄ
ꢀ
ꢀ
ꢀ
ꢀ
ꢁ ꢂ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂ
ꢀ
ꢀ
ꢀ ꢁ0
ꢀ ꢀꢁꢂꢃꢄ
ꢀ
ꢀ ꢀꢁꢂꢃꢄ
ꢀꢁꢂꢃꢄ ꢅꢂRꢆꢇꢈꢉ ꢊ
ꢀ
ꢁꢂꢃꢄ
ꢁꢂꢃ0
ꢀ
ꢀꢁꢂꢃꢄ ꢅꢂRꢆꢇꢈꢉ ꢊ
ꢀ
ꢀ
ꢀ
ꢀꢁꢂꢃ ꢄ
ꢀ
ꢁꢂꢃꢄ
ꢀ
0ꢀꢁ
ꢀ
ꢀ ꢁ
ꢀ
0ꢀ0ꢁ
0ꢀ00ꢁ
0ꢀ000ꢁ
ꢀꢁꢂꢃ ꢄ
ꢀ
ꢁꢂ
ꢀ
ꢀ
ꢀ
ꢀ ꢁ
ꢀꢁꢂꢃ ꢄ
ꢀ ꢁꢂꢃꢄ
ꢀ
R
ꢀ
= 1kΩ
ꢀꢁꢁ ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀ0ꢁ ꢀꢁꢂ
ꢀ0ꢁ
ꢀ00ꢁ
ꢀꢁ
ꢀ0ꢁ
ꢀ00ꢁ
ꢀ00ꢁ
ꢀꢁ
ꢀ0ꢁ
ꢀ00ꢁ ꢀ00ꢁ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊ
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊ
ꢀꢁꢁꢀꢂ ꢃꢁꢄ
ꢀꢁꢁꢀꢂ ꢃꢁꢄ
ꢀꢁꢁꢀꢂ ꢃꢄ0
Rev 0
12
For more information www.analog.com
LTC6226/LTC6227
VS = ±5V, VCM = 0V, RL = 1kΩ to Half Supply,
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
Power Supply Rejection Ratio
Overshoot
vs Frequency
Slew Rate vs Temperature
vs Capacitive Load (AV = +1)
ꢀꢁ0
ꢀꢀ0
ꢀ0
ꢀ00
ꢀꢁ0
ꢀ00
ꢀꢁ0
ꢀ00
ꢀ0
ꢀ0
ꢀ
ꢀ
ꢀ ꢁꢂꢃR =1kΩ
ꢀ
ꢀ
ꢀ
ꢀ ꢁ ꢂ
ꢀ
–
+
ꢀꢁRR
R
S
V
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀ
OUT
1kΩ
ꢀ
ꢀꢁꢂꢃ Rꢄꢅꢂ ꢆꢂꢄꢀꢇRꢂꢈ ꢄꢅ ꢆꢉꢈꢈꢁꢂ
ꢀꢁRR
V
IN
ꢊꢋꢌ ꢍꢎ ꢍꢇꢅꢏꢇꢅ
C
L
Rꢀꢁꢀꢂꢃ
ꢀ
ꢀ
ꢁꢂꢃ ꢂ ꢀ ꢁꢂ
ꢀꢁꢂ ꢀꢁꢀ
R
S
= 10 Ω
ꢀ
ꢀ
ꢀ
ꢀꢁ
ꢀ ꢁꢂꢃꢄ
ꢁꢂ
ꢀ
ꢀꢁꢂꢂꢃꢄꢅ
ꢀ ꢁꢂ
ꢁꢂꢃ
ꢀ
ꢀ 0ꢁ
ꢀ
ꢀ
ꢀ
ꢀꢁꢀ
R
S
= 20 Ω
ꢀ0
ꢀ
ꢀ
ꢁꢂꢃꢄꢅ
ꢀ
ꢀꢁꢂꢂꢃꢄꢅ
Rꢀꢁꢀꢂꢃ
ꢀ0
R
= 50 Ω
S
ꢀ0
ꢀꢁꢂꢂꢃꢄꢅ
ꢀ
ꢀ
ꢁꢂꢃꢄꢅ ꢄ ꢀ ꢁꢂ
ꢀꢁꢂ ꢀꢁꢀ
ꢀ
ꢀ0
ꢀꢁ0
0
0
ꢀ00
ꢀꢁ
ꢀ0ꢁ ꢀ00ꢁ
ꢀꢁ
ꢀ0ꢁ ꢀ00ꢁ
ꢀꢁꢁ ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀ0ꢁ ꢀꢁꢂ
ꢀ0
ꢀ00
ꢀ000
ꢀ0000
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢁꢀꢃꢄꢃꢅꢆ ꢇꢈꢁꢉ ꢊꢋꢌꢍ
ꢀꢁꢁꢀꢂ ꢃꢄꢅ
ꢀꢁꢁꢀꢂ ꢃꢄꢁ
ꢀꢁꢁꢀꢂ ꢃꢄꢄ
Overshoot
vs Capacitive Load (AV = +2)
Distortion vs Frequency,
AV = 1, ±5V Supply
Distortion vs Frequency,
AV = 1, 5V Supply
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀ
ꢀ
ꢀ ꢁꢂ
R =10Ω C ꢀ 0
ꢀ ꢀ ꢁꢂꢃ 0ꢂ
ꢀ
ꢀ
ꢀ
ꢁꢂ
ꢀ
ꢀ
R
ꢀ ꢁꢂ
=100Ω, 3
ꢀ
ꢀ
ꢀ
ꢀꢁꢂ
ꢀꢁꢀ
ꢀ ꢀꢁꢂꢃꢄ
ꢀꢁ
C
F
R =20Ω C ꢀ 0
ꢀ
ꢀ ꢁꢂ
ꢀꢁꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢁꢂ
ꢀ
R =50Ω C ꢀ 0
R ꢀꢁ ꢂꢃꢄꢅꢆꢇꢈꢈꢉꢊ
ꢀ
ꢀ
ꢀ ꢁꢂ
ꢀꢁꢀ
=1kΩ, 2
ꢀꢁꢂ
ꢀꢁ0
301Ω
ꢀꢁ
R =10Ω C ꢀ ꢁꢂꢃꢄꢅ
ꢀ ꢀꢁꢂꢃꢄ
ꢀ
ꢀꢁ0
301Ω
V
ꢀ
R
ꢀ
–
+
R
ꢀꢁ
V
S
OUT
ꢀꢁ0
R
= 100Ω, 3
R =20Ω C ꢀ ꢁꢂꢃꢄꢅ
ꢀ
ꢀ
IN
ꢀ
ꢀ ꢁꢂ
ꢀꢁꢂ
ꢀꢁꢀ
C
1kΩ
L
ꢀꢁ0
R =50Ω C ꢀ ꢁꢂꢃꢄꢅ
ꢀꢁ
ꢀ
ꢀ
ꢀꢁ0
R =100Ω, 2
ꢀ
ꢀꢁ
= 100Ω, 2
ꢀꢁ0
ꢀꢁ0
R
ꢀ
ꢀꢁ00
ꢀꢁꢁ0
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀꢁ00
ꢀꢁꢁ0
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀ
ꢀ ꢁꢂ
ꢀꢁꢂ
ꢀꢁꢀ
ꢀꢁ
Rꢀ = 1kΩ, 2
ꢀꢁ
= 1kΩ, 2
R
ꢀ
ꢀ
R
ꢀ ꢁꢂ
= 1kΩ, 3
ꢀꢁꢂ
ꢀꢁꢀ
ꢀꢁ
ꢀ
ꢀ
R
ꢀ ꢁꢂ
= 1kΩ, 3
ꢀꢁꢂ
ꢀꢁꢀ
ꢀꢁ
ꢀꢁ
R = 1kΩ, 3
ꢀ
ꢀ
ꢀ0
ꢀ00
ꢀ000
ꢀ0000
ꢀ00ꢁ
ꢀꢁ
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊ
ꢀ0ꢁ
ꢀ00ꢁ
ꢀꢁ
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊ
ꢀ0ꢁ
ꢀꢁꢂꢁꢀꢃꢄꢃꢅꢆ ꢇꢈꢁꢉ ꢊꢋꢌꢍ
ꢀꢁꢁꢀꢂ ꢃꢄꢅ
ꢀꢁꢁꢀꢂ ꢃꢄꢅ
ꢀꢁꢁꢀꢂ ꢃꢄꢀ
Distortion vs Frequency,
AV = 1, 3V Supply
Distortion vs Frequency,
AV = 2, ±5V Supply
Distortion vs Frequency,
AV = 2, 5V Supply
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀꢁ0
ꢀ
ꢀ
ꢀ
ꢁꢂ
ꢀꢁ
= 100Ω, 3
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂꢃ 0ꢂ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂꢃ 0ꢂ
R
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ ꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ ꢂ
ꢀꢁ
ꢀꢁꢀ
ꢀ
ꢀ ꢁꢂ
ꢀꢁꢂ
ꢀꢁꢀ
ꢀ ꢁꢂ
R
ꢀꢁ ꢂꢃꢄꢅꢆꢇꢈꢈꢉꢊ
ꢀ
ꢀ
R
ꢀ
ꢀ ꢁꢂ
= 100Ω, 3
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁꢀ
R
ꢀ
ꢀꢁ0
ꢀꢁ0
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
R
ꢀ ꢁꢂ
ꢀꢁꢀ
= 100Ω, 2
ꢀ
ꢀꢁ0
ꢀꢁꢂ
ꢀꢁ0
ꢀꢁ0
ꢀꢁ
ꢀꢁ
= 100Ω, 3
ꢀ
ꢀꢁ
R
ꢀ
R
ꢀ
= 100Ω, 2
ꢀꢁ0
ꢀꢁ
R
ꢀ
= 1kΩ, 2
ꢀꢁ0
ꢀꢁ0
ꢀꢁ
ꢀ
R
ꢀ ꢁꢂ
=1kΩ, 2
R
ꢀ
= 100Ω, 2
ꢀꢁꢂ
ꢀꢁꢀ
ꢀꢁ0
ꢀꢁ
ꢀ
ꢀꢁ00
ꢀꢁꢁ0
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀꢁ00
ꢀꢁꢁ0
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀ
ꢀ ꢁꢂ
ꢀꢁꢂ
ꢀꢁꢀ
ꢀꢁ0
ꢀꢁ
R
= 1kΩ, 2
ꢀꢁ
ꢀ
R
= 1kΩ, 2
ꢀ
ꢀꢁ00
ꢀꢁꢁ0
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀ
R
ꢀ ꢁꢂ
= 1kΩ, 3
ꢀꢁꢂ
ꢀꢁꢀ
ꢀꢁ
ꢀ
ꢀ
R
ꢀ ꢁꢂ
= 1kΩ, 3
ꢀꢁ
= 1kΩ, 3
ꢀꢁꢂ
ꢀꢁꢀ
R
ꢀ
ꢀꢁ
= 1kΩ, 3
ꢀꢁ
R
ꢀ
ꢀ
ꢀ00ꢁ
ꢀꢁ
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊ
ꢀ0ꢁ
ꢀ00ꢁ
ꢀꢁ
ꢀ0ꢁ
ꢀ00ꢁ
ꢀꢁ
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊ
ꢀ0ꢁ
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊ
ꢀꢁꢁꢀꢂ ꢃꢄꢂ
ꢀꢁꢁꢀꢂ ꢃꢄꢅ
ꢀꢁꢁꢀꢂ ꢃꢄꢅ
Rev 0
13
For more information www.analog.com
LTC6226/LTC6227
VS = ±5V, VCM = 0V, RL = 1kΩ to Half Supply,
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
Distortion vs Frequency,
AV = 2, 3V Supply
Maxium Undistorted Output
Signal vs Frequency
0.1% Settling Time
vs Output Step
ꢀꢁ0
ꢀꢁ0
ꢀ0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0
ꢀ0
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂꢃ 0ꢂ
ꢀ
ꢀ
ꢀ
ꢂ ꢃꢄ
ꢀ
ꢁ
ꢀꢁ
ꢀ
ꢀ
ꢁꢂ
ꢀ
R
ꢀ
ꢀ ꢁ00ꢂ ꢃ
ꢀꢁꢂ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀꢁꢂ
ꢀꢁ ꢂ
ꢀꢁ
ꢀ ꢁꢂꢃꢄ
ꢀ ꢁꢂ
ꢀ ꢁꢂ ꢃꢁꢄꢁꢂꢅꢆꢇꢄꢁꢂ ꢈꢉꢊ ꢋꢌꢍꢎ ꢋꢏꢐꢍ ꢑꢒꢂꢓ
ꢀꢁꢀ
ꢀ
ꢀ
ꢀ ꢁꢂ
ꢀꢁ0
ꢀ
R
ꢀ
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ
ꢀ
ꢀꢁ0
ꢀ
ꢀ ꢁꢂ
ꢀ
ꢀꢁ0
ꢀꢁ
ꢀꢁ
ꢀ ꢀ ꢁꢂ
ꢀ
R
ꢀ
ꢀ ꢁ00ꢂ ꢃ
ꢀ
ꢀ
ꢁꢂꢃꢄ
R
ꢀ ꢁꢂꢃ ꢄ
ꢀ
ꢀ
ꢀꢁ0
ꢀ
ꢀ ꢁꢂ
ꢀ
ꢀꢁ00
ꢀꢁꢁ0
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ
ꢀ ꢁꢂ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ
R
= 1kΩ
ꢀꢁ
ꢀꢁꢂꢃ ꢀꢁꢄ ꢀ ꢁꢂ0ꢃꢄꢅ
R
ꢀ
ꢀ ꢁꢂꢃ ꢄ
ꢀ00ꢁ
ꢀꢁ
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊ
ꢀ0ꢁ
0ꢀꢁ
ꢀ
ꢀ0 ꢀ0
ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ 0 ꢀ ꢀ ꢀ ꢀ ꢀ ꢀ ꢀ ꢀ
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊꢋ
ꢀꢁꢂꢃꢁꢂ ꢄꢂꢅꢃ ꢆꢇꢈ
ꢀꢁꢁꢀꢂ ꢃꢄ0
ꢀꢁꢁꢀꢂ ꢃꢄꢅ
ꢀꢁꢁꢀꢂ ꢃꢄꢁ
SHDN Pin Response Time
Large Signal Response
ꢀ
ꢀ
ꢁꢂ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ ꢁ
ꢀꢁꢂꢃꢄ
ꢅꢆꢇꢈꢀꢆ
R
= 1kΩ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ ꢁꢂ
ꢀ
ꢀ
ꢀ ꢁꢂꢃꢄ
0ꢀ
ꢀꢁꢂꢃꢄꢅꢆꢃ
ꢀ ꢁ
ꢀ
ꢀꢁꢂꢃꢁꢂ
ꢄꢅꢆꢇꢈꢅ
SHDN
ꢀꢁꢀꢂꢃ
ꢄꢃꢅꢆꢇꢃ
ꢀꢁꢁꢀꢂ ꢃꢄꢅ
ꢀꢁꢁꢀꢂ ꢃꢄꢄ
ꢀꢁꢂꢃꢄꢅꢆ
ꢀ00ꢁꢂꢃꢄꢅꢆ
Small Signal Response
Output Overdriven Recovery
ꢀ
ꢀ
ꢁꢂ
ꢀ
ꢀ
ꢀ ꢁꢂ
ꢀ ꢁ
ꢁꢂ
ꢀ
ꢀ
ꢀ
ꢀꢁꢂꢃꢄ
ꢀ
ꢀ
ꢀ
ꢀꢁꢂꢃꢁꢂ
ꢀ ꢀꢁ
R
R =1kΩ
ꢀ
ꢀꢁꢂꢃꢄ
ꢀ ꢀꢁꢂꢃꢄ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀ
ꢀ
ꢅ0ꢆꢇꢈꢉꢀꢇ
ꢀꢁꢂꢃꢁꢂ
ꢀꢁꢂꢃꢄꢁ
ꢀꢁꢂꢃꢄ
ꢀꢁꢂꢃꢄꢁ
ꢀꢁꢂꢃꢁꢂ
ꢄ0ꢅꢆꢇꢈꢉꢆ
ꢀꢁꢁꢀꢂ ꢃꢄꢅ
ꢀꢁꢁꢀꢂ ꢃꢄꢀ
ꢀꢁꢂꢃꢄꢅꢆ
ꢀ00ꢁꢂꢃꢄꢅꢆ
Rev 0
14
For more information www.analog.com
LTC6226/LTC6227
PIN FUNCTIONS
FB (SOIC-8 Only): Feedback Pin. Internally connected to
OUT.
+
SHDN: Shutdown Pin (Active Low). Referenced to V .
When taken 2.75V below V+, the amplifier shuts down
and enters low power mode, with the outputs in a high
impedance state. When left floating, the amplifier is on.
+IN: Non-Inverting Input of Amplifier. Valid input range is
–
+
from V to V – 1.2V
+
V : Positive Supply to Amplifier. Valid range is from 2.8V
–IN: Inverting Input of Amplifier. Valid input range is from
–
to 11.75V when V is 0V.
–
+
V to V – 1.2V
–
V : Negative Supply to Amplifier. Typically 0V. This can
OUT: Output of the Amplifier. Swings rail to rail and can
typically source/sink 60mA of current.
+
–
be made a negative voltage as long as 2.8V ≤ (V – V )
≤ 11.75V
APPLICATIONS INFORMATION
Circuit Description
independent of transistor β. The bootstrap arrangement
also enhances gain by improving output impedance. A
pair of complementary common emitter stages, Q15 and
Q14, enables the output to swing to either rail. The SHDN
Interface block translates the SHDN signal into pwr_dn
for powering down the device (by deactivating current
sourcesI1-I4)andputtingtheoutputinahighimpedance
state (by shorting the bases of Q15/Q14 to the supplies
via M2 and M1).
The LTC6226/LTC6227 have an input signal range that
extends from the negative power supply to 1.2V below
the positive power supply. Figure 1 depicts a simplified
schematicoftheamplifier.TheinputstageconsistsofPNP
transistors Q1 and Q2. Bootstrap transistor Q13 improves
DC accuracy by reducing the offset contribution of the
base currents of Q11 and Q12 since it has twice their col-
lector current thus Q11/Q12 current matching becomes
ꢆ
ꢅ
ꢖꢗꢘꢙꢚꢛ
ꢋꢝ
ꢖꢗꢘꢙꢚꢛ
ꢟꢁ
ꢉꢄꢊ
ꢆ
ꢇ
ꢅ
ꢅ
ꢆ
Rꢝ
Rꢜ
ꢉꢄꢁ
Rꢊ
ꢖꢗꢘꢙꢚꢛ
ꢋꢄ
ꢍꢎꢏꢏꢊ
ꢔꢞꢐ
ꢈꢁ
ꢍꢎꢏꢏꢄ
ꢍꢎꢏꢏꢜ
ꢍꢎꢏꢏꢁ
ꢉꢄꢄ
ꢉꢄꢝ
ꢆꢋꢌ
ꢆꢋꢌ
ꢇ
ꢖꢗꢘꢙꢚꢛ
ꢅ
ꢈ
ꢈ
SHDN
ꢋꢌꢐꢍRꢃꢑꢈꢍ
ꢒꢓꢔꢈꢕ
ꢏꢊ
ꢏꢂ
ꢉꢄ ꢉꢁ
SHDN
ꢆ
ꢅ
ꢖꢗꢘꢙꢚꢛ
ꢒꢞꢃꢃꢍR
ꢑꢌꢏ
ꢋꢜ
ꢍꢎꢏꢏꢝ
ꢔꢞꢐꢢꢞꢐ ꢒꢋꢑꢎ
ꢇ
ꢆ
ꢅ
ꢅ
ꢉꢠ
ꢉꢡ
ꢍꢎꢏꢏꢀ
ꢉꢄ0
ꢖꢗꢘꢙꢚꢛ
Rꢝ
ꢟꢄ
ꢈꢄ
ꢉꢄꢜ
Rꢄ
Rꢁ
ꢇ
ꢅ
ꢀꢁꢁꢀꢂ ꢃ0ꢄ
Figure 1. LTC6226/LTC6227 Simplified Schematic Diagram
Rev 0
15
For more information www.analog.com
LTC6226/LTC6227
APPLICATIONS INFORMATION
Output
ESD
The LTC6226 family has excellent output drive capabil-
ity. The amplifiers can typically deliver more than 50mA
of output drive current at a total supply of 10V, and can
typicallyswingtowithin600mVoftherailforloadcurrents
as high as 25mA. As the supply voltage to the amplifier
decreases, the output current capability also decreases.
Attention must be paid to keep the junction temperature
of the IC below 150°C (refer to power dissipation section)
when the output is in continuous short-circuit. The output
of the amplifier has reverse-biased diodes connected to
each supply. If the output is forced beyond either supply,
extremely high currents will flow through those diodes
whichcanresultindamagetothedevice.Forcingtheoutput
to even 1V beyond either supply could result in several
hundred milliamps of current through either diode. Thus
forcing the output beyond the supplies should be avoided.
The LTC6226 family has reverse biased ESD protection
diodes on all inputs as shown in Figure 1. There is an
additional clamp between the positive and negative sup-
plies that further protects the device during ESD strikes.
Hot plugging of the device into a powered socket must be
avoided since this can trigger the clamp resulting in larger
currents flowing between the supply pins.
Capacitive Loads
The LTC6226/LTC6227 are optimized for high bandwidth
applications, and have not been designed to directly drive
capacitive loads. Hence any trace capacitance at the
output should be made as small as possible. Increased
capacitance at the output creates an additional pole in
the open loop frequency response, worsening the phase
margin. When driving capacitive loads, a resistor of 10Ω
to 100Ω should be connected between the amplifier
output and the capacitive load to avoid ringing or oscil-
lation. The feedback should be taken directly from the
amplifier output. Higher voltage gain configurations tend
to have better capacitive drive capability than lower gain
configurations due to lower closed loop bandwidth and
hence higher phase margin. The graphs titled Overshoot
vs Capacitive Load demonstrate the transient response of
the amplifier when driving capacitive loads with various
series resistors.
Input Protection
The LTC6226/LTC6227 has a pair of back to back diodes
(D5 and D7) to prevent the emitter base breakdown of the
inputtransistorsandlimitthedifferentialinputto 700mV.
Unlike many other high performance amplifiers, the bases
of the input pair transistors Q1 and Q2 are not connected
to the pins using internal resistors to limit input current,
since that would cause the noise to increase. For instance,
a 100Ω resistor in series with each input would generate
1.8nV/√Hz of noise, and the total amplifier noise voltage
would rise from 1nV/√Hz to 2.06nV/√Hz. Once the input
differential voltage exceeds 0.7V, current conducted
though the protection diodes should be limited to 10mA.
This implies 25Ω of protection resistance per quarter volt
(250mV) of overdrive beyond 0.7V. In addition, the input
and shutdown pins have reverse biased diodes connected
tothesupplies.Thecurrentinthesediodesmustbelimited
to less than 10mA. The amplifiers should not be used as
comparators or in other open loop applications.
Rev 0
16
For more information www.analog.com
LTC6226/LTC6227
APPLICATIONS INFORMATION
Feedback Components
Power Dissipation
When feedback resistors are used to set up gain, care
must be taken to ensure that the pole formed by the feed-
back resistors and the parasitic capacitance at the invert-
ing input does not degrade stability. For example if the
amplifier is set up in a gain of +2 configuration with gain
and feedback resistors of 1k, a parasitic capacitance of
7pF (device + PC board) at the amplifier’s inverting input
will cause the part to oscillate, due to a pole formed at
45MHz. An additional capacitor of 7pF across the feedback
resistor as shown in Figure 2 will eliminate any ringing or
oscillation. In general, if the resistive feedback network
results in a pole whose frequency lies within the closed
loop bandwidth of the amplifier, a capacitor can be added
in parallel with the feedback resistor to introduce a zero
whose frequency is close to the frequency of the pole,
improving stability. For high speed designs, minimizing
parasitic inductance is important. The use of capacitors
where the electrodes are terminated on the long side
instead of the short side (for example the use of 0306
instead of 0603 components) can help in this regard.
Care must be taken to ensure that the junction tempera-
ture of the die does not exceed 150°C.
The junction temperature, TJ, is calculated from the ambi-
ent temperature, T , power dissipation, P , and thermal
A
D
resistance, θ :
JA
T = T + (P • θ ).
J
A
D
JA
The power dissipation in the IC is a function of the supply
voltage, output voltage and load resistance. For symmet-
ric supply voltages with output load connected to ground,
the worst-case power dissipation P
occurs when
D(MAX)
the supply current is maximum and the output voltage at
half of either supply voltage for a given load resistance.
P
is approximately (since I actually changes with
D(MAX)
S
output load current) given by:
= (2 • V • I ) + (V /2) /R
L
2
P
D(MAX)
S
S(MAX)
S
Example: For an LTC6227 in a 8-lead MS package operat-
ing on 5V supplies and driving a 250Ω load to ground,
the worst-case power dissipation is approximately given
2
by P
/Amp = (10 • 7.4mA) + (5/2) /250 = 99mW.
If boDth(McAhXa)nnels are loaded identically, the total power
dissipation is 198mW.
ꢂꢄꢃ
ꢅꢆ
At the Absolute Maximum ambient operating temperature,
the junction temperature under these conditions will be:
ꢐ
ꢅꢆ
ꢊ
ꢍꢎꢏ
ꢇ
ꢈꢉR
ꢑ
T = T + (P • θ ) = 125 + 0.198 • 35 = 132°C
J
A
D
JA
ꢊ
ꢀꢁꢁꢀꢂ ꢃ0ꢁ
which is less than the absolute maximum junction tem-
perature for the LTC6227.
ꢋꢌ
Figure 2. 7pF Feedback Cancels Parasitic Pole
Refer to the Pin Configuration section for thermal resis-
tances of various packages
Shutdown
The LTC6226 and LTC6227DD have SHDN pins that can
shut down the amplifier to 350µA typical supply current.
The SHDN pin needs to be taken 2.75V below the posi-
tive supply to shut down. When left floating, the SHDN
pin is internally pulled up to 1.2V below the positive sup-
ply and the amplifier remains on. During shutdown, the
output transistors Q15 and Q14 in Figure 1 are in a high
impedance state.
Board Layout and Bypass Capacitors
High speed and RF board layout techniques should
be applied due to the very high speeds of the signals
involved. For the LTC6226 SOIC-8 package option, the
feedback should be taken from the FB pin rather than from
the output pin, to reduce signal trace length.
Stray capacitances at the –IN and +IN pins should be
made as low as possible to reduce stability degradation.
Rev 0
17
For more information www.analog.com
LTC6226/LTC6227
APPLICATIONS INFORMATION
For single supply applications, it is recommended that high
quality 0.1µF||1000pF ceramic bypass capacitors be placed
directly between each V+ pin and its closest V– pin with
short connections. The V– pins (including the Exposed Pad)
should be tied directly to a low impedance ground plane
with minimal routing. For dual (split) power supplies, it is
recommended that additional high quality 0.1µF||1000pF
Resistor noise dominated the input referred noise of the
gain stage when
2
2
R
EQ
>> e /4kT and R << 4kT/i
n EQ n
Op amp input referred current noise dominates the input
referred noise when
2
R
EQ
>> 4kT/i
n
+
ceramic capacitors be used to bypass V pins to ground
–
With an input referred voltage noise spectral density of
1nV/Hz and an input referred current noise of 2.4pA/Hz,
it is easy to see that the gain stage’s input referred noise
and V pins to ground, again with minimal routing.
Noise Considerations
is dominated by op amp voltage noise when R << 60Ω
EQ
The ultralow input referred voltage noise of of 1nV/√Hz
is equivalent to that of an 60Ω resistor. As with all BJT
input amplifiers, lowering input referred noise is achieved
by increasing the collector current of the input differential
pair, which increases the input referred current noise.
and by resistor noise when
60Ω << R << 2.9kΩ.
EQ
Above an REQ of 2.9kΩ, input referred current noise
dominates.
Figure 3 shows the LTC6226 in a typical gain configuration.
Distortion/Noise Trade-Off
R
ꢅꢆ
R
ꢃ
As evident from the previous section, gain stage noise
ꢇ
ꢍ
can be reduced by reducing R . However, reducing R
ꢌ
EQ
has its disadvantages. In addition to increasing powEeQr
dissipation in the presence of large output signals, the use
of smaller resistors for a given gain results in increased
distortion, because the internal nonlinearities of the op
amp worsen with increasing load current. In addition,
smaller resistors decrease op amp gain and hence can
affect bandwidth. Hence when designing a system using
the LTC6226/LTC6227, it is recommended that the resis-
tor values be limited only by the system noise require-
ments with the caveat that the effect of the impedances'
parasitic capacitances shouldn’t affect the gain below the
intended bandwidth. For example, for a feedback resistor
of 5kΩ, a parasitic capacitor of 400fF will impact gain at
frequencies above 79MHz.
ꢈꢉꢊꢋꢀꢁꢁꢀ
e
ꢌ
R
ꢅꢁ
ꢍ
ꢌ
ꢀꢁꢁꢀꢂ ꢃ0ꢄ
Figure 3.
As can be seen, the input referred noise spectral density
of the gain stage (e ) can be calculated by the following
T
equations:
2
2
2
2
e
T
= e + i R
+ 4kTR
EQ EQ
n
n
Where
R
EQ
= R + R ||R , k is the Boltzmann constant and
S2 S1 F
T is the temperature (in Kelvin).
Op amp input referred noise dominates the input referred
noise of the gain stage when
2
R
EQ
<< e /4kT
n
Rev 0
18
For more information www.analog.com
LTC6226/LTC6227
TYPICAL APPLICATIONS
ADR4533
3.3V
5V
3.3V
+
1/2 LTC6227
3.3V
2.5V
0V
2.2µF
–
33Ω
68pF
+
–
V
V
V
CC REF LOGIC
IN
330pF
AD7380
3.3V
0V
+
68pF
33Ω
1/2 LTC6227
IN
62267 F04
–
–2.5V
Figure 4. Transparent Driver for 16-Bit ADC
16-Bit High Performance Transparent ADC Driver
High Performance Single Ended to Differential 16-Bit
ADC Driver
The ultralow noise and distortion performance of the
LTC6226/LTC6227 makes it an excellent candidate for
driving high sample rate high resolution ADCs. Figure 4
shows the LTC6227 driven by a differential input, driving
an AD7380, a 4Msps, 16-bit ADC. Figure 5 shows the FFT
obtained with a –0.5 dBFS, 50kHz input signal. Spurious
free dynamic range is an excellent 108.5dB with an SNR
of 91dB. Increasing the input frequency to 100kHz results
in excellent performance as well, with a THD of –100dBc,
SNR of 89dB and SFDR of 104.9dB.
In many applications, the signal to be digitized is single
ended, whereas the A/D Converter needs differential inputs
to maximize performance. The LTC6227 can be used to
implement a Single-Ended to differential ADC driver as
shown in Figure 6. One channel is configured in unity gain
and drives another channel configured in an inverting gain
stage of 1, both outputs drive the LTC2323-16 through an
RC filter. Figure 7 shows the FFT obtained with a –1dBFS
156.25kHz input signal, with a demanding 5Msps sample
rate. The obtained SNR of 81 dB is equivalent to that of
the ADC by itself, thus there is no degradation due to the
driver. The SFDR obtained is 84dB.
16-Bit ADC Driver Performance
Input Signal = –0.5dBFS
fSMPL = 4Msps, fIN = 50kHz
0
ꢀꢁꢂꢃꢄ
ꢀ0ꢁꢂꢃ ꢄꢅꢆꢇꢈ ꢉꢄꢊꢅꢋꢌ
ꢀꢁꢀ
ꢀꢁ0
ꢀꢁ0
ꢀꢁR ꢂ ꢃꢄ ꢅꢆ
ꢇꢈꢉ ꢂ ꢊꢄ0ꢋꢌꢍ ꢅꢆ
ꢀꢎꢉR ꢂ ꢄ0ꢍꢌꢏ ꢅꢆ
ꢀꢁ0
ꢀꢁ0
ꢀꢁ00
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀꢁꢂ0
0
ꢀ00
ꢀ00
ꢀꢁ00
ꢀꢁ00
ꢀ000
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊꢋ
ꢀꢁꢁꢀꢂ ꢃ0ꢄ
Figure 5. Measured Performance of LTC6227
Based Driver Driving the AD7380
Rev 0
19
For more information www.analog.com
LTC6226/LTC6227
TYPICAL APPLICATIONS
High Speed Low Voltage Low Noise Instrumentation
Amplifier with High CMRR
rejection. Implementing them using the LT5401 minimizes
gain variation across temperature. The amplifiers were
implemented using instances of the LTC6227MS8, and
supply voltages of 1.5V were used. Figure 9 shows the
measured frequency response, and Figure 10 shows the
measured CMRR of the instrumentation amplifier, with the
single ended output observed. Figure 11 shows the tran-
Figure 8 shows a three op amp instrumentation ampli-
fier with a gain of 10V/V which can operate on a wide
range of supply voltages. The resistors are implemented
using instances of the LT5401, a matched resistor array
chip. The resistor matching of U3 is crucial in achieving
high common mode rejection. The front end gain stage
resistors were also implemented using instances of the
LT5401, but can be implemented using other means
as well, since they are not crucial for common mode
sient response for a 150mV input square wave.The low
P-P
offset and 1/f noise allow for wide band operation down
to DC. The broadband input referred noise of 4.6nV/√Hz
is dominated by the resistors.
5.5V
200pF
4.096V
+
50Ω
A +
IN1
REFOUT1
VBYP1
1/2 LTC6227
0V
10µF
10µF
–
LTC2323-16
310Ω
TO CONTROL
SDO1
CLKOUT
SCK
310Ω
LOGIC
–
(FPGA, CPLD,
DSP, ETC.)
50Ω
A
–
1/2 LTC6227
IN
2.048V
+
200pF
62267 F06
–5.5V
Figure 6. Single-Ended to Differential Driver for 16-Bit ADC
0
ꢀꢁꢂꢃ
ꢀꢁꢂꢃꢄꢁꢅꢆꢇ ꢈꢉꢊꢋꢌ ꢍꢎꢏꢉꢐꢑ
ꢀꢁꢀ
ꢀꢁ0
ꢀꢁ0
ꢀꢁR ꢂ ꢃꢄ ꢅꢆ
ꢀꢁꢂ ꢃ ꢄꢅꢆꢇꢈ ꢉꢊ
ꢀ
ꢀꢁꢂR ꢃ ꢄꢅꢆꢇꢈ ꢉꢊ
ꢀꢁ0
ꢀꢁ0
ꢀꢁ00
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀꢁꢂ0
ꢀꢁꢂ0
0
ꢀ00
ꢀ000
ꢀꢁ00
ꢀ000
ꢀꢁ00
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊꢋ
ꢀꢁꢁꢀꢂ ꢃ0ꢂ
Figure 7. Measured Performance of the LTC6227 Based Single-Ended to Differential Converter Driving the LTC2323-16 ADC
Rev 0
20
For more information www.analog.com
LTC6226/LTC6227
TYPICAL APPLICATIONS
V +
S
U3A 1/2LT5401
IN+
+
U1A
700Ω 350Ω 350Ω 700Ω
2
1/2 LTC6227
CAN BE REPLACED BY SURFACE MOUNTED
RESISTORS IF VERY LOW GAIN DRIFT WITH
TEMPERATURE NOT REQUIRED
–
C1
5.6pF
V +
S
U2A
+
OUT+
1/2 LTC6227
1
C7
3.3pF
700Ω 350Ω 350Ω 700Ω
U5A 1/2LT5401
–
IF DIFFERENTIAL
OUTPUTS REQUIRED
11
1
700Ω 350Ω 350Ω 700Ω
700Ω 350Ω 350Ω 700Ω
U3B 1/2LT5401
U4A 1/2LT5401
U6B 1/2LT5401
U5B 1/2LT5401
2
5
U2B
+
OUT–
1/2 LTC6227
6
–
3.3pF
U6A 1/2LT5401
V –
S
700Ω 350Ω 350Ω 700Ω
10
700Ω 350Ω 350Ω 700Ω
U4B 1/2LT5401
C2
5.6pF
–IN
+
1/2 LTC6227
U2B
–
V –
S
Figure 8. High Speed High CMRR Instrumentation Amplifier
Rev 0
21
For more information www.analog.com
LTC6226/LTC6227
TYPICAL APPLICATIONS
ꢀ0
ꢀꢁ
ꢀ0
ꢀꢁ
ꢀ0
ꢀ
0
ꢀꢁ
ꢀꢁ0
ꢀ0ꢁ
ꢀ00ꢁ
ꢀꢁ
ꢀ0ꢁ
ꢀ00ꢁ
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊ
ꢀꢁꢁꢀꢂ ꢃ0ꢄꢅ
Figure 9. LTC6227-LT5401 Based Instrumentation Amplifier Frequency Response
ꢀ00
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
ꢀ0
0
ꢀ00
ꢀꢁ
ꢀ0ꢁ
ꢀ00ꢁ
ꢀꢁ
ꢀ0ꢁ
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊ
ꢀꢁꢁꢀꢂ ꢃ0ꢄ0
Figure 10. LTC6227-LT5401 Based Instrumentation Amplifier CMRR
ꢀꢁꢂꢃ
ꢀꢁ0ꢂꢃꢄꢅꢆꢃ
ꢀꢁꢂꢃ
ꢀꢁ0ꢂꢃꢄꢅꢆꢃ
ꢀꢁꢂꢃꢄ
ꢀꢁꢂꢃꢄꢅꢆꢃ
ꢀꢁꢁꢀꢂ ꢃꢄ0
ꢀ00ꢁꢂꢃꢄꢅꢆ
Figure 11. LTC6227-LT5401 Based Instrumentation Amplifier Transient Response
Rev 0
22
For more information www.analog.com
LTC6226/LTC6227
PACKAGE DESCRIPTION
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
ꢅReꢥeꢦeꢧꢨe ꢛꢋꢖ ꢚꢠꢓ ꢩ 0ꢄꢪ0ꢊꢪꢁꢂꢁ0 Rev ꢓꢉ
ꢀꢁꢊꢔ ꢃ ꢀꢁꢔꢈ
ꢅꢆꢀꢊ0ꢁ ꢃ ꢄꢀ00ꢆꢉ
ꢀ0ꢆꢄ ±ꢀ00ꢄ
ꢗꢐꢋꢑ ꢎ
ꢀ0ꢄ0 ꢕꢏꢖ
ꢈ
ꢄ
ꢊ
ꢂ
ꢀꢇꢆꢄ
ꢘꢙꢗ
ꢀꢁꢂ0 ±ꢀ00ꢄ
ꢀꢁꢄ0 ꢃ ꢀꢁꢄꢈ
ꢅꢎꢀꢊꢁ0 ꢃ ꢎꢀꢔꢊꢊꢉ
ꢗꢐꢋꢑ ꢎ
ꢀꢇꢇꢊ ꢃ ꢀꢇꢆꢆ
ꢅꢄꢀꢈꢔꢁ ꢃ ꢂꢀꢁꢔꢈꢉ
ꢀ0ꢎ0 ±ꢀ00ꢄ
ꢋꢌꢍ
ꢁ
ꢎ
ꢆ
ꢇ
Rꢑꢖꢐꢘꢘꢑꢗꢚꢑꢚ ꢏꢐꢛꢚꢑR ꢍꢜꢚ ꢛꢜꢌꢐꢝꢋ
ꢀ0ꢁ0 ꢃ ꢀ0ꢇ0
ꢅ0ꢀꢇꢄꢆ ꢃ 0ꢀꢄ0ꢊꢉ
× ꢆꢄ°
ꢀ0ꢄꢎ ꢃ ꢀ0ꢂꢔ
ꢅꢁꢀꢎꢆꢂ ꢃ ꢁꢀꢈꢄꢇꢉ
ꢀ00ꢆ ꢃ ꢀ0ꢁ0
ꢅ0ꢀꢁ0ꢁ ꢃ 0ꢀꢇꢄꢆꢉ
ꢀ00ꢊ ꢃ ꢀ0ꢁ0
ꢅ0ꢀꢇ0ꢎ ꢃ 0ꢀꢇꢄꢆꢉ
0°ꢃ ꢊ° ꢋꢌꢍ
ꢀ0ꢁꢂ ꢃ ꢀ0ꢄ0
ꢅ0ꢀꢆ0ꢂ ꢃ ꢁꢀꢇꢈ0ꢉ
ꢀ0ꢄ0
ꢅꢁꢀꢇꢈ0ꢉ
ꢕꢏꢖ
ꢀ0ꢁꢆ ꢃ ꢀ0ꢁꢔ
ꢅ0ꢀꢎꢄꢄ ꢃ 0ꢀꢆꢊꢎꢉ
ꢋꢌꢍ
ꢗꢐꢋꢑꢟ
ꢙꢗꢖꢞꢑꢏ
ꢁꢀ ꢚꢙꢘꢑꢗꢏꢙꢐꢗꢏ ꢙꢗ
ꢅꢘꢙꢛꢛꢙꢘꢑꢋꢑRꢏꢉ
ꢇꢀ ꢚRꢜꢠꢙꢗꢓ ꢗꢐꢋ ꢋꢐ ꢏꢖꢜꢛꢑ
ꢎꢀ ꢋꢞꢑꢏꢑ ꢚꢙꢘꢑꢗꢏꢙꢐꢗꢏ ꢚꢐ ꢗꢐꢋ ꢙꢗꢖꢛꢝꢚꢑ ꢘꢐꢛꢚ ꢡꢛꢜꢏꢞ ꢐR ꢍRꢐꢋRꢝꢏꢙꢐꢗꢏꢀ
ꢘꢐꢛꢚ ꢡꢛꢜꢏꢞ ꢐR ꢍRꢐꢋRꢝꢏꢙꢐꢗꢏ ꢏꢞꢜꢛꢛ ꢗꢐꢋ ꢑꢢꢖꢑꢑꢚ ꢀ00ꢂꢣ ꢅ0ꢀꢁꢄꢤꢤꢉ
ꢆꢀ ꢍꢙꢗ ꢁ ꢖꢜꢗ ꢕꢑ ꢕꢑꢒꢑꢛ ꢑꢚꢓꢑ ꢐR ꢜ ꢚꢙꢘꢍꢛꢑ
ꢏꢐꢊ Rꢑꢒ ꢓ 0ꢇꢁꢇ
Rev 0
23
For more information www.analog.com
LTC6226/LTC6227
PACKAGE DESCRIPTION
S6 Package
6-Lead Plastic TSOT-23
ꢅReꢩeꢪeꢫꢬe ꢔꢈꢐ ꢕꢡꢢ ꢭ 0ꢂꢜ0ꢍꢜꢀꢒꢑꢒꢋ
ꢌꢁꢛ0 ꢎꢏꢐ
ꢅꢆꢇꢈꢉ ꢊꢋ
0ꢁꢒꢌ
ꢘꢖꢝ
0ꢁꢛꢂ
Rꢉꢞ
ꢀꢁꢌꢌ Rꢉꢞ
ꢀꢁꢊ ꢘꢟꢆ
ꢀꢁꢂ0 ꢃ ꢀꢁꢄꢂ
ꢌꢁꢍ0 ꢎꢏꢐ
ꢑꢁꢍꢂ ꢘꢖꢝ ꢌꢁꢒꢌ Rꢉꢞ
ꢅꢆꢇꢈꢉ ꢊꢋ
ꢓꢟꢆ ꢇꢆꢉ ꢟꢕ
Rꢉꢐꢇꢘꢘꢉꢆꢕꢉꢕ ꢏꢇꢔꢕꢉR ꢓꢖꢕ ꢔꢖꢨꢇꢗꢈ
ꢓꢉR ꢟꢓꢐ ꢐꢖꢔꢐꢗꢔꢖꢈꢇR
0ꢁꢑ0 ꢃ 0ꢁꢊꢂ
ꢒ ꢓꢔꢐꢏ ꢅꢆꢇꢈꢉ ꢑꢋ
0ꢁꢛꢂ ꢎꢏꢐ
0ꢁꢍ0 ꢃ 0ꢁꢛ0
0ꢁꢌ0 ꢎꢏꢐ
ꢕꢖꢈꢗꢘ ꢙꢖꢚ
0ꢁ0ꢀ ꢃ 0ꢁꢀ0
ꢀꢁ00 ꢘꢖꢝ
0ꢁꢑ0 ꢃ 0ꢁꢂ0 Rꢉꢞ
ꢀꢁꢛ0 ꢎꢏꢐ
0ꢁ0ꢛ ꢃ 0ꢁꢌ0
ꢅꢆꢇꢈꢉ ꢑꢋ
ꢏꢒ ꢈꢏꢇꢈꢜꢌꢑ 0ꢑ0ꢌ
ꢆꢇꢈꢉꢠ
ꢀꢁ ꢕꢟꢘꢉꢆꢏꢟꢇꢆꢏ ꢖRꢉ ꢟꢆ ꢘꢟꢔꢔꢟꢘꢉꢈꢉRꢏ
ꢌꢁ ꢕRꢖꢡꢟꢆꢢ ꢆꢇꢈ ꢈꢇ ꢏꢐꢖꢔꢉ
ꢑꢁ ꢕꢟꢘꢉꢆꢏꢟꢇꢆꢏ ꢖRꢉ ꢟꢆꢐꢔꢗꢏꢟꢣꢉ ꢇꢞ ꢓꢔꢖꢈꢟꢆꢢ
ꢊꢁ ꢕꢟꢘꢉꢆꢏꢟꢇꢆꢏ ꢖRꢉ ꢉꢝꢐꢔꢗꢏꢟꢣꢉ ꢇꢞ ꢘꢇꢔꢕ ꢞꢔꢖꢏꢤ ꢖꢆꢕ ꢘꢉꢈꢖꢔ ꢎꢗRR
ꢂꢁ ꢘꢇꢔꢕ ꢞꢔꢖꢏꢤ ꢏꢤꢖꢔꢔ ꢆꢇꢈ ꢉꢝꢐꢉꢉꢕ 0ꢁꢌꢂꢊꢥꢥ
ꢒꢁ ꢦꢉꢕꢉꢐ ꢓꢖꢐꢧꢖꢢꢉ RꢉꢞꢉRꢉꢆꢐꢉ ꢟꢏ ꢘꢇꢜꢀꢛꢑ
Rev 0
24
For more information www.analog.com
LTC6226/LTC6227
PACKAGE DESCRIPTION
DC6 Package
6-Lead Plastic DFN (2mm × 2mm)
ꢃReꢩeꢪeꢫꢬe ꢘꢌꢔ ꢇꢏꢐ ꢭ 0ꢡꢙ0ꢮꢙꢂꢦ0ꢝ Rev ꢔꢉ
0ꢁꢦ0 ±0ꢁ0ꢡ
ꢀꢁꢡꢡ ±0ꢁ0ꢡ
0ꢁꢤ0 ±0ꢁꢂ0
ꢂꢁꢂꢡ ±0ꢁ0ꢡ
ꢃꢀ ꢅꢆꢇꢈꢅꢉ
ꢕꢎꢔꢖꢎꢐꢈ
ꢋꢗꢌꢘꢆꢊꢈ
0ꢁꢀꢡ ±0ꢁ0ꢡ
0ꢁꢡ0 ꢑꢅꢔ
ꢂꢁꢝꢦ ±0ꢁꢂ0
ꢃꢀ ꢅꢆꢇꢈꢅꢉ
Rꢈꢔꢋꢒꢒꢈꢊꢇꢈꢇ ꢅꢋꢘꢇꢈR ꢕꢎꢇ ꢕꢆꢌꢔꢟ ꢎꢊꢇ ꢇꢆꢒꢈꢊꢅꢆꢋꢊꢅ
R ꢧ 0ꢁꢂꢀꢡ
ꢌꢣꢕ
0ꢁꢤ0 ±0ꢁꢂ0
ꢃꢀ ꢅꢆꢇꢈꢅꢉ
0ꢁꢄ0 ±0ꢁꢂ0
ꢄ
ꢤ
ꢀꢁ00 ±0ꢁꢂ0
ꢕꢆꢊ ꢂ ꢊꢋꢌꢔꢟ
R ꢧ 0ꢁꢀ0 ꢋR
0ꢁꢀꢡ × ꢄꢡ°
ꢃꢄ ꢅꢆꢇꢈꢅꢉ
ꢕꢆꢊ ꢂ ꢑꢎR
ꢌꢋꢕ ꢒꢎRꢖ
ꢃꢅꢈꢈ ꢊꢋꢌꢈ ꢤꢉ
ꢔꢟꢎꢒꢜꢈR
ꢃꢇꢔꢤꢉ ꢇꢜꢊ Rꢈꢛ ꢔ 0ꢚꢂꢡ
R ꢧ 0ꢁ0ꢡ
ꢌꢣꢕ
ꢝ
ꢂ
0ꢁꢀꢡ ±0ꢁ0ꢡ
0ꢁꢡ0 ꢑꢅꢔ
0ꢁꢦꢡ ±0ꢁ0ꢡ
0ꢁꢀ00 Rꢈꢜ
ꢂꢁꢝꢦ ±0ꢁꢂ0
ꢃꢀ ꢅꢆꢇꢈꢅꢉ
ꢑꢋꢌꢌꢋꢒ ꢛꢆꢈꢏꢥꢈꢞꢕꢋꢅꢈꢇ ꢕꢎꢇ
0ꢁ00 ꢨ 0ꢁ0ꢡ
ꢊꢋꢌꢈꢍ
ꢂꢁ ꢇRꢎꢏꢆꢊꢐ ꢌꢋ ꢑꢈ ꢒꢎꢇꢈ ꢎ ꢓꢈꢇꢈꢔ ꢕꢎꢔꢖꢎꢐꢈ ꢋꢗꢌꢘꢆꢊꢈ ꢒ0ꢙꢀꢀꢚ ꢛꢎRꢆꢎꢌꢆꢋꢊ ꢋꢜ ꢃꢏꢔꢔꢇꢙꢀꢉ
ꢀꢁ ꢇRꢎꢏꢆꢊꢐ ꢊꢋꢌ ꢌꢋ ꢅꢔꢎꢘꢈ
ꢝꢁ ꢎꢘꢘ ꢇꢆꢒꢈꢊꢅꢆꢋꢊꢅ ꢎRꢈ ꢆꢊ ꢒꢆꢘꢘꢆꢒꢈꢌꢈRꢅ
ꢄꢁ ꢇꢆꢒꢈꢊꢅꢆꢋꢊꢅ ꢋꢜ ꢈꢞꢕꢋꢅꢈꢇ ꢕꢎꢇ ꢋꢊ ꢑꢋꢌꢌꢋꢒ ꢋꢜ ꢕꢎꢔꢖꢎꢐꢈ ꢇꢋ ꢊꢋꢌ ꢆꢊꢔꢘꢗꢇꢈ
ꢒꢋꢘꢇ ꢜꢘꢎꢅꢟꢁ ꢒꢋꢘꢇ ꢜꢘꢎꢅꢟꢠ ꢆꢜ ꢕRꢈꢅꢈꢊꢌꢠ ꢅꢟꢎꢘꢘ ꢊꢋꢌ ꢈꢞꢔꢈꢈꢇ 0ꢁꢂꢡꢢꢢ ꢋꢊ ꢎꢊꢣ ꢅꢆꢇꢈ
ꢡꢁ ꢈꢞꢕꢋꢅꢈꢇ ꢕꢎꢇ ꢅꢟꢎꢘꢘ ꢑꢈ ꢅꢋꢘꢇꢈR ꢕꢘꢎꢌꢈꢇ
ꢤꢁ ꢅꢟꢎꢇꢈꢇ ꢎRꢈꢎ ꢆꢅ ꢋꢊꢘꢣ ꢎ RꢈꢜꢈRꢈꢊꢔꢈ ꢜꢋR ꢕꢆꢊ ꢂ ꢘꢋꢔꢎꢌꢆꢋꢊ ꢋꢊ ꢌꢟꢈ
ꢌꢋꢕ ꢎꢊꢇ ꢑꢋꢌꢌꢋꢒ ꢋꢜ ꢕꢎꢔꢖꢎꢐꢈ
Rev 0
25
For more information www.analog.com
LTC6226/LTC6227
PACKAGE DESCRIPTION
MS8E Package
8-Lead Plastic MSOP, Exposed Die Pad
ꢄReꢫeꢬeꢭꢮe ꢕꢑꢙ ꢗꢛꢔ ꢯ 0ꢎꢥ0ꢅꢥꢉꢏꢏꢈ Rev ꢌꢇ
ꢟꢂꢑꢑꢂꢀ ꢋꢒꢆꢛ ꢂꢝ
ꢆꢠꢃꢂꢁꢆꢗ ꢃꢐꢗ ꢂꢃꢑꢒꢂꢓ
ꢉꢍꢅꢅ
ꢄꢍ0ꢦꢣꢇ
ꢉꢍꢏꢅ
ꢉ
0ꢍꢈꢨ
Rꢆꢝ
ꢉꢍꢅꢅ ±0ꢍꢉ0ꢈ
ꢄꢍ0ꢦꢣ ±ꢍ00ꢣꢇ
0ꢍꢅꢅꢨ ±0ꢍꢉꢈꢦ
ꢄꢍ0ꢊꢎ ±ꢍ00ꢎꢇ
ꢄꢍ0ꢏꢏꢇ
0ꢍ0ꢎ Rꢆꢝ
ꢗꢆꢑꢐꢒꢕ ꢩꢟꢪ
ꢎꢍꢉ0
ꢄꢍꢈ0ꢉꢇ
ꢀꢒꢓ
ꢊꢍꢈ0 ꢧ ꢊꢍꢣꢎ
ꢄꢍꢉꢈꢏ ꢧ ꢍꢉꢊꢏꢇ
ꢉꢍꢏꢅ ±0ꢍꢉ0ꢈ
ꢙꢂRꢓꢆR ꢑꢐꢒꢕ ꢒꢁ ꢃꢐRꢑ ꢂꢝ
ꢑꢚꢆ ꢕꢆꢐꢗꢝRꢐꢀꢆ ꢝꢆꢐꢑꢜRꢆꢍ
ꢝꢂR RꢆꢝꢆRꢆꢓꢙꢆ ꢂꢓꢕꢤ
ꢄꢍ0ꢏꢏ ±ꢍ00ꢣꢇ
ꢗꢆꢑꢐꢒꢕ ꢩꢟꢪ
ꢅ
NO MEASUREMENT PURPOSE
ꢊꢍ00 ±0ꢍꢉ0ꢈ
ꢄꢍꢉꢉꢅ ±ꢍ00ꢣꢇ
ꢄꢓꢂꢑꢆ ꢊꢇ
0ꢍꢏꢎ
ꢄꢍ0ꢈꢎꢏꢇ
ꢟꢁꢙ
0ꢍꢎꢈ
ꢄꢍ0ꢈ0ꢎꢇ
Rꢆꢝ
0ꢍꢣꢈ ±0ꢍ0ꢊꢅ
ꢄꢍ0ꢉꢏꢎ ±ꢍ00ꢉꢎꢇ
ꢅ
ꢦ ꢏ ꢎ
ꢑꢤꢃ
Rꢆꢙꢂꢀꢀꢆꢓꢗꢆꢗ ꢁꢂꢕꢗꢆR ꢃꢐꢗ ꢕꢐꢤꢂꢜꢑ
ꢊꢍ00 ±0ꢍꢉ0ꢈ
ꢄꢍꢉꢉꢅ ±ꢍ00ꢣꢇ
ꢄꢓꢂꢑꢆ ꢣꢇ
ꢣꢍꢨ0 ±0ꢍꢉꢎꢈ
ꢄꢍꢉꢨꢊ ±ꢍ00ꢏꢇ
ꢗꢆꢑꢐꢒꢕ ꢩꢐꢪ
0ꢍꢈꢎꢣ
ꢄꢍ0ꢉ0ꢇ
0° ꢧ ꢏ° ꢑꢤꢃ
ꢔꢐꢜꢔꢆ ꢃꢕꢐꢓꢆ
ꢉ
ꢈ
ꢊ
ꢣ
0ꢍꢎꢊ ±0ꢍꢉꢎꢈ
ꢄꢍ0ꢈꢉ ±ꢍ00ꢏꢇ
ꢉꢍꢉ0
ꢄꢍ0ꢣꢊꢇ
ꢀꢐꢠ
0ꢍꢅꢏ
ꢄꢍ0ꢊꢣꢇ
Rꢆꢝ
ꢗꢆꢑꢐꢒꢕ ꢩꢐꢪ
0ꢍꢉꢅ
ꢄꢍ00ꢦꢇ
ꢁꢆꢐꢑꢒꢓꢔ
ꢃꢕꢐꢓꢆ
0ꢍꢈꢈ ꢧ 0ꢍꢊꢅ
ꢄꢍ00ꢨ ꢧ ꢍ0ꢉꢎꢇ
ꢑꢤꢃ
0ꢍꢉ0ꢉꢏ ±0ꢍ0ꢎ0ꢅ
ꢄꢍ00ꢣ ±ꢍ00ꢈꢇ
0ꢍꢏꢎ
ꢄꢍ0ꢈꢎꢏꢇ
ꢟꢁꢙ
ꢀꢁꢂꢃ ꢄꢀꢁꢅꢆꢇ 0ꢈꢉꢊ Rꢆꢋ ꢌ
ꢓꢂꢑꢆꢖ
ꢉꢍ ꢗꢒꢀꢆꢓꢁꢒꢂꢓꢁ ꢒꢓ ꢀꢒꢕꢕꢒꢀꢆꢑꢆRꢘꢄꢒꢓꢙꢚꢇ
ꢈꢍ ꢗRꢐꢛꢒꢓꢔ ꢓꢂꢑ ꢑꢂ ꢁꢙꢐꢕꢆ
ꢊꢍ ꢗꢒꢀꢆꢓꢁꢒꢂꢓ ꢗꢂꢆꢁ ꢓꢂꢑ ꢒꢓꢙꢕꢜꢗꢆ ꢀꢂꢕꢗ ꢝꢕꢐꢁꢚꢞ ꢃRꢂꢑRꢜꢁꢒꢂꢓꢁ ꢂR ꢔꢐꢑꢆ ꢟꢜRRꢁꢍ
ꢀꢂꢕꢗ ꢝꢕꢐꢁꢚꢞ ꢃRꢂꢑRꢜꢁꢒꢂꢓꢁ ꢂR ꢔꢐꢑꢆ ꢟꢜRRꢁ ꢁꢚꢐꢕꢕ ꢓꢂꢑ ꢆꢠꢙꢆꢆꢗ 0ꢍꢉꢎꢈꢡꢡ ꢄꢍ00ꢏꢢꢇ ꢃꢆR ꢁꢒꢗꢆ
ꢣꢍ ꢗꢒꢀꢆꢓꢁꢒꢂꢓ ꢗꢂꢆꢁ ꢓꢂꢑ ꢒꢓꢙꢕꢜꢗꢆ ꢒꢓꢑꢆRꢕꢆꢐꢗ ꢝꢕꢐꢁꢚ ꢂR ꢃRꢂꢑRꢜꢁꢒꢂꢓꢁꢍ
ꢒꢓꢑꢆRꢕꢆꢐꢗ ꢝꢕꢐꢁꢚ ꢂR ꢃRꢂꢑRꢜꢁꢒꢂꢓꢁ ꢁꢚꢐꢕꢕ ꢓꢂꢑ ꢆꢠꢙꢆꢆꢗ 0ꢍꢉꢎꢈꢡꢡ ꢄꢍ00ꢏꢢꢇ ꢃꢆR ꢁꢒꢗꢆ
ꢎꢍ ꢕꢆꢐꢗ ꢙꢂꢃꢕꢐꢓꢐRꢒꢑꢤ ꢄꢟꢂꢑꢑꢂꢀ ꢂꢝ ꢕꢆꢐꢗꢁ ꢐꢝꢑꢆR ꢝꢂRꢀꢒꢓꢔꢇ ꢁꢚꢐꢕꢕ ꢟꢆ 0ꢍꢉ0ꢈꢡꢡ ꢄꢍ00ꢣꢢꢇ ꢀꢐꢠ
ꢏꢍ ꢆꢠꢃꢂꢁꢆꢗ ꢃꢐꢗ ꢗꢒꢀꢆꢓꢁꢒꢂꢓ ꢗꢂꢆꢁ ꢒꢓꢙꢕꢜꢗꢆ ꢀꢂꢕꢗ ꢝꢕꢐꢁꢚꢍ ꢀꢂꢕꢗ ꢝꢕꢐꢁꢚ ꢂꢓ ꢆꢥꢃꢐꢗ
ꢁꢚꢐꢕꢕ ꢓꢂꢑ ꢆꢠꢙꢆꢆꢗ 0ꢍꢈꢎꢣꢡꢡ ꢄꢍ0ꢉ0ꢢꢇ ꢃꢆR ꢁꢒꢗꢆꢍ
Rev 0
26
For more information www.analog.com
LTC6226/LTC6227
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
ꢃReꢪeꢫeꢬꢭe ꢘꢌꢔ ꢇꢏꢐ ꢮ 0ꢡꢙ0ꢨꢙꢂꢤꢛꢛ Rev ꢔꢉ
0ꢁꢦ0 ±0ꢁ0ꢡ
ꢀꢁꢡꢡ ±0ꢁ0ꢡ
ꢚꢁꢂꢡ ±0ꢁ0ꢡ ꢃꢚ ꢅꢆꢇꢈꢅꢉ
ꢂꢁꢤꢡ ±0ꢁ0ꢡ
ꢕꢎꢔꢖꢎꢐꢈ
ꢋꢗꢌꢘꢆꢊꢈ
0ꢁꢚꢡ ±0ꢁ0ꢡ
0ꢁꢡ0
ꢑꢅꢔ
ꢚꢁꢀꢨ ±0ꢁ0ꢡ
ꢃꢚ ꢅꢆꢇꢈꢅꢉ
RECOMMENDED ꢅꢋꢘꢇꢈR ꢕꢎꢇ ꢕꢆꢌꢔꢞ ꢎꢊꢇ ꢇꢆꢒꢈꢊꢅꢆꢋꢊꢅ
R ꢧ 0ꢁꢂꢚꢡ
0ꢁꢄ0 ±0ꢁꢂ0
ꢌꢣꢕ
ꢤ
ꢂ0
ꢀꢁ00 ±0ꢁꢂ0
ꢃꢄ ꢅꢆꢇꢈꢅꢉ
ꢂꢁꢤꢡ ±0ꢁꢂ0
ꢃꢚ ꢅꢆꢇꢈꢅꢉ
ꢕꢆꢊ ꢂ ꢊꢋꢌꢔꢞ
R ꢧ 0ꢁꢚ0 ꢋR
ꢕꢆꢊ ꢂ
ꢌꢋꢕ ꢒꢎRꢖ
ꢃꢅꢈꢈ ꢊꢋꢌꢈ ꢤꢉ
0ꢁꢀꢡ × ꢄꢡ°
ꢔꢞꢎꢒꢝꢈR
ꢃꢇꢇꢉ ꢇꢝꢊ Rꢈꢜ ꢔ 0ꢀꢂ0
ꢡ
ꢂ
0ꢁꢚꢡ ±0ꢁ0ꢡ
0ꢁꢡ0 ꢑꢅꢔ
0ꢁꢦꢡ ±0ꢁ0ꢡ
0ꢁꢚ00 Rꢈꢝ
ꢚꢁꢀꢨ ±0ꢁꢂ0
ꢃꢚ ꢅꢆꢇꢈꢅꢉ
0ꢁ00 ꢩ 0ꢁ0ꢡ
ꢑꢋꢌꢌꢋꢒ ꢜꢆꢈꢏꢥꢈꢟꢕꢋꢅꢈꢇ ꢕꢎꢇ
ꢊꢋꢌꢈꢍ
ꢂꢁ ꢇRꢎꢏꢆꢊꢐ ꢌꢋ ꢑꢈ ꢒꢎꢇꢈ ꢎ ꢓꢈꢇꢈꢔ ꢕꢎꢔꢖꢎꢐꢈ ꢋꢗꢌꢘꢆꢊꢈ ꢒ0ꢙꢚꢚꢛ ꢜꢎRꢆꢎꢌꢆꢋꢊ ꢋꢝ ꢃꢏꢈꢈꢇꢙꢚꢉꢁ
ꢔꢞꢈꢔꢖ ꢌꢞꢈ ꢘꢌꢔ ꢏꢈꢑꢅꢆꢌꢈ ꢇꢎꢌꢎ ꢅꢞꢈꢈꢌ ꢝꢋR ꢔꢗRRꢈꢊꢌ ꢅꢌꢎꢌꢗꢅ ꢋꢝ ꢜꢎRꢆꢎꢌꢆꢋꢊ ꢎꢅꢅꢆꢐꢊꢒꢈꢊꢌ
ꢚꢁ ꢇRꢎꢏꢆꢊꢐ ꢊꢋꢌ ꢌꢋ ꢅꢔꢎꢘꢈ
ꢀꢁ ꢎꢘꢘ ꢇꢆꢒꢈꢊꢅꢆꢋꢊꢅ ꢎRꢈ ꢆꢊ ꢒꢆꢘꢘꢆꢒꢈꢌꢈRꢅ
ꢄꢁ ꢇꢆꢒꢈꢊꢅꢆꢋꢊꢅ ꢋꢝ ꢈꢟꢕꢋꢅꢈꢇ ꢕꢎꢇ ꢋꢊ ꢑꢋꢌꢌꢋꢒ ꢋꢝ ꢕꢎꢔꢖꢎꢐꢈ ꢇꢋ ꢊꢋꢌ ꢆꢊꢔꢘꢗꢇꢈ
ꢒꢋꢘꢇ ꢝꢘꢎꢅꢞꢁ ꢒꢋꢘꢇ ꢝꢘꢎꢅꢞꢠ ꢆꢝ ꢕRꢈꢅꢈꢊꢌꢠ ꢅꢞꢎꢘꢘ ꢊꢋꢌ ꢈꢟꢔꢈꢈꢇ 0ꢁꢂꢡꢢꢢ ꢋꢊ ꢎꢊꢣ ꢅꢆꢇꢈ
ꢡꢁ ꢈꢟꢕꢋꢅꢈꢇ ꢕꢎꢇ ꢅꢞꢎꢘꢘ ꢑꢈ ꢅꢋꢘꢇꢈR ꢕꢘꢎꢌꢈꢇ
ꢤꢁ ꢅꢞꢎꢇꢈꢇ ꢎRꢈꢎ ꢆꢅ ꢋꢊꢘꢣ ꢎ RꢈꢝꢈRꢈꢊꢔꢈ ꢝꢋR ꢕꢆꢊ ꢂ ꢘꢋꢔꢎꢌꢆꢋꢊ ꢋꢊ ꢌꢞꢈ
ꢌꢋꢕ ꢎꢊꢇ ꢑꢋꢌꢌꢋꢒ ꢋꢝ ꢕꢎꢔꢖꢎꢐꢈ
Rev 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
27
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
LTC6226/LTC6227
TYPICAL APPLICATION
High Speed High Dynamic Range Photodiode Amplifier
Photodiode Amplifier
Noise Spectrum
Photodiode Amplifier
Transient Response
R1
1MΩ
5
C3
R3
1µF
604Ω
C1
0.05pF
Rꢀꢁꢂ ꢃꢀꢄꢂ ꢅ ꢆꢆꢆꢇꢈ
ꢉꢊꢋꢋ ꢃꢀꢄꢂ ꢅ ꢌꢍꢇꢈ
J1
(PARASITIC)
5
200nV/√Hz
ON-SEMI
2SK932-22
ꢀ00ꢁꢂꢃꢄꢅꢂ
–
D1
PHOTODIODE
SFH213
+
R7
1k
LTC6226
+
–5
OUT
–
–5
–3dB BW = 3.1MHz
INTEGRATED NOISE = 649µV
OVER 3.78MHz MEAS BW
–5
ꢀꢁ
62267 TA02a
RMS
ꢀꢁꢁꢀꢂ ꢃꢄ0ꢁꢅ
ꢀ0ꢁꢂꢃ
ꢀꢁꢂꢃ
ꢀ00ꢁꢂꢃꢄꢅꢆ
ꢀꢁꢁꢀꢂ ꢃꢄ0ꢁꢅ
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
Operational Amplifiers
LTC6228/LTC6229 Single/Dual High Speed Ultra Low Noise Low Distortion
Rail-to-Rail Output Op Amps
0.88 nV/√Hz, 730MHz, 500V/µs Unity Gain Stable
LTC6252/LTC6253/ Single/Dual/Quad High Speed Rail-to-Rail Input and Output
720MHz, 3.5mA, 2.75nV/√Hz, 280V/µs, 0.35mV, Unity Gain Stable
LTC6254
Op Amps
ADA4899-1
High Speed Ultra Low Noise Ultra Low Distortion
1 nV/√Hz, 600MHz, 310V/µs Unity Gain Stable
LTC6268/LTC6269 Single/Dual High Speed FET Input Op Amp
400MHz, 4nV/√Hz, 3f Input Bias Current
A
LT1818/LT1819
Single/Dual Wide Bandwidth, High Slew Rate Low Noise and
400MHz, 9mA, 6nV/√Hz, 2500V/µs, 1.5mV –85dBc at 5MHz
3mA 1 nV/√Hz 230 MHz 120 V/µs Unity Gain Stable
215MHz, 3.5mA, 1.1nV/√Hz, 70V/µs, 350µV
Distortion Op Amps
ADA4896-1/
ADA4896-2
Low Noise Low Power Rail-to-Rail Output
LT6230/LT6231/
LT6232
Single/Dual/Quad Low Noise Rail-to-Rail Output Op Amps
LTC6246/LTC6247/ Single/Dual/Quad High Speed Rail-to-Rail Input and Output
180MHz, 1mA, 4.2nV/√Hz, 90V/µs, 0.5mV
LTC6248
Op Amps
LT6200/LT6201
Single/Dual Ultralow Noise Rail-to-Rail Input/Output Op Amps 165MHz, 20mA, 0.95nV/√Hz, 44V/µs, 1mV
LT6202/LT6203/
LT6204
Single/Dual/Quad Ultralow Noise Rail-to-Rail Op Amp
100MHz, 3mA, 1.9nV/√Hz, 25V/µs, 0.5mV
80MHz, 2mA, 8.5nV√Hz, 25V/µs, 350µV
75MHz, 9.5mA, 0.85nV/√Hz, 11V/µs, 40µV
LT1801/LT1802
Dual/Quad Low Power High Speed Rail-to-Rail Input and
Output Op Amps
LT1028
Ultralow Noise, Precision High Speed Op Amps
LTC6350
ADCs
Low Noise Single-Ended to Differential Converter/ADC Driver 33MHz (–3dB), 4.8mA, 1.9nV/√Hz, 240ns Settling to 0.01% 8V
P-P
LTC2387-18
AD7380
18-Bit, 15Msps SAR-ADC
4Msps 16-Bit SAR-ADC
5Msps 16-Bit SAR-ADC
1.8 Msps 20-Bit SAR-ADC
95.7dB SNR
92dB DNR SNR, 6.6 V Input Range
P-P
LTC2323-16
AD4020
81dB SNR,8V Input Range
P-P
99 dB SNR
Rev 0
03/20
www.analog.com
28
ANALOG DEVICES, INC. 2020
For more information www.analog.com
相关型号：
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LTC6269HMS8E-10#TRPBF
LTC6269-10 - Dual 4GHz Ultra-Low Bias Current FET Input Op Amp; Package: MSOP; Pins: 8; Temperature Range: -40°C to 125°C
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LTC6269IMS8E-10#PBF
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Linear
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