LTC4210 [ADI]

No RSENSE™ Electronic Circuit Breaker;
LTC4210
型号: LTC4210
厂家: ADI    ADI
描述:

No RSENSE™ Electronic Circuit Breaker

文件: 总22页 (文件大小:650K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
LTC4213  
No R  
SENSE  
Electronic Circuit Breaker  
FEATURES  
DESCRIPTION  
The LTC®4213 is an electronic circuit breaker. An overcur-  
rent circuit breaker senses the voltage across the drain  
and source terminals of an external N-channel MOSFET  
with no need for a sense resistor. The advantages are a  
lower cost and reduced voltage and power loss in the  
switch path. An internal high-side driver controls the  
external MOSFET gate.  
n
Fast 1µs Response Circuit Breaker  
n
3 Selectable Circuit Breaker Thresholds  
n
No Sense Resistor Required  
n
Dual Level Overcurrent Fault Protection  
n
Controls Load Voltages from 0V to 6V  
n
High-Side Drive for External N-Channel MOSFET  
n
Undervoltage Lockout  
n
READY Pin Signals When Circuit Breaker Armed  
Two integrated comparators provide dual level overcurrent  
protection over the bias supply to ground common mode  
range. The slow comparator has 16µs response while the  
fast comparator trips in 1µs. The circuit breaker has three  
selectable trip thresholds: 25mV, 50mV and 100mV. An  
ON pin controls the ON/OFF and resets circuit breaker  
faults. READY signals the MOSFET is conducting and  
the circuit breaker is armed. The LTC4213 operates from  
n
Small Plastic (3mm × 2mm) DFN and TSOT-23  
(ThinSOT™) Packages  
APPLICATIONS  
n
Electronic Circuit Breaker  
n
High-Side Switch  
V
= 2.3V to 6V.  
n
Hot Board Insertion  
CC  
All registered trademarks and trademarks are the property of their respective owners.  
TYPICAL APPLICATION  
Severe Overload Response  
1.25V Electronic Circuit Breaker  
SI4864DY  
I
OUT  
(50A/DIV)  
V
V
IN  
OUT  
1.25V  
1.25V  
3.5A  
V
OUT  
SENSEP GATE SENSEN  
V
BIAS  
(1V/DIV)  
V
CC  
V
BIAS  
2.3V TO 6V  
LTC4213  
READY  
10k  
V
GATE  
(5V/DIV)  
OFF ON  
ON  
GND  
I
SEL  
V
IN  
(1V/DIV)  
4213 TA01a  
4213 TA01b  
2μs/DIV  
Rev. A  
1
Document Feedback  
For more information www.analog.com  
LTC4213  
ABSOLUTE MAXIMUM RATINGS  
(Note 1)  
Bias Supply Voltage (V )............................ –0.3V to 9V  
Operating Temperature Range  
CC  
Input Voltages  
LTC4213C ................................................ 0°C to 70°C  
LTC4213I .............................................–40°C to 85°C  
Storage Temperature Range .................. –65°C to 150°C  
Lead Temperature (Soldering, 10sec)....................300°C  
ON, SENSEP, SENSEN.............................. –0.3V to 9V  
I
...........................................–0.3V to (V + 0.3V)  
SEL  
CC  
Output Voltages  
GATE...................................................... –0.3V to 15V  
READY..................................................... –0.3V to 9V  
PIN CONFIGURATION  
TOP VIEW  
TOP VIEW  
READY  
ON  
1
2
3
4
8
7
6
5
V
CC  
GND 1  
8 GATE  
SENSEP  
SENSEN  
GATE  
I
SENSEN  
2
3
4
7
6
5
SEL  
ON  
9
I
SEL  
SENSEP  
GND  
READY  
V
CC  
TS8 PACKAGE  
8-LEAD PLASTIC TSOT-23  
DDB PACKAGE  
8-LEAD (3mm × 2mm) PLASTIC DFN  
T
= 125°C, θ = 195°C/W  
JA  
JMAX  
T
= 125°C, θ = 250°C/W  
JA  
JMAX  
EXPOSED PAD (PIN 9) PCB CONNECTION OPTIONAL  
ORDER INFORMATION  
TAPE AND REEL  
TAPE AND REEL (MINI)  
PART MARKING*  
LBHV  
PACKAGE DESCRIPTION  
TEMPERATURE RANGE  
0°C to 70°C  
LTC4213CDDB#TRPBF  
LTC4213IDDB#TRPBF  
LTC4213CTS8#TRPBF  
LTC4213ITS8#TRPBF  
N/A  
N/A  
8-Lead (3mm × 2mm) Plastic DFN  
8-Lead (3mm × 2mm) Plastic DFN  
8-Lead Plastic TSOT-23  
LBHV  
–40°C to 85°C  
0°C to 70°C  
LTC4213CTS8#TRMPBF LTHQB  
LTC4213ITS8#TRMPBF LTHQB  
8-Lead Plastic TSOT-23  
–40°C to 85°C  
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.  
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.  
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, ISEL = 0 unless otherwise noted. (Note 2)  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
2.3  
0
TYP  
MAX  
6
UNITS  
V
l
l
l
l
l
V
V
Bias Supply Voltage  
SENSEP Voltage  
CC  
6
V
SENSEP  
I
CC  
V
CC  
V
CC  
V
CC  
Supply Current  
1.6  
2.07  
100  
40  
3
mA  
V
V
Undervoltage Lockout Release  
Undervoltage Lockout Hysteresis  
V
Rising  
CC  
1.8  
30  
15  
2.23  
160  
80  
15  
CC(UVLR)  
∆V  
CC(UVHYST)  
mV  
µA  
I
SENSEP Input Current  
V
V
= V  
= V  
= 5V, Normal Mode  
= 0, Normal Mode  
SENSEP  
SENSEP  
SENSEN  
–1  
µA  
SENSEP  
SENSEN  
Rev. A  
2
For more information www.analog.com  
LTC4213  
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, ISEL = 0 unless otherwise noted. (Note 2)  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
40  
MAX  
80  
UNITS  
µA  
I
SENSEN Input Current  
V
V
V
= V  
= V  
= V  
= 5V, Normal Mode  
= 0, Normal Mode  
= 5V, Reset Mode or  
15  
SENSEN  
SENSEP  
SENSEP  
SENSEP  
SENSEN  
SENSEN  
SENSEN  
–1  
15  
µA  
50  
280  
µA  
Fault Mode  
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
V
V
Circuit Breaker Trip Voltage  
I
I
I
I
I
I
= 0, V  
= V  
22.5  
45  
25  
50  
27.5  
55  
mV  
mV  
mV  
mV  
mV  
mV  
µA  
mA  
V
CB  
SEL  
SEL  
SEL  
SEL  
SEL  
SEL  
SENSEP  
CC  
V
= V  
– V  
CB  
SENSEP SENSEN  
= Floated, V  
= V  
SENSEP  
CC  
= V , V  
= V  
90  
100  
100  
175  
325  
–100  
40  
110  
115  
200  
371  
–150  
CC SENSEP  
CC  
Fast Circuit Breaker Trip Voltage  
= V – V  
= 0, V  
= V  
63  
CB(FAST)  
SENSEP  
CC  
V
CB(FAST)  
SENSEP  
SENSEN  
= Floated, V  
= V  
126  
252  
–50  
10  
SENSEP  
CC  
= V , V  
= V  
CC SENSEP  
CC  
I
I
GATE Pin Pull Up Current  
V
= 0V  
GATE  
GATE(UP)  
GATE Pin Pull Down Current  
External N-Channel Gate Drive  
∆V  
– V  
= 200mV, V  
= 8V  
GATE  
GATE(DN)  
SENSEP  
SENSEN  
∆V  
∆V  
∆V  
V
V
V
V
V
V
= 0, V ≥ 2.97V, I = –1µA  
GATE  
4.8  
2.65  
4.4  
2.5  
0.3  
0.15  
6.5  
4.3  
5.4  
3.5  
1.1  
0.8  
0.2  
0
8
8
GSMAX  
GSARM  
GSMAX  
SENSEN  
SENSEN  
SENSEN  
SENSEN  
SENSEN  
SENSEN  
CC  
= 0, V = 2.3V, I  
= –1µA  
V
CC  
GATE  
V
Voltage to Arm Circuit Breaker  
= 0, V ≥ 2.97V  
7.6  
7
V
GS  
CC  
= 0, V = 2.3V  
V
CC  
– ∆V  
Difference Between ∆V  
and ∆V  
= 0, V ≥ 2.97V  
V
GSARM  
GSMAX  
GSARM  
CC  
= 0, V = 2.3V  
V
CC  
V
READY Pin Output Low Voltage  
READY Pin Leakage Current  
ON Pin High Threshold  
ON Pin Hysteresis  
I
= 1.6mA, Pull-Down Device On  
= 5V, Pull-Down Device Off  
READY  
0.4  
1
V
READY(OL)  
READY  
I
V
µA  
V
READY(LEAK)  
V
ON Rising, GATE Pulls Up  
0.76  
10  
0.8  
40  
0.84  
90  
ON(TH)  
∆V  
ON Falling, GATE Pulls Down  
ON Falling, Fault Reset, GATE Pull-Down  
mV  
V
ON(HYST)  
ON(RST)  
ON(IN)  
l
l
l
V
ON Pin Reset Threshold  
ON Pin Input Current  
0.36  
0.4  
0
0.44  
1
I
V
= 1.2V  
µA  
V
ON  
∆V  
Overvoltage Threshold, ∆V = V  
– V  
CC  
0.41  
25  
7
0.7  
65  
1.1  
160  
27  
OV  
OV  
SENSEP  
t
t
Overvoltage Protection Trip Time  
V
= V = Step 5V to 6.2V  
SENSEN  
µs  
µs  
OV  
SENSEP  
l
l
V
Trips to GATE Discharging  
∆V  
Step 0mV to 50mV, V  
SENSEN  
16  
FAULT(SLOW)  
FAULT(FAST)  
DEBOUNCE  
READY  
CB  
SENSE  
Falling, V = V  
= 5V  
CC  
SENSEP  
t
t
t
t
t
t
V
Trips to GATE Discharging  
∆V  
V
Step 0V to 0.3V, V  
= 5V  
Falling,  
SENSEN  
1
60  
50  
5
2.5  
130  
115  
10  
µs  
µs  
µs  
µs  
µs  
µs  
CB(FAST)  
SENSE  
SENSEP  
Startup De-Bounce Time  
READY Delay Time  
Turn-Off Time  
V
= 0V to 2V Step to Gate Rising  
27  
22  
1.5  
4
ON  
(Exiting Reset Mode)  
V
V
= 0V to 8V Step to READY Rising,  
SENSEP  
GATE  
= V  
= 0  
SENSEN  
V
= 2V to 0.6V Step to GATE  
ON  
OFF  
Discharging  
Turn-On Time  
V
= 0.6V to 2V Step to GATE Rising  
ON  
8
16  
ON  
(Normal Mode)  
Reset Time  
V
Step 2V to 0V  
20  
80  
150  
RESET  
ON  
Note 1: Stresses beyond those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. Exposure to any Absolute  
Maximum Rating condition for extended periods may affect device  
reliability and lifetime.  
Note 2: All currents into device pins are positive; all currents out of device  
pins are negative. All voltages are referenced to ground unless otherwise  
specified.  
Rev. A  
3
For more information www.analog.com  
LTC4213  
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C. VCC = 5V unless otherwise noted.  
ICC vs VCC  
ICC vs Temperature  
VCC(UVLR) vs Temperature  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
2.3  
2.2  
2.1  
2.0  
1.9  
1.8  
1.7  
V
CC  
RISING  
V
FALLING  
CC  
4.5 5.0  
75 100  
TEMPERATURE (°C)  
75 100  
TEMPERATURE (°C)  
2.0 2.5 3.0 3.5 4.0  
5.5 6.0  
–50 –25  
0
25  
50  
125  
–50 –25  
0
25  
50  
125  
BIAS SUPPLY VOLTAGE (V)  
4213 G01  
4213 G02  
4213 G03  
Normalized VCB vs VCC  
Normalized VCB vs Temperature  
Normalized VCB(FAST) vs VCC  
1.06  
1.04  
1.02  
1.00  
0.98  
0.96  
0.94  
1.06  
1.04  
1.02  
1.00  
0.98  
0.96  
0.94  
1.06  
1.04  
1.02  
1.00  
0.98  
0.96  
0.94  
4.5 5.0  
75 100  
TEMPERATURE (°C)  
4.5 5.0  
2.0 2.5 3.0 3.5 4.0  
5.5 6.0  
–50 –25  
0
25  
50  
125  
2.0 2.5 3.0 3.5 4.0  
5.5 6.0  
BIAS SUPPLY VOLTAGE (V)  
BIAS SUPPLY VOLTAGE (V)  
4213 G04  
4213 G05  
4213 G06  
Normalized VCB(FAST) vs  
Temperature  
IGATE(UP) vs VCC  
IGATE(UP) vs Temperature  
1.06  
1.04  
1.02  
1.00  
0.98  
0.96  
0.94  
104  
102  
100  
98  
104  
102  
100  
98  
96  
96  
75 100  
TEMPERATURE (°C)  
4.5 5.0  
2.0 2.5 3.0 3.5 4.0  
BIAS SUPPLY VOLTAGE (V)  
75 100  
TEMPERATURE (°C)  
–50 –25  
0
25  
50  
125  
5.5 6.0  
–50 –25  
0
25  
50  
125  
4213 G07  
4213 G08  
4213 G09  
Rev. A  
4
For more information www.analog.com  
LTC4213  
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C. VCC = 5V unless otherwise noted.  
∆VGSMAX and ∆VGSARM vs  
Temperature  
∆VGSMAX and ∆VGSARM vs VCC  
VON(TH) vs VCC  
8
7
6
5
4
3
8
7
6
5
4
3
0.90  
0.85  
0.80  
0.75  
0.70  
0.65  
∆V  
GSMAX  
(FOR 5V  
)
CC  
∆V  
GSMAX  
GSARM  
∆V  
GSARM  
(FOR 5V  
)
CC  
HIGH THRESHOLD  
LOW THRESHOLD  
∆V  
∆V  
∆V  
(FOR 2.5V  
(FOR 2.5V  
)
GSMAX  
CC  
)
GSARM  
CC  
4.5 5.0  
75 100  
TEMPERATURE (°C)  
4.5 5.0  
2.0 2.5 3.0 3.5 4.0  
BIAS SUPPLY VOLTAGE (V)  
2.0 2.5 3.0 3.5 4.0  
5.5 6.0  
–50 –25  
0
25  
50  
125  
5.5 6.0  
BIAS SUPPLY VOLTAGE (V)  
4213 G10  
4213 G11  
4213 G12  
VON(TH) vs Temperature  
∆VOV vs VCC  
∆VOV vs Temperature  
0.90  
0.85  
0.80  
0.75  
0.70  
0.65  
0.74  
0.72  
0.70  
0.68  
0.66  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
HIGH THRESHOLD  
LOW THRESHOLD  
75 100  
TEMPERATURE (°C)  
4.5 5.0  
75 100  
TEMPERATURE (°C)  
–50 –25  
0
25  
50  
125  
2.0 2.5 3.0 3.5 4.0  
5.5 6.0  
–50 –25  
0
25  
50  
125  
BIAS SUPPLY VOLTAGE (V)  
4213 G13  
4213 G14  
4213 G15  
tDEBOUNCE and tREADY vs  
Temperature  
tDEBOUNCE and tREADY vs VCC  
tRESET vs VCC  
100  
80  
60  
40  
20  
0
100  
80  
60  
40  
20  
0
120  
100  
80  
60  
40  
20  
0
t
DEBOUNCE  
t
DEBOUNCE  
t
READY  
t
READY  
4.5 5.0  
75 100  
TEMPERATURE (°C)  
4.5 5.0  
2.0 2.5 3.0 3.5 4.0  
BIAS SUPPLY VOLTAGE (V)  
2.0 2.5 3.0 3.5 4.0  
5.5 6.0  
–50 –25  
0
25  
50  
125  
5.5 6.0  
4213 G18  
BIAS SUPPLY VOLTAGE (V)  
4213 G16  
4213 G17  
Rev. A  
5
For more information www.analog.com  
LTC4213  
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C. VCC = 5V unless otherwise noted.  
tRESET vs Temperature  
tFAULT(SLOW) vs VCC  
tFAULT(SLOW) vs Temperature  
22  
20  
18  
16  
14  
12  
10  
22  
20  
18  
16  
14  
12  
10  
100  
90  
80  
70  
60  
4.5 5.0  
2.0 2.5 3.0 3.5 4.0  
BIAS SUPPLY VOLTAGE (V)  
75 100  
TEMPERATURE (°C)  
75 100  
TEMPERATURE (°C)  
5.5 6.0  
–50 –25  
0
25  
50  
125  
–50 –25  
0
25  
50  
125  
4213 G20  
4213 G21  
4213 G19  
t
FAULT(FAST) vs VCC  
tFAULT(FAST) vs Temperature  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
4.5 5.0  
BIAS SUPPLY VOLTAGE (V)  
75 100  
TEMPERATURE (°C)  
2.0 2.5 3.0 3.5 4.0  
5.5 6.0  
–50 –25  
0
25  
50  
125  
4213 G22  
4213 G23  
Rev. A  
6
For more information www.analog.com  
LTC4213  
PIN FUNCTIONS (DFN/TSOT-23)  
Exposed Pad (Pin 9, DDB Package Only): Exposed pad  
may be left open or connected to device ground.  
READY (Pin 1/Pin 4): READY Status Output. Open-drain  
output that goes high impedance when the external  
MOSFET is on and the circuit breaker is armed. Otherwise  
this pin pulls low.  
GATE (Pin 5/Pin 8): GATE Drive Output. An internal charge  
pump supplies 100µA pull-up current to the gate of the  
external N-channel MOSFET. Internal circuitry limits the  
voltage between the GATE and SENSEN pins to a safe gate  
drive voltage of less than 8V. When the circuit breaker  
trips, the GATE pin abruptly pulls to GND.  
SENSEN (Pin 6/Pin 7): Circuit Breaker Negative Sense  
Input. Connect this pin to the source of the external  
MOSFET. During reset or fault mode, the SENSEN pin  
discharges the output to ground with 280µA.  
GND (Pin 4/Pin 1): Device Ground.  
SENSEP (Pin 7/Pin 6): Circuit Breaker Positive Sense  
Input. Connect this pin to the drain of external N-channel  
MOSFET. The circuit breaker trips when the voltage across  
ISEL (Pin 3/Pin 2): Threshold Select Input. With the  
I
pin grounded, float or tied to V the V is set to  
SEL  
CC CB  
SENSEP and SENSEN exceeds V . The input common  
CB  
25mV, 50mV or 100mV, respectively. The corresponding  
values are 100mV, 175mV and 325mV.  
mode range of the circuit breaker is from ground to V  
+
CC  
V
CB(FAST)  
0.2V when V < 2.5V. For V ≥ 2.5V, the input common  
mode range CisCfrom groundCtoC V + 0.4V.  
ON (Pin 2/Pin 3): ON Control Input. The LTC4213 is in  
reset mode when the ON pin is below 0.4V. When the ON  
pin increases above 0.8V, the device starts up and the  
GATE pulls up with a 100µA current source. When the  
ON pin drops below 0.76V, the GATE pulls down. To reset  
a circuit breaker fault, the ON pin must go below 0.4V.  
CC  
VCC (Pin 8/Pin 5): Bias Supply Voltage Input. Normal  
operation is between 2.3V and 6V. An internal under-volt-  
age lockout circuit disables the device when V < 2.07V.  
CC  
Rev. A  
7
For more information www.analog.com  
LTC4213  
BLOCK DIAGRAM  
SENSEP  
SENSEN  
V
CC  
I
V
V
CB(FAST)  
SEL  
CB  
0.7V  
V
V
CB(FAST)  
CB  
+
+
+
100mV 325mV  
50mV  
25mV  
V
CC  
175mV  
100mV  
+
+
+
V
CC  
SLOWCOMP  
FASTCOMP  
OVCOMP  
CHARGE  
PUMP  
280µA  
16µs  
1µs  
65µs  
DELAY  
DELAY  
DELAY  
READY  
RESET OR  
FAULT MODE BLANK  
100µA  
CB TRIPS  
CB TRIPS  
OV TRIPS  
GATE ON  
GATE  
LOGIC  
50µs  
DELAY  
6.5V  
CLAMP  
CIRCUIT  
+
ARM  
ARM  
COMP  
RESET  
STARTUP  
NORMAL MODE  
GATE ON/OFF  
+–  
GSARM  
V
SENSEN  
GATEOFF  
80µs  
DELAY  
60µs  
DELAY  
8µs 5µs  
DELAY  
COMP1  
UV COMP  
COMP2  
+
+
+
0.4V  
V
2.07V  
0.8V  
CC  
4213 BD  
ON  
GND  
Rev. A  
8
For more information www.analog.com  
LTC4213  
TIMING DIAGRAM  
1
2
3
4
5
6
V
V
ON(TH)  
ON(TH)  
V
– V  
ON(HYST)  
ON(TH)  
V
ON  
V
GSMAX  
V
– 0.3V  
GSMAX  
0.3V  
V
0.3V  
GATE  
t
t
t
ON  
DEBOUNCE  
OFF  
4213 TD  
1
2
3
4
5
1.2V  
∆V  
SENSE  
V
GATE  
V
GSMAX  
V
– 0.3V  
GSMAX  
0.3V  
V
ON  
V
ON(TH)  
V
ON(RST)  
4213 TD  
t
t
RESET  
FAULT(FAST)  
Rev. A  
9
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LTC4213  
OPERATION  
Overview  
thresholds of SLOWCOMP and FASTCOMP are V and  
CB  
V
. The I pin selects one of the three settings:  
CB(FAST)  
SEL  
The LTC4213 is an electronic circuit breaker (ECB) that senses  
load current with the the RDS(ON) of the external MOSFET  
instead of using an external sense resistor. This No RSENSE  
method is less precise than RSENSE method due to the variation  
1. V = 25mV and V  
= 100mV with I at GND  
CB  
CB(FAST)  
SEL  
2. V = 50mV and V  
= 175mV with ISEL floating  
CB  
CB(FAST)  
3. V = 100mV and V  
= 325mV with I at V  
SEL CC  
CB  
CB(FAST)  
of R  
. However, the advantages are less complex, lower  
costDaSn(OdNr)educe voltage and power loss in the switch path  
owing to the absence of a sense resistor. Without the exter-  
I
can be stepped dynamically, such as to allow a higher  
SEL  
circuit breaker threshold at startup and a lower threshold  
after supply current has settled. The inputs of the compar-  
ators are SENSEP and SENSEN pins. The voltage across  
the drain and source of the external MOSFET is sensed at  
SENSEP and SENSEN.  
nal sense resistor voltage drop, the V  
improvement can  
OUT  
be quite significant especially in the low voltage applications.  
The LTC4213 is designed to operate over a bias supply range  
from 2.3V to 6V. When bias supply voltage and the ON pin are  
sufficiently high, the GATE pin starts charging after an internal  
debounce delay of 60µs. During the GATE ramp-up, the circuit  
breaker is not armed until the external MOSFET is fully turned  
on. Once the circuit breaker is armed, the LTC4213 monitors  
ΔVSENSE = VSENSEP VSENSEN  
(1)  
When ∆VSENSE exceeds the VCB threshold but is less than  
V
, the comparator SLOWCOMP trips the circuit  
CB(FAST)  
the load current through the R  
of the external MOSFET.  
DS(ON)  
breaker after a 16µs delay. If ∆VSENSE is greater than  
VCB(FAST), the comparator FASTCOMP trips the circuit  
breaker in 1µs.  
Circuit Breaker Function  
The LTC4213 provides dual level and dual response time  
circuit breaker functions for overcurrent protection.  
A severe short circuit condition can cause the load supply  
to dip substantially. This does not pose a problem for the  
LTC4213 as the input stages of the current limit compar-  
ators are common mode to ground.  
The LTC4213 circuit breaker function block consists  
of two comparators, SLOWCOMP and FASTCOMP. The  
APPLICATIONS INFORMATION  
Figure 1 shows an electronic circuit breaker (ECB) appli-  
pins sense the load current at the drain and source of  
the external MOSFET. In ECB applications, large input  
bypass capacitors are usually recommended for good  
transient performance.  
cation. An external auxiliary supply biases the VCC pin  
and the internal circuitry. A V load supply powers the  
IN  
load via an external MOSFET. The SENSEP and SENSEN  
Q1  
SI4864DY  
Undervoltage Lockout  
V
V
OUT  
1.25V  
3.5A  
IN  
1.25V  
+
+
C
C
IN  
LOAD  
100µF  
An internal undervoltage lockout (UVLO) circuit resets the  
100µF  
LTC4213 if the V supply is too low for normal opera-  
CC  
tion. The UVLO comparator (UVCOMP) has a low-to-high  
threshold of 2.07V and 100mV of hysteresis. UVLO shares  
the glitch filters for both low-to-high transition (startup)  
and high-to-low transition (reset) with the ON pin com-  
parators. Above 2.07V bias supply voltage, the LTC4213  
starts if the ON pin conditions are met. Short, shallow  
bus bias supply transient dips below 1.97V of less than  
80µs are ignored.  
V
SENSEP GATE SENSEN  
BIAS  
2.5V  
V
CC  
V
CC  
C1  
0.1µF  
LTC4213  
GND  
R4  
10k  
OFF ON  
ON  
READY  
I
SEL  
4213 F01  
Figure 1. LTC4213 Electronic Circuit Breaker Application  
Rev. A  
10  
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LTC4213  
APPLICATIONS INFORMATION  
ON Function  
minimized. Driving beyond this recommended VGS voltage  
yields a marginal decrease in RDS(ON) . At start-up, the  
gate voltage starts at ground potential. The GATE ramps  
past the MOSFET threshold and the load current begins  
When V is below comparator COMP1’s threshold of  
ON  
0.4V for 80µs, the device resets. The system leaves reset  
mode if the ON pin rises above comparator COMP2’s  
threshold of 0.8V and the UVLO condition is met. Leaving  
reset mode, the GATE pin starts up after a tDEBOUNCE delay  
of 60µs. When ON goes below 0.76V, the GATE shuts off  
after a 5µs glitch filter delay. The output is discharged by  
to flow. When V exceeds ∆V  
, the circuit breaker  
GS  
GSARM  
is armed and enabled. The chosen MOSFET should have a  
recommended minimum VGS drive level that is lower than  
∆V  
. Finally, V reaches a maximum at ∆V  
.
GSARM  
GS  
GSMAX  
the external load when V is in between 0.4V to 0.8V.  
ON  
Trip and Reset Circuit Breaker  
At this state, the ON pin can re-enable the GATE if V  
ON  
Figure 2 shows the timing diagram of V  
and V  
exceeds 0.8V for more than 8µs. Alternatively, the device  
after a fault condition. A tripped circuitGbATrEeaker cRanEAbDeY  
resets if the ON pin is brought below 0.4V for 80µs. Once  
reset either by cycling the V bias supply below UVLO  
reset, the GATE pin restarts only after the t  
60µs  
CC  
DEBOUNCE  
threshold or pulling ON below 0.4V for >t  
. Figure 3  
delay at VON rising above 0.8V. To protect the ON pin  
from overvoltage stress due to supply transients, a series  
resistor of greater than 10k is recommended when the  
ON pin is connected directly to the supply. An external  
resistive divider at the ON pin can be used with COMP2  
to set a supply undervoltage lockout value higher than the  
internal UVLO circuit. An RC filter can be implemented at  
the ON pin to increase the power-up delay time beyond  
the internal 60µs delay.  
shows the timing diagram for a tripped RcEirScEuTit breaker  
being reset by the ON pin.  
Calculating Current Limit  
The fault current limit is determined by the R  
of the  
(2)  
DS(ON)  
MOSFET and the circuit breaker voltage V .  
CB  
VCB  
RDS(ON)  
ILIMIT  
=
Gate Function  
The RDS(ON) value depends on the manufacturer’s dis-  
tribution, VGS and junction temperature. Short Kelvin-  
sense connections between the MOSFET drain and  
source to the LTC4213 SENSEP and SENSEN pins are  
strongly recommended.  
The GATE pin is held low in reset mode. 60µs after leaving  
reset mode, the GATE pin is charged up by an internal  
100µA current source. The circuit breaker arms when  
V
GATE  
> V  
+ ∆  
. In normal mode operation,  
SENSEN  
VGSARM  
the GATE peak voltage is internally clamped to ∆V  
GSMAX  
For a selected MOSFET, the nominal load limit current is  
given by:  
above the SENSEN pin. When the circuit breaker trips, an  
internal MOSFET shorts the GATE pin to GND, turning off  
the external MOSFET.  
VCB(NOM)  
ILIMIT(NOM)  
=
(3)  
(4)  
RDS(ON)(NOM)  
READY Status  
The READY pin is held low during reset and at startup. It  
is pulled high by an external pull-up resistor 50µs after  
the circuit breaker arms. The READY pin pulls low if the  
circuit breaker trips or the ON pin is pulled below 0.76V,  
The minimum load limit current is given by:  
VCB(MIN)  
ILIMIT(MIN)  
=
RDS(ON)(MAX)  
or V drops below undervoltage lockout.  
CC  
The maximum load limit current is given by:  
∆V  
and V  
GSMAX  
GSARM  
Each MOSFET has a recommended VGS drive voltage  
where the channel is deemed fully enhanced and RDS(ON) is  
Rev. A  
11  
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LTC4213  
APPLICATIONS INFORMATION  
Example Current Limit Calculation  
VCB(MAX)  
ILIMIT(MAX)  
=
(5)  
RDS(ON)(MIN)  
An Si4410DY is used for current detection in a 5V  
supply system with the LTC4213 VCB at 25mV (ISEL  
pin grounded).  
Most MOSFET data sheets have an R  
specification  
DS(ON)  
with typical and maximum values but no minimum value.  
Assuming a normal distribution with typical as mean, the  
minimum value can be estimated as:  
The R  
distribution for the Si4410DY is:  
DS(ON)  
Typical R  
= 0.015Ω = 100%  
DS(ON)  
Maximum R  
= 0.02Ω = 133.3%  
RDS(ON)(MIN) = 2RDS(ON)(NOM) RDS(ON)(MAX)  
(6)  
DS(ON)  
Estimated MIN R  
= 2 • 15 – 20 = 0.010Ω = 66.7%  
DS(ON)  
The R  
R
variation due to gate drive is:  
DS(ON)  
The LTC4213 gives higher gate drive than the manufac-  
turer specified gate drive for R This gives a slightly  
@ 4.5V = 0.015Ω = 100% (spec. TYP)  
DS(ON)  
GS  
DS(ON)  
lower R  
than specified. Operating temperature also  
DS(ON)  
R
DS(ON)  
R
DS(ON)  
R
DS(ON)  
@ 4.8V = 0.014Ω = 93% (MIN ∆V  
)
GS  
GSMAX  
modulates the R  
value.  
DS(ON)  
@ 7V = 0.0123Ω = 82% (NOM ∆V  
)
GS  
GSMAX  
@ 8V = 0.012Ω = 80% (MAX ∆V  
)
GS  
GSMAX  
CIRCUIT BREAKER TRIPS  
GATE AND READY PINS PULL LOW  
SHORT CIRCUIT  
A
B
>V  
V
CB  
CB  
∆V  
SENSE  
CB TRIPS  
V
GATE  
V
READY  
t
4213 F02  
FAULT  
Figure 2. Short Circuit Fault Timing Diagram  
Rev. A  
12  
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LTC4213  
APPLICATIONS INFORMATION  
CIRCUIT BREAKER TRIPS  
GATE AND READY PINS PULL LOW  
SHORT CIRCUIT  
NOT RESET  
RESET REINITIALIZE  
6 7 8  
RESTART  
1
2
3
4
5
V
V
> 2.07V  
CC  
ON  
0.8V  
0.76V  
0.4V  
0V  
>V  
V
CB  
CB  
∆V  
SENSE  
t
FAULT  
CB TRIPS  
V
GATE  
V
READY  
V
< 0.4V  
ON  
DURATION > t  
RESET  
t
DEBOUNCE  
NORMAL MODE  
FAULT LATCHED OFF  
STARTUP CYCLE  
4213 F03  
Figure 3. Resetting Fault Timing Diagram  
Rev. A  
13  
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LTC4213  
APPLICATIONS INFORMATION  
Operating temperature of 0° to 70°C.  
various operating V . From this table users can refer to  
CC  
the MOSFET’s data sheet to obtain the R  
value.  
DS(ON)(NOM)  
R
DS(ON)  
R
DS(ON)  
R
DS(ON)  
at 25°C = 100%  
at 0°C = 90%  
Table 1. Nominal Operating ∆VGSMAX for Typical Bias  
Supply Voltage  
at 70°C = 120%  
V
(V)  
∆V  
GSMAX  
(V)  
CC  
2.3  
2.5  
2.7  
3.0  
3.3  
5.0  
6.0  
4.3  
MOSFET resistance variation:  
5.0  
5.6  
6.5  
7.0  
7.0  
7.0  
R
R
= 15m • 0.82 = 12.3mΩ  
= 15m • 1.333 • 0.93 • 1.2 = 15m • 1.488  
= 22.3mΩ  
DS(ON)(NOM)  
DS(ON)(MAX)  
RDS(ON)(MIN) = 15m • 0.667 • 0.80 • 0.90 = 15m • 0.480  
= 7.2mΩ  
V
CB  
variation:  
Load Supply Power-Up after Circuit Breaker Armed  
NOM V = 25mV = 100%  
CB  
Figure 4 shows a normal power-up sequence for the circuit  
MIN V = 22.5mV = 90%  
CB  
in Figure 1 where the V load supply power-up after circuit  
IN  
breaker is armed. V is first powered up by an auxiliary  
bias supply. VCC risCeCs above 2.07V at time point 1. VON  
exceeds 0.8V at time point 2. After a 60µs debounce delay,  
the GATE pin starts ramping up at time point 3. The external  
MOSFET starts conducting at time point 4. At time point 5,  
MAX V = 27.5mV = 110%  
CB  
The current limits are:  
I
I
= 25mV/12.3mΩ = 2.03A  
= 22.5mV/22.3mΩ = 1.01A  
LIMIT(NOM)  
LIMIT(MIN)  
V
exceed ∆V  
and the circuit breaker is armed.  
GATE  
After 50µs (t  
GSARM  
ILIMIT(MAX) = 27.5mV/7.2mΩ = 3.82A  
delay), READY pulls high by an external  
READY  
For proper operation, the minimum current limit must  
exceed the circuit maximum operating load current with  
margin. So this system is suitable for operating load cur-  
rent up to 1A. From this calculation, we can start with the  
resistor at time point 6. READY signals the V load supply  
IN  
module to start its ramp. The load supply begins soft-start  
ramp at time point 7. The load supply ramp rate must be  
slow to prevent circuit breaker tripping as in Equation 8.  
general rule for MOSFET R  
by assuming maximum  
DS(ON)  
ΔV  
Δt  
IOPMAX ILOAD  
IN  
operating load current is roughly half of the I  
Equation 7 shows the rule of thumb.  
.
<
(8)  
LIMIT(NOM)  
CLOAD  
VCB(NOM)  
Where I  
is the maximum operating current defined  
OPMAX  
by Equation 7.  
IOPMAX  
=
(7)  
2 RDS(ON)(NOM)  
For illustration, V = 25mV and R  
= 3.5mΩ at the  
CB  
nominal operating ∆VGSMAX. TheDmS(OaxNi)mum operating  
current is 3.5A (refer to Equation 7). Assuming the load  
can draw a current of 2A at power-up, there is a margin  
Note that the R  
is at the LTC4213 nominal  
DS(ON)(NOM)  
operating ∆VGSMAX rather than at typical vendor spec.  
Table 1 gives the nominal operating ∆VGSMAX at the  
of 1.5A available for C  
of 100µF and V ramp rate  
LOAD  
IN  
should be <15V/ms. At time point 8, the current through  
the MOSFET reduces after C is fully charged.  
LOAD  
Rev. A  
14  
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LTC4213  
APPLICATIONS INFORMATION  
CIRCUIT BREAKER ARMS  
1
2
3
4
5
6 7  
8
2.07V  
0.8V  
V
, V  
CC ON  
∆V  
GSMAX  
+ V  
SENSEN  
∆V  
GSMAX  
∆V  
GSARM  
V
th  
100μA  
V
V
GATE  
, V  
SENSEP SENSEN  
V
READY  
V
CB  
∆V  
SENSE  
RESET MODE  
t
STARTUP CYCLE  
NORMAL CYCLE  
DEBOUNCE  
t
READY  
4213 F04  
Figure 4. Load Supply Power-Up After Circuit Breaker Armed  
Rev. A  
15  
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LTC4213  
APPLICATIONS INFORMATION  
Load Supply Power-Up Before V  
∆V  
> V . At time point 7, the GATE voltage peaks.  
CC  
SENSE CB  
50µs after time point 6, READY goes HIGH.  
Referring back to Figure 1, the V load supply can also  
IN  
be powered up before V . Figure 5 shows the timing  
CC  
Start-up Problems  
diagram with the V load supply active initially. An inter-  
IN  
There is no current limit monitoring during output  
charging for the Figure 5 power-up sequence where the  
load supply is powered up before V . This is because  
the GATE voltage is below ∆VGSARMCCand the MOSFET  
may not reach the specified R  
ply should have sufficient capability to handle the inrush  
as the output charges up. For proper startup, the final  
nal circuit ensures that the GATE pin is held low. At time  
point 1, V clears UVLO and at time point 2, ON clears  
CC  
0.8V. 60µs later at time point 3, the GATE is ramped up  
with 100µA. At time point 4, GATE reaches the external  
. The V load sup-  
DS(ON)  
MOSFET threshold V and V  
starts to ramp up. At  
IN  
TH  
OUT  
time point 5, V  
is near its peak. At time point 6, the  
SENSEN  
circuit breaker is armed and the circuit breaker can trip if  
CIRCUIT BREAKER ARMS  
V
– V  
= V  
V
MAXES OUT  
SENSEP  
SENSEN  
CB  
GATE  
READY SIGNALS  
0
1
2
3
4
5
6
7
8
V
> 2.07V  
CC  
V
> 0.8V  
ON  
V , V  
CC ON  
∆V  
GSMAX  
+ V  
SENSEN  
∆V  
+ V  
SENSEN  
GSARM  
V
th  
V
GATE  
V
V
SENSEP  
SENSEN  
V
READY  
t
READY  
t
RESET MODE  
DEBOUNCE  
STARTUP CYCLE  
NORMAL CYCLE  
4213 F05  
Figure 5. Load Supply Power-Up Before VCC  
Rev. A  
16  
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LTC4213  
APPLICATIONS INFORMATION  
load at time point 6 should be within the circuit breaker  
limits. Otherwise, the system fails to start and the circuit  
breaker trips immediately after arming. In most applica-  
tions additional external gate capacitance is not required  
The selected MOSFET VGS absolute maximum rating  
should meet the LTC4213 maximum ∆V  
of 8V.  
GSMAX  
Other MOSFET criteria such as V  
, I  
, and R  
DMAX  
should be reviewed. Spikes andBriDnSgSing above maxDimS(uOmN)  
operating voltage should be considered when choosing  
unless C  
is large and startup becomes problematic.  
LOAD  
If an external gate capacitor is employed, its capacitance  
value should not be excessive unless it is used with a  
series resistor. This is because a big gate capacitor with-  
out resistor slows down the GATE turn off during a fault.  
An alternative method would be a stepped ISEL pin to allow  
a higher current limit during startup.  
V
. I  
should be greater than the current limit. The  
BDSS  
maximuDmMAoXperating load current is determined by the  
R
value. See the Calculating Current Limit section  
DS(ON)  
for details.  
Supply Requirements  
In the event of output short circuit or a severe overload,  
the load supply can collapse during GATE ramp up due  
to load supply current limit. The chosen MOSFET must  
withstand this possible brief short circuit condition before  
time point 6 where the circuit breaker is allowed to trip.  
Bench short circuit evaluation is a practical verification  
of a reliable design. To have current limit while powering  
a MOSFET into short circuit conditions, it is preferred  
that the load supply sequences to turn on after the circuit  
breaker is armed as described in an earlier section.  
The LTC4213 can be powered from a single supply or  
dual supply system. The load supply is connected to the  
SENSEP pin and the drain of the external MOSFET. In the  
single supply case, the V pin is connected to the load  
CC  
supply, preferably with an RC filter. With dual supplies,  
V
V
is connected to an auxiliary bias supply V  
AUX  
where  
CC  
AUX  
voltage should be greater or equal to the load sup-  
ply voltage. The load supply voltage must be capable of  
sourcing more current than the circuit breaker limit. If  
the load supply current limit is below the circuit breaker  
trip current, the LTC4213 may not react when the output  
overloads. Furthermore, output overloads may trigger  
UVLO if the load supply has foldback current limit in a  
single supply system.  
Power-Off Cycle  
The system can be powered off by toggling the ON pin  
low. When ON is brought below 0.76V for 5µs, the GATE  
and READY pins are pulled low. The system resets when  
ON is brought below 0.4V for 80µs.  
V Transient and Overvoltage Protection  
IN  
Input transient spikes are commonly observed whenever  
the LTC4213 responds to overload. These spikes can be  
large in amplitude, especially given that large decoupling  
capacitors are absent in hot swap environments. These  
short spikes can be clipped with a transient suppressor  
of adequate voltage and power rating. In addition, the  
LTC4213 can detect a prolonged overvoltage condition.  
MOSFET Selection  
The LTC4213 is designed to be used with logic (5V) and  
sub-logic (3V) MOSFETs for V potentials above 2.97V  
CC  
with ∆VGSMAX exceeding 4.5V. For a VCC supply range  
between 2.3V and 2.97V, sub-logic MOSFETs should be  
used as the minimum ∆V  
is less than 4.5V.  
GSMAX  
When SENSEP exceeds V + 0.7V for more than 65µs,  
CC  
the LTC4213’s internal overvoltage protection circuit  
Rev. A  
17  
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LTC4213  
APPLICATIONS INFORMATION  
activates and the GATE pin pulls down and turns off the  
external MOSFET.  
Typical Single Supply Hot Swap Application  
A typical single supply hot swap application is shown in  
Figure 7. The RESET signal at the backplane is held low  
initially. When the PCB long edge makes contact the ON  
pin is held low (<0.4V) and the LTC4213 is kept in reset  
Typical Electronic Fuse Application for a Single  
Supply System  
Figure 6 shows a single supply electronic fuse applica-  
mode. When the short edge makes contact the V load  
IN  
tion. An RC filter at V pin filters out transient spikes.  
supply is connected to the card. The V is biased via  
CC  
CC  
An optional Schottky diode can be added if severe V  
the RC filter. The V  
is pre-charged via R5. To pow-  
CC  
OUT  
dips during a fault start-up condition is a concern. The  
use of the Schottky and RC filter combination is allowed  
if the load supply is above 2.9V and the total voltage drop  
towards the VCC pin is less than 0.4V. The LTC4213’s  
internal UVLO filter further rejects bias supply’s transients  
er-up successfully, the R5 resistor value should be small  
enough to provide the load requirement and to overcome  
the 280µA current source sinking into the SENSEN pin.  
On the other hand, the R5 resistor value should be big  
enough avoiding big inrush current and preventing big  
short circuit current. When RESET signals high at back-  
plane, C2 capacitor at the ON pin charges up via the R3/  
R2 resistive divider. When ON pin voltage exceeds 0.8V,  
the GATE pin begins to ramp up. When the GATE voltage  
peaks, the external MOSFET is fully turned on and the  
of less than t  
During power-up, it is good engineer-  
RESET.  
ing practice to ensure that V is fully established before  
CC  
the ON pin enables the system at V = 0.8V. In this appli-  
cation, the V voltage reached finOaNl value approximately  
CC  
after a 5.3 • R C delay. This is followed by the ON pin  
1
1
exceeding 0.8V after a 0.17 • R C delay. The GATE pin  
V -to-V  
voltage drop reduces. In normal mode oper-  
2 2  
DEBOUNCE  
IN  
OUT  
starts up after an internal t  
delay.  
ation, the LTC4213 monitors the load current through the  
of the external MOSFET.  
R
DS(ON)  
Q1  
SI4410DY  
V
V
5V  
1A  
IN  
5V  
OUT  
D1  
MBRO520L  
+
+
C
C
LOAD  
IN  
100μF  
100μF  
R1  
33Ω  
SENSEP GATE SENSEN  
R3  
V
CC  
V
324k  
IN  
C1  
10μF  
LTC4213  
READY  
R4  
10k  
ON  
GND  
I
SEL  
Q2  
2N7002  
R2  
80.6k  
C2  
0.22μF  
RESET  
4213 F06  
Figure 6. Single Supply Electronic Fuse  
Rev. A  
18  
For more information www.analog.com  
LTC4213  
PACKAGE DESCRIPTION  
DDB Package  
8-Lead Plastic DFN (3mm × 2mm)  
(Reference LTC DWG # 05-08-ꢀ702 Rev C)  
0.6ꢀ 0.05  
0.70 0.05  
2.55 0.05  
ꢀ.ꢀ5 0.05  
PACKAGE  
OUTLINE  
0.25 0.05  
0.50 BSC  
2.20 0.05  
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS  
R = 0.ꢀꢀ5  
0.40 0.ꢀ0  
3.00 0.ꢀ0  
TYP  
5
R = 0.05  
8
TYP  
2.00 0.ꢀ0  
0.75 0.05  
PIN ꢀ BAR  
TOP MARK  
PIN ꢀ  
R = 0.20 OR  
(SEE NOTE 6)  
0.25 × 45°  
0.56 0.05  
CHAMFER  
4
(DDB8) DFN ꢀꢀꢀ6 REV C  
0.25 0.05  
0.200 REF  
0.50 BSC  
2.ꢀ5 0.05  
0 – 0.05  
BOTTOM VIEW—EXPOSED PAD  
NOTE:  
ꢀ. DRAWING CONFORMS TO VERSION (WECD-ꢀ) IN JEDEC PACKAGE OUTLINE M0-229  
2. DRAWING NOT TO SCALE  
3. ALL DIMENSIONS ARE IN MILLIMETERS  
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE  
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.ꢀ5mm ON ANY SIDE  
5. EXPOSED PAD SHALL BE SOLDER PLATED  
6. SHADED AREA IS ONLY A REFERENCE FOR PIN ꢀ LOCATION ON THE TOP AND BOTTOM OF PACKAGE  
Rev. A  
19  
For more information www.analog.com  
LTC4213  
PACKAGE DESCRIPTION  
TS8 Package  
8-Lead Plastic TSOT-23  
(Reference LTC DWG # 05-08-1637 Rev A)  
2.90 BSC  
(NOTE 4)  
0.40  
MAX  
0.65  
REF  
1.22 REF  
1.50 – 1.75  
(NOTE 4)  
2.80 BSC  
1.4 MIN  
3.85 MAX 2.62 REF  
PIN ONE ID  
RECOMMENDED SOLDER PAD LAYOUT  
PER IPC CALCULATOR  
0.22 – 0.36  
8 PLCS (NOTE 3)  
0.65 BSC  
0.80 – 0.90  
0.20 BSC  
DATUM ‘A’  
0.01 – 0.10  
1.00 MAX  
0.30 – 0.50 REF  
1.95 BSC  
TS8 TSOT-23 0710 REV A  
0.09 – 0.20  
(NOTE 3)  
NOTE:  
1. DIMENSIONS ARE IN MILLIMETERS  
2. DRAWING NOT TO SCALE  
3. DIMENSIONS ARE INCLUSIVE OF PLATING  
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR  
5. MOLD FLASH SHALL NOT EXCEED 0.254mm  
6. JEDEC PACKAGE REFERENCE IS MO-193  
Rev. A  
20  
For more information www.analog.com  
LTC4213  
REVISION HISTORY  
REV  
DATE  
DESCRIPTION  
PAGE NUMBER  
A
12/21 Added a new TSOT-23 (ThinSOT) package.  
Added the TSOT-23 pin configuration and the TSOT-23 order information.  
Updated Pin Functions section for TSOT-23.  
Removed pin number in the Block Diagram.  
Changed DDB package outline to Rev C.  
1
2
7
8
19  
20  
22  
Added the TSOT-23 package Outline.  
Added part LTC4246 in the Related Parts table.  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog  
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications  
21  
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
LTC4213  
TYPICAL APPLICATION  
V
IN  
STAGGERED  
PCB EDGE  
CONNECTOR  
R5  
Q1  
IRF7455  
330Ω  
V
V
3.3V  
3.6A  
IN  
OUT  
3.3V  
R3  
Zx  
182k  
SMAJ6.0A  
+
C
LOAD  
100µF  
D1  
BAT54ALT1  
SENSEP GATE  
LTC4213  
SENSEN  
ON  
RESET  
R1  
68Ω  
R2  
80.6k  
C2  
1μF  
R4  
10k  
V
CC  
READY  
C1  
2.2µF  
I
GND  
SEL  
NC  
4213 F07  
BACKPLANE GND  
CARD GND  
Figure 7. Single Supply Hot Board Insertion  
RELATED PARTS  
PART NUMBER  
DESCRIPTION  
COMMENTS  
LTC1421  
Dual Channel, Hot Swap Controller  
Single Channel, Hot Swap Controller in SO-8  
Fault Protected, Hot Swap Controller  
PCI Hot Swap Controllers  
24-Pin, Operates from 3V to 12V and Supports –12V  
Operates from 2.7V to 12V, System Reset Output  
Operates up to 16.5V, Overvoltage Protection to 33V  
3.3V, 5V and 12V Supplies  
LTC1422  
LTC1642  
LTC1643AL/  
LTC1643AH  
LTC1645  
LTC1647  
LTC4210  
LTC4211  
LTC4216  
LTC4221  
LTC4230  
LTC4251  
LTC4252  
LTC4253  
Dual Channel Hot Swap Controller  
Operates from 1.2V to 12V, Power Sequencing  
Operates from 2.7V to 16.5V  
Dual Channel, Hot Swap Controller  
Single Channel, Hot Swap Controller in SOT-23  
Single Channel, Hot Swap Controller in MSOP  
Ultra Low Voltage Hot Swap Controller  
Dual Channel, Hot Swap Controller  
Operates from 2.7V to 16.5V, Multifunction Current Control  
2.5V to 16.5V, Multifunction Current Control  
Operates from 2.7V to 16.5V, Multifunction Current  
Protects Load Voltages from 0V to 6V  
Triple Channel, Hot Swap Controller  
–48V Hot Swap Controller in S0T-23  
–48V Hot Swap Controller in MSOP  
–48V Hot Swap Controller and Sequencer  
1.7V to 16.5V, Multifunction Current Control  
–48V Hot Swap Controller, Active Current Limiting  
Active Current Limiting with Drain Acceleration  
Active Current Limiting with Drain Acceleration and Three  
Sequenced Power Good Outputs  
LTC4246  
Octal Electronic Circuit Breaker  
0V to 13.2V, 30mΩ R , SPI Interface  
ON  
Rev. A  
11/21  
www.analog.com  
ANALOG DEVICES, INC. 2005-2021  
22  

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