LT8606 [ADI]
42V, 750mA Synchronous Step-Down Regulator with 2.5μA Quiescent Current;型号: | LT8606 |
厂家: | ADI |
描述: | 42V, 750mA Synchronous Step-Down Regulator with 2.5μA Quiescent Current |
文件: | 总24页 (文件大小:2950K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT8607/LT8607B
42V, 750mA Synchronous
Step-Down Regulator with
2.5µA Quiescent Current
FEATURES
DESCRIPTION
The LT®8607 is a compact, high efficiency, high speed syn-
chronous monolithic step-down switching regulator that
consumes only 1.7µA of non-switching quiescent current.
The LT8607 can deliver 750mA of continuous current.
Burst Mode operation enables high efficiency down to very
low output currents while keeping the output ripple below
n
Wide Input Voltage Range: 3.0V to 42V
Ultralow Quiescent Current Burst Mode® Operation
n
n
<3µA I Regulating 12V to 3.3V
Q
IN
P-P
OUT
n
Output Ripple <10mV
n
High Efficiency 2MHz Synchronous Operation
n
>93% Efficiency at 0.5A, 12V to 5V
IN
OUT
n
n
n
n
n
n
n
n
n
n
n
n
10mV . Internal compensation with peak current mode
750mA Maximum Continuous Output
Fast Minimum Switch-On Time: 35ns
LT8607 Available in Fixed 5V Output
Adjustable and Synchronizable: 200kHz to 2.2MHz
Spread Spectrum Frequency Modulation for Low EMI
Allows Use of Small Inductors
Low Dropout
Peak Current Mode Operation
Accurate 1V Enable Pin Threshold
Internal Compensation
Output Soft-Start and Tracking
P-P
topology allows the use of small inductors and results in
fast transient response and good loop stability. The EN/UV
pin has an accurate 1V threshold and can be used to pro-
gram V undervoltage lockout or to shut down the LT8607
IN
reducing the input supply current to 1µA.
The MSOP package includes a SYNC pin to synchronize
to an external clock, or to select Burst Mode operation
or pulse-skipping with or without spread spectrum; the
TR/SS pin programs soft-start or tracking. The DFN
package omits these pins and can be purchased in pulse-
skipping or Burst Mode operation.
Small Thermally Enhanced 10-Lead MSOP Package
or 8-Lead 2mm × 2mm DFN Package
AEC-Q100 Qualified for Automotive Applications
PART NUMBER PACKAGE OUTPUT VOLTAGE SYNC FUNCTIONALITY
n
LT8607MSE
MSE
Programmable
Fixed 5V Out
Programmable
LT8607-5MSE MSE
Programmable
APPLICATIONS
General Purpose Step-Down Converter
Low EMI Step Down
LT8607DFN
DFN
DFN
Programmable
Programmable
Burst Mode Operation
Pulse-Skipping Mode
LT8607BDFN
All registered trademarks and trademarks are the property of their respective owners.
TYPICAL APPLICATION
12VIN to 5VOUT Efficiency
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5V, 2MHz Step-Down
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1MΩ
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Rev. D
1
Document Feedback
For more information www.analog.com
LT8607/LT8607B
ABSOLUTE MAXIMUM RATINGS
(Note 1)
V , EN/UV, PG..........................................................42V
Operating Junction Temperature Range (Note 2)
IN
FB, TR/SS . .................................................................4V
LT8607E ............................................ –40°C to 125°C
LT8607I ............................................. –40°C to 125°C
LT8607J............................................. –40°C to 150°C
LT8607H............................................ –40°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
SYNC Voltage .............................................................6V
PIN CONFIGURATION
LT8607
LT8607-5
LT8607/LT8607B
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ꢇꢘꢖ ꢋꢉꢓꢈ
BST
SW
ꢗ
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ꢥ
ꢣ
ꢤ
EN/UV
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Rꢇ
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V
IN
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ꢖꢗ
INTV
PG
FB
CC
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RT
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Dꢇ ꢂꢈꢇꢉꢈꢊꢅ
ꢋꢌꢍꢅꢈD ꢎꢏꢐꢐ × ꢏꢐꢐꢑ ꢂꢍꢈꢒꢀꢄꢇ Dꢓꢔ
θ
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θ
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ORDER INFORMATION
LEAD FREE FINISH
LT8607EMSE#PBF
TAPE AND REEL
PART MARKING*
LTGXJ
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–40°C to 125°C
–40°C to 150°C
LT8607EMSE#TRPBF
LT8607IMSE#TRPBF
LT8607HMSE#TRPBF
LT8607EMSE-5#TRPBF
LT8607JMSE-5#TRPBF
LT8607EDC#TRPBF
LT8607IDC#TRPBF
LT8607HDC#TRPBF
LT8607BEDC#TRPBF
LT8607BIDC#TRPBF
LT8607BHDC#TRPBF
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
LT8607IMSE#PBF
LTGXJ
LT8607HMSE#PBF
LTGXJ
LT8607EMSE-5#PBF
LT8607JMSE-5#PBF
LT8607EDC#TRMPBF
LT8607IDC#TRMPBF
LT8607HDC#TRMPBF
LT8607BEDC#TRMPBF
LT8607BIDC#TRMPBF
LT8607BHDC#TRMPBF
LTHNY
LTHNY
LGXK
8-Lead Plastic (2mm × 2mm) DFN
8-Lead Plastic (2mm × 2mm) DFN
8-Lead Plastic (2mm × 2mm) DFN
8-Lead Plastic (2mm × 2mm) DFN
8-Lead Plastic (2mm × 2mm) DFN
8-Lead Plastic (2mm × 2mm) DFN
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
LGXK
LGXK
LGXM
LGXM
LGXM
Rev. D
2
For more information www.analog.com
LT8607/LT8607B
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
AUTOMOTIVE PRODUCTS**
LT8607EMSE#WPBF
LT8607IMSE#WPBF
LT8607EMSE#WTRPBF
LT8607IMSE#WTRPBF
LT8607JMSE#WTRPBF
LT8607HMSE#WTRPBF
LTGXJ
LTGXJ
LTGXJ
LTGXJ
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–40°C to 150°C
–40°C to 125°C
–40°C to 150°C
LT8607JMSE#WPBF
LT8607HMSE#WPBF
LT8607EMSE-5#WPBF
LT8607JMSE-5#WPBF
LT8607EDC#WTRMPBF
LT8607IDC#WTRMPBF
LT8607JDC#WTRMPBF
LT8607HDC#WTRMPBF
LT8607EMSE-5#WTRPBF LTHNY
LT8607JMSE-5#WTRPBF LTHNY
LT8607EDC#WTRPBF
LT8607IDC#WTRPBF
LT8607JDC#WTRPBF
LT8607HDC#WTRPBF
LGXK
LGXK
LGXK
LGXK
8-Lead Plastic (2mm × 2mm) DFN
8-Lead Plastic (2mm × 2mm) DFN
8-Lead Plastic (2mm × 2mm) DFN
8-Lead Plastic (2mm × 2mm) DFN
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–40°C to 150°C
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These
models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your
local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for
these models.
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Minimum Input Voltage
2.5
3.0
3.2
V
l
V
IN
Current in Regulation
LT8607/LT8607B
l
l
V
V
= 6V, V
= 6V, V
= 2.7V, Output Load = 100µA
= 2.7V, Output Load = 1mA
56
500
90
700
µA
µA
IN
IN
OUT
OUT
LT8607-5
l
l
V
V
= 12V, V
= 5V, I
LOAD
= 100µA
= 1mA
56
500
90
700
µA
µA
IN
IN
OUT
OUT
= 12V, V
= 5V, I
LOAD
Feedback Reference Voltage
LT8607 MSOP Package
V
V
= 6V, I
= 6V, I
= 100mA
0.774
0.762
0.778
0.778
0.782
0.798
V
V
IN
IN
LOAD
LOAD
l
l
= 100mA
LT8607/LT8607B DFN Package
V
IN
V
IN
= 6V, I
= 6V, I
= 100mA
= 100mA
0.771
0.753
0.778
0.778
0.785
0.803
V
V
LOAD
LOAD
Output Reference Voltage
LT8607-5
V
V
= 12V, I
= 100mA
= 100mA
4.970
4.890
5
5
5.030
5.110
V
V
IN
IN
LOAD
LOAD
l
l
l
= 12V, I
Feedback Voltage Line Regulation
Output Voltage Line Regulation
LT8607/LT8607B
= 4.0V to 40V
V
IN
0.02
0.02
0.04
0.04
%/V
%/V
LT8607-5
= 6.0V to 40V
V
IN
Rev. D
3
For more information www.analog.com
LT8607/LT8607B
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
nA
Feedback Pin Input Current
LT8607/LT8607B
l
l
V
FB
= 1.0V
20
Output Pin Input Current
Minimum On-Time
LT8607-5
V
OUT
= 6.0V
900
nA
l
l
I
I
= 500mA, SYNC = 0V or LT8607 DFN
= 500mA, SYNC = 1.9V or LT8607B DFN
35
35
65
60
ns
ns
LOAD
LOAD
l
Minimum Off Time
Oscillator Frequency
I
= 300mA
93
130
ns
LOAD
MSOP Package
R = 221k, I
R = 60.4k, I
R = 18.2k, I
l
l
l
= 350mA
= 350mA
= 350mA
155
640
1.90
200
700
2.00
245
760
2.10
kHz
kHz
MHz
T
T
T
LOAD
LOAD
LOAD
DFN Package
R = 221k, I
l
l
l
= 350mA
= 350mA
= 350mA
140
610
1.85
200
700
2.00
260
790
2.15
kHz
kHz
MHz
T
LOAD
R = 60.4k, I
T
LOAD
LOAD
R = 18.2k, I
T
Top Power NMOS On-Resistance
Top Power NMOS Current Limit
I
= 500mA
375
1.6
1.7
240
mΩ
A
LOAD
l
l
MSOP Package
DFN Package
1.2
1.2
2.0
2.2
A
Bottom Power NMOS On-Resistance
SW Leakage Current
mΩ
µA
V
V
= 36V
5
IN
l
EN/UV Pin Threshold
EN/UV Rising
0.99
1.05
50
1.11
EN/UV Pin Hysteresis
mV
nA
%
EN/UV Pin Current
V
V
V
= 2V
20
13.0
13.0
EN/UV
l
l
PG Upper Threshold Offset from V
Rising
5.0
5.0
8.5
8.5
0.5
FB
FB
FB
PG Lower Threshold Offset from V
PG Hysteresis
Falling
%
FB
%
PG Leakage
V
V
= 42V
200
nA
Ω
PG
PG
PG Pull-Down Resistance
Sync Low Input Voltage
Sync High Input Voltage
TR/SS Source Current
TR/SS Pull-Down Resistance
= 0.1V
550
0.9
2.7
2
1200
l
l
l
MSOP Only
0.4
1
V
INTV = 3.5V, MSOP Only
3.2
3
V
CC
MSOP Only
µA
Ω
Fault Condition, TR/SS = 0.1V, MSOP Only
300
3
900
6
Spread Spectrum Modulation Frequency
V
= 3.3V, MSOP Only
0.5
kHz
SYNC
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime. Absolute Maximum Ratings are those values beyond
which the life of a device may be impaired.
Note 2: The LT8607E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization, and correlation with statistical process controls. The
LT8607I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT8607H is guaranteed over the full –40°C to
150°C operating junction temperature range. High junction temperatures
degrade operating lifetimes. Operating lifetime is derated at junction
temperatures greater than 125°C.
Note 3: This IC includes overtemperature protection that is intended to
protect the device during overload conditions. Junction temperature will
exceed 150°C when overtemperature protection is active. Continuous
operation above the specified maximum operating junction temperature
will reduce lifetime.
Rev. D
4
For more information www.analog.com
LT8607/LT8607B
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency (5V Output, Burst Mode
Operation)
Efficiency (5V Output, Burst Mode
Operation)
Efficiency (3.3V Output,
Burst Mode Operation)
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ꢀꢁꢂꢃ ꢄꢂꢅ
ꢀꢁꢂꢃ ꢄꢂꢅ
Efficiency (3.3V Output,
Burst Mode Operation)
FB Voltage
VOUT Voltage
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ꢀ
ꢀꢁ
ꢀꢁꢁ
ꢀꢁꢁ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢀꢁ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢀꢁ
ꢀꢁꢂ
ꢀ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂ
ꢀꢁꢂꢃ ꢄꢂꢅ
ꢀꢁꢂꢃ ꢄꢂꢅ
ꢀꢁꢂꢃ ꢄꢂꢁ
No-Load Supply Current
(3.3V Output Switching)
Line Regulation
Load Regulation
ꢀ.ꢁꢂ
ꢀ.ꢁꢂ
ꢀ.ꢁꢁ
ꢀ.ꢁꢂ
ꢀ.ꢁꢂ
ꢀ.ꢁꢂ
ꢀ.ꢁꢁ
ꢀ.ꢁꢂ
ꢀ.ꢁꢂ
ꢀ.ꢀꢁ
ꢀ.ꢁꢁ
ꢀ.ꢁꢂ
ꢀ.ꢁꢀ
ꢀ.ꢁꢀ
ꢀ.ꢁꢂ
ꢀ ꢁ ꢂ.ꢂꢃꢄ
ꢀꢁꢂꢃ ꢄ ꢅꢆ ꢇR ꢈꢉꢊꢋꢅꢌ Dꢍꢂ
ꢀ.ꢁꢂ
ꢀ.ꢁꢀ
ꢀ.ꢁꢀ
ꢀ.ꢀꢁ
ꢀ.ꢀꢁ
ꢀ.ꢀꢀ
ꢀ.ꢀꢀ
ꢀꢁ.ꢁꢂ
ꢀꢁ.ꢂꢁ
ꢀꢁ.ꢂꢃ
ꢀꢁ.ꢂꢁ
ꢀꢁ.ꢂꢃ
ꢀꢁ.ꢁꢂ
ꢀꢁ.ꢂꢁ
ꢀꢁ.ꢂꢃ
ꢀꢁ.ꢂꢁ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢁ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢄꢈꢉꢊ ꢋꢅꢌ
ꢀꢁꢂꢃꢁꢂ ꢄꢁRRꢅꢆꢂ ꢇꢈꢉꢊ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢄꢈꢉꢊ ꢋꢅꢌ
ꢀꢁꢂꢃ ꢄꢂꢅ
ꢀꢁꢂꢃ ꢄꢂꢃ
ꢀꢁꢂꢃ ꢄꢂꢀ
Rev. D
5
For more information www.analog.com
LT8607/LT8607B
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
No-Load Supply Current
(5V Output Switching)
No Load Supply Current vs
Temperature (Not Switching)
Top MOSFET Current Limit
vs Duty Cycle
ꢀ.ꢁꢂ
ꢀ.ꢁꢂ
ꢀ.ꢁꢂ
ꢀ.ꢁꢂ
ꢀ.ꢁꢂ
ꢀ.ꢁꢂ
ꢀ.ꢀ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢀꢁ
ꢀ.ꢁꢂ
ꢀ.ꢁꢁ
ꢀ.ꢁꢂ
ꢀ.ꢁꢂ
ꢀ.ꢁꢂ
ꢀꢁꢂꢃ ꢄ ꢅꢆ ꢇR ꢈꢉꢊꢋꢅꢌ Dꢍꢂ
ꢀꢁꢂꢃ ꢄ ꢅꢆ
ꢀꢁꢂꢃꢄꢅꢆꢇ
ꢀ ꢁ ꢂ.ꢃꢄꢅ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁꢁ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢀꢁ
ꢀꢁꢂ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
Dꢀꢁꢂ ꢃꢂꢃꢄꢅ ꢆꢇꢈ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢄꢈꢉꢊ ꢋꢅꢌ
ꢀꢁꢂꢃ ꢄꢅꢆ
ꢀꢁꢂꢃ ꢄꢅꢅ
ꢀꢁꢂꢃ ꢄꢅꢂ
Top MOSFET Current Limit
vs Temperature
Switch Drop vs Temperature
Switch Drop vs Switch Current
ꢀꢁꢁ
ꢀꢁꢂ
ꢀꢁꢁ
ꢀꢁꢂ
ꢀꢁꢁ
ꢀꢁ
ꢀ.ꢁꢂ
ꢀ.ꢁꢂ
ꢀ.ꢁꢂ
ꢀ.ꢁꢁ
ꢀ.ꢁꢂ
ꢀꢁꢂ
ꢀꢁꢁ
ꢀꢁꢂ
ꢀꢁꢁ
ꢀꢁꢂ
ꢀꢁꢁ
ꢀꢁꢂ
ꢀꢁꢁ
ꢀꢁ
ꢀꢁꢂꢃꢄꢅ ꢄꢆRRꢇꢈꢃ ꢉ ꢊꢋꢌꢍꢎ
Dꢀꢁꢂ ꢃꢂꢃꢄꢅ ꢆ ꢇ
ꢀꢁꢂ ꢃꢄ
ꢅꢁꢀ ꢃꢄ
ꢀꢁꢂ ꢃꢄ
ꢅꢁꢀ ꢃꢄ
ꢀ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢁ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢀꢁ
ꢀꢁꢂ
ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢀꢁ ꢀꢁꢂ ꢀꢁꢂ
ꢀꢁꢂꢃꢄꢅ ꢄꢆRRꢇꢈꢃ ꢉꢊꢋꢌ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢃ ꢄꢅꢆ
ꢀꢁꢂꢃ ꢄꢅꢆ
ꢀꢁꢂꢃ ꢄꢅꢆ
Minimum On-Time
vs Temperature
Minimum Off-Time
vs Temperature
Dropout Voltage vs Output Current
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢀ
ꢀꢁ
ꢀꢀꢁ
ꢀꢁꢂ
ꢀꢁꢁ
ꢀꢁꢂ
ꢀꢁꢁ
ꢀꢁꢂ
ꢀꢁꢁ
ꢀꢁ
ꢀꢁ ꢂꢃꢀꢄꢅꢆꢅꢇꢄꢈꢆꢉꢊ
ꢀ
ꢀ ꢁꢂꢃꢄꢅ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀ ꢁꢂꢃꢄꢅ
ꢀꢁꢂ
ꢀꢁ
ꢀ
ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢀꢁ ꢀꢁꢂ ꢀꢁꢂ
ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢀꢁ ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢁ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢃꢁꢂ ꢄꢁRRꢅꢆꢂ ꢇꢈꢉ
ꢀꢁꢂꢃ ꢄꢅꢁ
ꢀꢁꢂꢃ ꢄꢅꢃ
ꢀꢁꢂꢃ ꢄꢅꢀ
Rev. D
6
For more information www.analog.com
LT8607/LT8607B
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Load to Full
Frequency (SYNC Float to 1.9V)
(MSOP Package) or LT8607B DFN
Switching Frequency
vs Temperature
Burst Frequency vs
Output Current
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢁ
ꢀꢁ
ꢀꢁꢂꢂ
ꢀꢀꢁꢂ
ꢀꢁꢁꢁ
ꢀꢁꢂꢃ
ꢀꢁꢂꢂ
ꢀꢁꢂꢃ
ꢀꢁꢁꢁ
ꢀꢁꢂ
ꢀꢁꢀꢂ
ꢀꢁꢀꢁ
ꢀꢁꢂꢃ
ꢀꢁꢂꢁ
ꢀꢁꢁꢂ
ꢀꢁꢁꢁ
ꢀꢁꢁꢂ
ꢀꢁꢁꢂ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃ
ꢀꢁꢂꢃ
ꢀ ꢁ ꢂ.ꢂꢃꢄ
R
= 18.2kΩ
ꢀ ꢁ ꢂ.ꢂꢃꢄ
ꢀ
ꢀ
ꢀ ꢁꢂꢃ
ꢀꢁ
ꢀ
ꢀ ꢁꢂꢃ
ꢀꢁ
ꢀ
ꢀ ꢁ.ꢁꢂ
ꢀꢁꢂ
ꢀ
ꢀ ꢁ.ꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂꢃ ꢄ ꢅꢆ ꢇR ꢈꢉꢊꢋꢅꢌ Dꢍꢂ
R
ꢀ
= 18.2kΩ
ꢀꢁ
ꢀꢁꢁ
ꢀꢁ
ꢀꢁꢂ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢄꢈꢉꢊ ꢋꢅꢌ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁꢁ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢀꢁ
ꢀꢁꢂ
ꢀꢁꢂꢃꢁꢂ ꢄꢁRRꢅꢆꢂ ꢇꢈꢉꢊ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢃ ꢄꢅꢆ
ꢀꢁꢂꢃ ꢄꢅꢆ
ꢀꢁꢂꢃ ꢄꢅꢂ
Soft-Start Current vs Temperature
(MSOP Package)
Soft-Start Tracking
(MSOP Package)
Frequency Foldback
ꢀꢁꢂꢂ
ꢀꢀꢁꢂ
ꢀꢁꢁꢁ
ꢀꢁꢂꢃ
ꢀꢁꢂꢂ
ꢀꢁꢂꢃ
ꢀꢁꢁꢁ
ꢀꢁꢂ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢀ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ.ꢁ
ꢀ
R
D
ꢀꢁꢁ
ꢀꢁꢂ
ꢀ
ꢀ.ꢀ ꢀ.ꢁ ꢀ.ꢁ ꢀ.ꢁ ꢀ.ꢁ ꢀ.ꢁ ꢀ.ꢁ ꢀ.ꢁ ꢀ.ꢁ ꢀ.ꢁ ꢀ.ꢁ
ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢀꢁ ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀ.ꢁ ꢀ.ꢁ ꢀ.ꢁ ꢀ.ꢁ ꢀ.ꢁ ꢀ.ꢁ ꢀ.ꢁ ꢀ.ꢁ ꢀ.ꢀ ꢀ.ꢁ
ꢀꢁ ꢂꢃꢄꢅꢆꢇꢈ ꢉꢂꢊ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢀ ꢁꢂꢃꢄꢅꢆꢇ ꢈꢁꢉ
ꢀꢁꢂꢃ ꢄꢅꢅ
ꢀꢁꢂꢃ ꢄꢅꢆ
ꢀꢁꢂꢃ ꢄꢅꢆ
VIN UVLO vs Temperature
Start-Up Dropout
Start-Up Dropout
ꢀ.ꢁꢂ
ꢀ.ꢁꢁ
ꢀ.ꢁꢂ
ꢀ.ꢁꢂ
ꢀ.ꢀꢁ
ꢀ.ꢁꢁ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
R
ꢀꢁꢂD
= 6.66Ω
R
ꢀꢁꢂD
= 50Ω
ꢀ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢀꢁ ꢀꢁꢂ ꢀꢁꢂ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢁꢂꢃꢁRꢄꢀꢅRꢁ ꢆꢇꢈꢉ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢄꢈꢉꢊ ꢋꢅꢌ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢄꢈꢉꢊ ꢋꢅꢌ
ꢀꢁꢂꢃ ꢄꢅꢆ
ꢀꢁꢂꢃ ꢄꢅꢁ
ꢀꢁꢂꢃ ꢄꢅꢃ
Rev. D
7
For more information www.analog.com
LT8607/LT8607B
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Switching Waveforms
(Burst Mode)
Switching Waveforms
Switching Waveforms
ꢅ
ꢆꢇꢈ
ꢅ
ꢅ
ꢇꢈꢉD
ꢇꢈꢉD
ꢀꢉꢊꢅꢃDꢄꢅ
ꢀꢁꢁꢊꢉꢄDꢅꢆ
ꢀꢁꢁꢊꢉꢄDꢅꢆ
ꢄ
ꢋꢆꢌD
ꢀꢉꢉꢊꢌꢃDꢄꢅ
ꢆ
ꢋꢌ
ꢆ
ꢋꢌ
ꢍꢁꢆꢄDꢅꢆ
ꢅ
ꢍꢎ
ꢏꢉꢅꢃDꢄꢅ
ꢍꢆꢄDꢅꢆ
ꢀꢁꢁꢂꢃꢄDꢅꢆ
ꢀꢁꢁꢂꢃꢄDꢅꢆ
ꢀꢁꢂꢃDꢄꢅ
ꢒꢀꢆ ꢔꢈ ꢍꢆ
ꢅꢓ
ꢉꢔ ꢍꢁꢁꢊꢉ
ꢓꢏꢆ ꢕꢈ ꢖꢆ
ꢅꢔ
ꢉꢕ ꢖꢁꢁꢊꢉ
ꢏꢀꢅ ꢈꢆ ꢖꢅ ꢌꢈ ꢒ.ꢖꢊꢌ
ꢆꢇꢈ
ꢈꢕꢔ
ꢈꢗꢕ
ꢄꢕ
ꢎꢏꢁꢐ ꢑꢀꢎ
ꢎꢏꢁꢐ ꢑꢀꢒ
ꢐꢑꢉꢒ ꢓꢔꢉ
ꢀꢖꢗꢘ
ꢀꢘꢙꢚ
ꢀꢀꢁꢗ ꢘ
ꢆꢇꢈ
Transient Response
Transient Response
ꢅ
ꢇꢈꢉD
ꢅ
ꢇꢈꢉD
ꢊꢁꢁꢋꢉꢄDꢅꢆ
ꢀꢁꢁꢊꢉꢄDꢅꢆ
ꢆ
ꢆ
ꢈꢌꢍ
ꢈꢋꢌ
ꢀꢁꢁꢋꢆꢄDꢅꢆ
ꢍꢁꢁꢊꢆꢄDꢅꢆ
ꢀꢁꢁꢂꢃꢄDꢅꢆ
ꢀꢁꢁꢂꢃꢄDꢅꢆ
ꢆ
ꢆ
ꢔꢍꢀꢆ
ꢆ
ꢆ
ꢔꢀꢊꢆ
ꢅꢓ
ꢈꢋꢌ
ꢅꢓ
ꢈꢌꢍ
ꢎꢏꢁꢐ ꢑꢒꢍ
ꢎꢏꢁꢐ ꢑꢒꢊ
ꢔ ꢕꢆ
ꢔ ꢕꢆ
ꢕꢁꢊꢉ ꢌꢈ ꢕꢕꢁꢊꢉ
ꢊꢕꢁꢋꢉ ꢍꢈ ꢐꢕꢁꢋꢉ
ꢔ ꢊꢊꢂꢗ
ꢖ
ꢔ ꢀꢀꢂꢗ
ꢖ
ꢈꢋꢌ
ꢈꢌꢍ
ꢘ
ꢔ ꢀꢛꢜꢝ
ꢘ
ꢔ ꢊꢛꢜꢝ
ꢙꢚ
ꢙꢚ
Radiated EMI Performance
(CISPR 25 Radiated Emission Test with Class 5 Peak Limits)
ꢗꢘ
ꢚꢗ
ꢚꢘ
ꢝꢗ
ꢝꢘ
ꢛꢗ
ꢛꢘ
ꢜꢗ
ꢜꢘ
ꢗ
ꢔꢁRꢐꢏꢅꢌꢎ ꢍꢣꢎꢌRꢏꢤꢌꢐꢏꢣꢄ
ꢍꢁꢌꢥ DꢁꢐꢁꢅꢐꢣR
ꢅꢎꢌꢦꢦ ꢗ ꢍꢁꢌꢥ ꢎꢏꢈꢏꢐ
ꢦꢍRꢁꢌD ꢦꢍꢁꢅꢐRꢃꢈ ꢈꢣDꢁ
ꢀꢏꢧꢁD ꢀRꢁꢂꢃꢁꢄꢅꢆ
ꢘ
ꢙꢗ
ꢙꢜꢘ
ꢘ
ꢜꢘꢘ
ꢛꢘꢘ
ꢝꢘꢘ
ꢚꢘꢘ
ꢗꢘꢘ
ꢟꢘꢘ
ꢠꢘꢘ
ꢞꢘꢘ
ꢢꢘꢘ
ꢜꢘꢘꢘ
ꢀRꢁꢂꢃꢁꢄꢅꢆ ꢇꢈꢉꢊꢋ
ꢞꢟꢘꢠ ꢡꢝꢝ
Dꢅꢛꢗꢟꢗꢌ Dꢁꢈꢣ ꢒꢣꢌRD
ꢨꢏꢐꢉ ꢁꢈꢏ ꢀꢏꢎꢐꢁR ꢏꢄꢦꢐꢌꢎꢎꢁD
ꢜꢚꢔ ꢏꢄꢍꢃꢐ ꢐꢣ ꢗꢔ ꢣꢃꢐꢍꢃꢐ ꢌꢐ ꢗꢘꢘꢖꢌꢩ ꢪ ꢫ ꢛꢈꢉꢊ
ꢦꢨ
Rev. D
8
For more information www.analog.com
LT8607/LT8607B
PIN FUNCTIONS
BST: This pin is used to provide a drive voltage, higher
than the input voltage, to the topside power switch. Place
a 0.1µF boost capacitor as close as possible to the IC. Do
not place a resistor in series with this pin.
TR/SS (MSOP Only): Output Tracking and Soft-Start Pin.
This pin allows user control of output voltage ramp rate
during start-up. A TR/SS voltage below 0.778V forces the
LT8607 to regulate the FB pin to equal the TR/SS pin volt-
age. The LT8607-5 will track the TR/SS pin voltage based
on a factor set by the internal resistor divider. The part
will track to 6.43 times the TR/SS voltage. When TR/SS
is above 0.778V, the tracking function is disabled and the
internal reference resumes control of the error amplifier.
SW: The SW pin is the output of the internal power
switches. Connect this pin to the inductor and boost
capacitor. This node should be kept small on the PCB for
good performance.
INTV : Internal 3.5V Regulator Bypass Pin. The internal
An internal 2µA pull-up current from INTV on this pin
CC
CC
power drivers and control circuits are powered from this
voltage. INTV max output current is 20mA. Voltage on
INTVCC will vCaCry between 2.8V and 3.5V. Decouple this
pin to power ground with at least a 1µF low ESR ceramic
capacitor. Do not load the INTVCC pin with external circuitry.
allows a capacitor to program output voltage slew rate.
This pin is pulled to ground with a 300Ω MOSFET dur-
ing shutdown and fault conditions; use a series resistor
if driving from a low impedance output. There is no TR/
SS pin on the LT8607 or LT8607B DFN and the node is
internally floated.
RT: A resistor is tied between RT and ground to set the
switching frequency. When synchronizing, the RT resistor
should be chosen to set the LT8607 switching frequency
to equal or below the lowest synchronization input.
PG: The PG pin is the open-drain output of an internal
comparator. PG remains low until the FB pin is within
8.5% of the final regulation voltage, and there are no
fault conditions. PG is valid when V is above 3.2V and
IN
SYNC (MSOP Only): External Clock Synchronization
Input. Ground this pin for low ripple Burst Mode operation
at low output loads. Tie to a clock source for synchroni-
zation to an external frequency. Leave floating for pulse-
skipping mode with no spread spectrum modulation. Tie
when EN/UV is high. PG is pulled low when V is above
IN
3.2V and EN/UV is low. If V is near zero, PG will be high
IN
impedance.
V : The V pin supplies current to the LT8607 internal
IN
IN
to INTV or tie to a voltage between 3.2V and 5.0V for
circuitry and to the internal topside power switch. This pin
must be locally bypassed. Be sure to place the positive
terminal of the input capacitor as close as possible to the
CC
pulse-skipping mode with spread spectrum modulation.
When in pulse-skipping mode, the I regulating no load
will increase to several mA. ThereQis no SYNC pin on
the LT8607 DFN package. The LT8607 DFN internally
ties SYNC to ground. The LT8607B package internally
floats SYNC.
V pins, and the negative capacitor terminal as close as
IN
possible to the GND pins.
EN/UV: The LT8607 is shut down when this pin is low and
active when this pin is high. The hysteretic threshold volt-
FB (LT8607/LT8607B Only): The LT8607 regulates the
FB pin to 0.778V. Connect the feedback resistor divider
tap to this pin.
age is 1.05V going up and 1.00V going down. Tie to V
IN
if the shutdown feature is not used. An external resistor
divider from V can be used to program a V threshold
IN
IN
below which the LT8607 will shut down.
V
(LT8607-5 Only): The LT8607-5 regulates the V
OUT
OUT
pin to 5V. This pin connects to a 6.6MΩ internal divider.
GND: Exposed Pad Pin. The exposed pad must be con-
nected to the negative terminal of the input capaci-
tor and soldered to the PCB in order to lower the
thermal resistance.
Rev. D
9
For more information www.analog.com
LT8607/LT8607B
BLOCK DIAGRAM
ꢐ
ꢉꢊ
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ꢉꢊ
ꢇ
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R
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ꢋꢂD
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Rꢛ
ꢐ
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ꢐ
ꢄꢗꢋ
Rꢒ
ꢃꢋꢏꢜꢍꢎꢞꢙ
ꢄꢊꢃꢠ
ꢋRꢡꢂꢂ
ꢢꢈꢂꢄꢅ
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ꢂꢠꢊꢇ
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Rꢋ
ꢏꢜꢍꢎ ꢖD
ꢇ
ꢂꢂ
R
ꢋ
ꢄꢅꢋ
Rev. D
10
For more information www.analog.com
LT8607/LT8607B
OPERATION
The LT8607 is a monolithic constant frequency current
mode step-down DC/DC converter. An oscillator with
frequency set using a resistor on the RT pin turns on
the internal top power switch at the beginning of each
clock cycle. Current in the inductor then increases until
the top switch current comparator trips and turns off the
top power switch. The peak inductor current at which the
top switch turns off is controlled by the voltage on the
internal VC node. The error amplifier servos the VC node
1.7µA. In a typical application, 3.0µA will be consumed
from the input supply when regulating with no load. The
SYNC pin is tied low to use Burst Mode operation and can
be floated to use pulse-skipping mode. If a clock is applied
to the SYNC pin the part will synchronize to an external
clock frequency and operate in pulse-skipping mode. While
in pulse-skipping mode the oscillator operates continu-
ously and positive SW transitions are aligned to the clock.
During light loads, switch pulses are skipped to regulate
the output and the quiescent current will be several mA.
The SYNC pin may be tied high for spread spectrum modu-
lation mode, and the LT8607 will operate similar to pulse-
skipping mode but vary the clock frequency to reduce EMI.
The LT8607 DFN has no SYNC pin and will always operate
in Burst Mode operation. The LT8607B has no SYNC pin
and will operate in pulse-skipping mode.
by comparing the voltage on the V pin with an internal
FB
0.778V reference. The LT8607-5 fixed output part uses
the V
pin and an internal resistor divider to generate
OUT
an internal FB node. When the load current increases, it
causes a reduction in the feedback voltage relative to the
reference leading the error amplifier to raise the VC volt-
age until the average inductor current matches the new
load current. When the top power switch turns off the
synchronous power switch turns on until the next clock
cycle begins or inductor current falls to zero. If overload
conditions result in excess current flowing through the
bottom switch, the next clock cycle will be delayed until
switch current returns to a safe level.
Comparators monitoring the FB pin voltage will pull the PG
pin low if the output voltage varies more than 8.5% (typi
-
cal) from the set point, or if a fault condition is present.
In Burst Mode operation, the oscillator reduces the
LT8607's operating frequency when the voltage at the
FB pin is low, or the voltage at the V
pin is low on the
LT8607-5 fixed output option. ThisOfUrTequency foldback
helps to control the inductor current when the output volt-
age is lower than the programmed value which occurs
during start-up.
If the EN/UV pin is low, the LT8607 is shut down and
draws 1µA from the input. When the EN/UV pin is above
1.05V, the switching regulator becomes active.
To optimize efficiency at light loads, the LT8607 enters
Burst Mode operation during light load situations. Between
bursts, all circuitry associated with controlling the output
switch is shut down, reducing the input supply current to
Rev. D
11
For more information www.analog.com
LT8607/LT8607B
APPLICATIONS INFORMATION
Achieving Ultralow Quiescent Current
LT8607 DFN is programmed for Burst Mode operation
and cannot enter pulse-skipping mode. The LT8607B DFN
is programmed for pulse-skipping mode and cannot enter
Burst Mode operation.
To enhance efficiency at light loads, the LT8607 enters
into low ripple Burst Mode operation, which keeps the
output capacitor charged to the desired output voltage
while minimizing the input quiescent current and mini-
mizing output voltage ripple. In Burst Mode operation the
LT8607 delivers single small pulses of current to the out-
put capacitor followed by sleep periods where the output
power is supplied by the output capacitor. While in sleep
mode the LT8607 consumes 1.7µA.
ꢀꢁꢂꢂ
ꢀ ꢁ ꢂ.ꢂꢃꢄ
ꢀꢀꢁꢂ
ꢀꢁꢁꢁ
ꢀꢁꢂꢃ
ꢀꢁꢂꢂ
ꢀꢁꢂꢃ
ꢀꢁꢁꢁ
ꢀꢁꢂ
ꢀ
ꢀ
ꢀ ꢁꢂꢃ
ꢀꢁ
ꢀ ꢁ.ꢁꢂ
ꢀꢁꢂ
ꢀꢁꢂꢃ ꢄ ꢅꢆ ꢇR ꢈꢉꢊꢋꢅꢌ Dꢍꢂ
As the output load decreases, the frequency of single cur-
rent pulses decreases (see Figure 1) and the percentage
of time the LT8607 is in sleep mode increases, result-
ing in much higher light load efficiency than for typical
converters. By maximizing the time between pulses, the
converter quiescent current approaches 3.0µA for a typi-
cal application when there is no output load. Therefore,
to optimize the quiescent current performance at light
loads, the current in the feedback resistor divider must
be minimized as it appears to the output as load current.
ꢀꢁꢁ
ꢀꢁꢂ
ꢀ
ꢀ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁꢁ
ꢀꢁꢂ
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ꢀꢁꢂꢃ ꢄꢂꢅ
Figure 1. Burst Frequency vs Output Current
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ꢀ ꢁꢂꢃ
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ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀ
ꢀ ꢁ.ꢁꢂ
ꢀꢁꢂ
= 18.2kΩ
While in Burst Mode operation the current limit of the
top switch is approximately 250mA resulting in output
voltage ripple shown in Figure 3. Increasing the output
capacitance will decrease the output ripple proportionally.
As load ramps upward from zero the switching frequency
will increase but only up to the switching frequency
programmed by the resistor at the RT pin as shown in
Table 1. The output load at which the LT8607 reaches the
programmed frequency varies based on input voltage,
output voltage, and inductor choice.
ꢀ
ꢀ
ꢀ
ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁ
ꢀꢁꢂꢃꢄ ꢅꢆꢇꢄꢈꢉꢊ ꢋꢅꢌ
ꢀꢁꢂꢃ ꢄꢂꢅ
Figure 2. Minimum Load to Full Frequency
(SYNC Float to 1.9V) (MSOP or LT8607B DFN)
For some applications it is desirable for the LT8607 to
operate in pulse-skipping mode, offering two major differ-
ences from Burst Mode operation. First is the clock stays
awake at all times and all switching cycles are aligned to
the clock. In this mode much of the internal circuitry is
awake at all times, increasing quiescent current to several
hundred µA. Second is that full switching frequency is
reached at lower output load than in Burst Mode opera-
tion as shown in Figure 2. To enable pulse-skipping mode
the SYNC pin is floated. To achieve spread spectrum
modulation with pulse-skipping mode, the SYNC pin is
tied high. While a clock is applied to the SYNC pin the
LT8607 will also operate in pulse-skipping mode. The
ꢅ
ꢆꢇꢈ
ꢀꢉꢊꢅꢃDꢄꢅ
ꢄ
ꢋꢆꢌD
ꢀꢉꢉꢊꢌꢃDꢄꢅ
ꢅ
ꢍꢎ
ꢏꢉꢅꢃDꢄꢅ
ꢀꢁꢂꢃDꢄꢅ
ꢐꢑꢉꢒ ꢓꢉꢔ
Figure 3. Burst Mode Operation
Rev. D
12
For more information www.analog.com
LT8607/LT8607B
APPLICATIONS INFORMATION
FB Resistor Network
Operating Frequency Selection and Trade-Offs
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the resistor
values according to:
Selection of the operating frequency is a trade-off between
efficiency, component size, and input voltage range. The
advantage of high frequency operation is that smaller
inductor and capacitor values may be used. The disadvan-
tages are lower efficiency and a smaller input voltage range.
VOUT
0.778V
⎛
⎞
⎠
R1=R2
–1
⎟
⎜
⎝
The highest switching frequency (f
) for a given
SW(MAX)
1% resistors are recommended to maintain output volt-
age accuracy.
application can be calculated as follows:
V
+ V
OUT
SW(BOT)
The total resistance of the FB resistor divider should be
selected to be as large as possible when good low load
efficiency is desired: The resistor divider generates a
small load on the output, which should be minimized to
optimize the quiescent current at low loads.
f
=
SW(MAX)
t
V – V
+ V
IN
ON(MIN)
SW(TOP) SW(BOT)
where V is the typical input voltage, V
is the output
OUT
voltage,INV
and V
are the internal switch
SW(TOP)
SW(BOT)
drops (~0.25V, ~0.125V, respectively at max load) and
tON(MIN) is the minimum top switch on-time (see Electrical
Characteristics). This equation shows that slower switch-
When using large FB resistors, a 10pF phase lead capaci-
tor should be connected from V
to FB. The LT8607-5
OUT
regulates to 5V and has a total of 6.6MΩ of internal feed-
ing frequency is necessary to accommodate a high V /
IN
back divider resistance from the V
pin to ground.
OUT
V
ratio.
OUT
Setting the Switching Frequency
For transient operation V may go as high as the Abs Max
rating regardless of theINR value, however the LT8607
The LT8607 uses a constant frequency PWM architecture that
can be programmed to switch from 200kHz to 2.2MHz by
using a resistor tied from the RT pin to ground. A table show-
T
will reduce switching frequency as necessary to maintain
control of inductor current to assure safe operation.
ing the necessary R value for a desired switching frequency
T
The LT8607 is capable of maximum duty cycle approach-
is in Table 1. When in spread spectrum modulation mode, the
ing 100%, and the V to V
DS(ON)
dropout is limited by the
IN
OUT
frequency is modulated upwards of the frequency set by R .
T
R
of the top switch. In this mode the LT8607 skips
switch cycles, resulting in a lower switching frequency
Table 1. SW Frequency vs RT Value
than programmed by R .
T
f
SW
(MHz)
R (kΩ)
T
0.2
221
143
For applications that cannot allow deviation from the pro-
0.300
0.400
0.500
0.600
0.700
0.800
0.900
1.000
1.200
1.400
1.600
1.800
2.000
2.200
grammed switching frequency at low V /V
ratios use
IN OUT
110
the following formula to set switching frequency:
86.6
71.5
60.4
52.3
46.4
40.2
33.2
27.4
23.7
20.5
18.2
16.2
V
+ V
OUT
SW(BOT)
V
=
– V
+ V
IN(MIN)
SW(BOT) SW(TOP)
1– f • t
SW OFF(MIN)
where VIN(MIN) is the minimum input voltage without
skipped cycles, V is the output voltage, V and
OUT
SW(TOP)
V
are the internal switch drops (~0.25V, ~0.125V,
SW(BOT)
respectively at max load), f is the switching frequency
(set by RT), and tOFF(MIN)SiWs the minimum switch off-
time. Note that higher switching frequency will increase
the minimum input voltage below which cycles will be
dropped to achieve higher duty cycle.
Rev. D
13
For more information www.analog.com
LT8607/LT8607B
APPLICATIONS INFORMATION
Inductor Selection and Maximum Output Current
The peak-to-peak ripple current in the inductor can be
calculated as follows:
The LT8607 is designed to minimize solution size by
allowing the inductor to be chosen based on the output
load requirements of the application. During overload or
⎛
⎞
VOUT
VOUT
ΔIL =
1–
⎜
⎟
L•fSW
V
IN(MAX)
⎝
⎠
short circuit conditions the LT8607 safely tolerates opera
-
tion with a saturated inductor through the use of a high
speed peak-current mode architecture.
where f is the switching frequency of the LT8607, and
SW
L is the value of the inductor. Therefore, the maximum
output current that the LT8607 will deliver depends on
the switch current limit, the inductor value, and the input
and output voltages. The inductor value may have to be
increased if the inductor ripple current does not allow
A good first choice for the inductor value is:
V
+ V
SW(BOT)
OUT
L =
•2
f
SW
sufficient maximum output current (I
) given the
OUT(MAX)
where fSW is the switching frequency in MHz, VOUT is
switching frequency, and maximum input voltage used in
the desired application.
the output voltage, V
is the bottom switch drop
SW(BOT)
(~0.125V) and L is the inductor value in µH.
The optimum inductor for a given application may differ
from the one indicated by this design guide. A larger value
inductor provides a higher maximum load current and
reduces the output voltage ripple. For applications requir-
ing smaller load currents, the value of the inductor may
be lower and the LT8607 may operate with higher ripple
current. This allows use of a physically smaller inductor,
or one with a lower DCR resulting in higher efficiency. Be
aware that low inductance may result in discontinuous
mode operation, which further reduces maximum load
current.
To avoid overheating and poor efficiency, an inductor
must be chosen with an RMS current rating that is greater
than the maximum expected output load of the applica-
tion. In addition, the saturation current (typically labeled
I
) rating of the inductor must be higher than the load
SAT
current plus 1/2 of in inductor ripple current:
1
2
I
L(PEAK) =ILOAD(MAX) + ΔL
where ∆IL is the inductor ripple current as calculated sev-
eral paragraphs below and ILOAD(MAX) is the maximum
output load for a given application.
For more information about maximum output current and
discontinuous operation, see Analog Devices Application
Note 44.
As a quick example, an application requiring 0.25A output
should use an inductor with an RMS rating of greater
than 0.5A and an I
of greater than 0.7A. To keep the
SAT
Finally, for duty cycles greater than 50% (V /V > 0.5),
OUT IN
efficiency high, the series resistance (DCR) should be less
than 0.04Ω, and the core material should be intended for
high frequency applications.
a minimum inductance is required to avoid sub-harmonic
oscillation. See Analog Devices Application Note 19.
Input Capacitor
The LT8607 limits the peak switch current in order to
protect the switches and the system from overload faults.
Bypass the input of the LT8607 circuit with a ceramic
capacitor of X7R or X5R type. Y5V types have poor per-
formance over temperature and applied voltage, and
should not be used. A 4.7µF to 10µF ceramic capacitor
is adequate to bypass the LT8607 and will easily handle
the ripple current. Note that larger input capacitance is
required when a lower switching frequency is used. If
the input power source has high impedance, or there is
The top switch current limit (I ) is at least 1.2A at low
LIM
duty cycles and decreases linearly to at least 0.9A at D =
0.8. The inductor value must then be sufficient to supply
the desired maximum output current (I
), which
is a function of the switch current limOitUT(I(LMIMAX)) and the
ripple current:
ΔIL
2
IOUT(MAX) =ILIM
–
Rev. D
14
For more information www.analog.com
LT8607/LT8607B
APPLICATIONS INFORMATION
significant inductance due to long wires or cables, addi-
tional bulk capacitance may be necessary. This can be
provided with a low performance electrolytic capacitor.
cause loop instability. See the Typical Applications in this
data sheet for suggested capacitor values.
When choosing a capacitor, special attention should be
given to the data sheet to calculate the effective capaci-
tance under the relevant operating conditions of voltage
bias and temperature. A physically larger capacitor or one
with a higher voltage rating may be required.
Step-down regulators draw current from the input sup-
ply in pulses with very fast rise and fall times. The input
capacitor is required to reduce the resulting voltage rip-
ple at the LT8607 and to force this very high frequency
switching current into a tight local loop, minimizing EMI.
A 4.7µF capacitor is capable of this task, but only if it is
placed close to the LT8607 (see the PCB Layout section).
A second precaution regarding the ceramic input capaci-
tor concerns the maximum input voltage rating of the
LT8607. A ceramic input capacitor combined with trace
or cable inductance forms a high quality (under damped)
tank circuit. If the LT8607 circuit is plugged into a live
supply, the input voltage can ring to twice its nominal
value, possibly exceeding the LT8607’s voltage rating.
This situation is easily avoided (see Analog Devices
Application Note 88).
Ceramic Capacitors
Ceramic capacitors are small, robust and have very low
ESR. However, ceramic capacitors can cause problems
when used with the LT8607 due to their piezoelectric
nature. When in Burst Mode operation, the LT8607’s
switching frequency depends on the load current, and at
very light loads theLT8607 can excite the ceramic capacitor
at audio frequencies, generating audible noise. Since the
LT8607 operates at a lower current limit during Burst Mode
operation, the noise is typically very quiet to a casual ear.
If this is unacceptable, use a high performance tantalum
or electrolytic capacitor at the output.
Output Capacitor and Output Ripple
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LT8607. As pre-
viously mentioned, a ceramic input capacitor combined
with trace or cable inductance forms a high quality (under
damped) tank circuit. If the LT8607 circuit is plugged into
a live supply, the input voltage can ring to twice its nomi-
nal value, possibly exceeding the LT8607’s rating. This
situation is easily avoided (see Analog Devices Application
Note 88).
The output capacitor has two essential functions. Along
with the inductor, it filters the square wave generated
by the LT8607 to produce the DC output. In this role it
determines the output ripple, thus low impedance at the
switching frequency is important. The second function is
to store energy in order to satisfy transient loads and sta-
bilize the LT8607’s control loop. Ceramic capacitors have
very low equivalent series resistance (ESR) and provide
the best ripple performance. A good starting value is:
Enable Pin
100
C
=
OUT
V
• f
The LT8607 is in shutdown when the EN pin is low and
active when the pin is high. The rising threshold of the EN
comparator is 1.05V, with 50mV of hysteresis. The EN pin
can be tied to V if the shutdown feature is not used, or
tied to a logic level if shutdown control is required.
OUT SW
where fSW is in MHz, and COUT is the recommended output
capacitance in µF. Use X5R or X7R types. This choice will
provide low output ripple and good transient response.
Transient performance can be improved with a higher value
output capacitor and the addition of a feedforward capaci-
IN
Adding a resistor divider from V to EN programs the
LT8607 to regulate the output oInNly when V is above
a desired voltage (see Block Diagram). Typically, this
threshold, V
IN
tor placed between V
and FB. Increasing the output
OUT
capacitance will also decrease the output voltage ripple. A
lower value of output capacitor can be used to save space
and cost but transient performance will suffer and may
, is used in situations where the input
IN(EN)
Rev. D
15
For more information www.analog.com
LT8607/LT8607B
APPLICATIONS INFORMATION
supply is current limited, or has a relatively high source
resistance. A switching regulator draws constant power
from the source, so source current increases as source
voltage drops. This looks like a negative resistance load
to the source and can cause the source to current limit or
can be externally driven by another voltage source. From
0V to 0.778V, the TR/SS voltage will override the internal
0.778V reference input to the error amplifier, thus regulat
-
ing the FB pin voltage to that of TR/SS pin.
In the LT8607-5 fixed output option, the output voltage
will track the TR/SS pin to 6.43 times the TR/SS voltage,
a voltage based on a factor set by the internal feedback
resistor divider. When TR/SS is above 0.778V, tracking
is disabled and the feedback voltage will regulate to the
internal reference voltage.
latch low under low source voltage conditions. The V
IN(EN)
threshold prevents the regulator from operating at source
voltages where the problems might occur. This threshold
can be adjusted by setting the values R3 and R4 such that
they satisfy the following equation:
R3
R4
⎛
⎞
⎠
An active pull-down circuit is connected to the TR/SS pin
which will discharge the external soft-start capacitor in
the case of fault conditions and restart the ramp when the
faults are cleared. Fault conditions that clear the soft-start
V
=
+1 •1V
⎟
⎜
⎝
IN(EN)
where the LT8607 will remain off until VIN is above VIN(EN)
Due to the comparator’s hysteresis, switching will not
stop until the input falls slightly below V
.
capacitor are the EN/UV pin transitioning low, V volt-
IN
.
IN(EN)
age falling too low, or thermal shutdown. The LT8607 and
LT8607B DFN does not have the TR/SS pin or functionality.
When in Burst Mode operation for light-load currents,
the current through the V resistor network can eas-
ily be greater than the supply current consumed by the
LT8607. Therefore, the V resistors should be large
to minimize their effect on efficiency at low loads.
IN(EN)
Output Power Good
IN(EN)
When the LT8607’s output voltage is within the 8.5%
window of the regulation point, which is a V voltage in
FB
the range of 0.716V to 0.849V (typical), the output voltage
is considered good and the open-drain PG pin goes high
impedance and is typically pulled high with an external
resistor. Otherwise, the internal drain pull-down device
will pull the PG pin low. To prevent glitching both the
upper and lower thresholds include 0.5% of hysteresis.
INTV Regulator
CC
An internal low dropout (LDO) regulator produces the
3.5V supply from VIN that powers the drivers and the
internal bias circuitry. The INTVCC can supply enough cur-
rent for the LT8607’s circuitry and must be bypassed to
ground with a minimum of 1µF ceramic capacitor. Good
bypassing is necessary to supply the high transient
currents required by the power MOSFET gate drivers.
Applications with high input voltage and high switching
frequency will increase die temperature because of the
higher power dissipation across the LDO. Do not connect
The PG pin is also actively pulled low during several fault
conditions: EN/UV pin is below 1V, INTV has fallen too
CC
low, V is too low, or thermal shutdown.
IN
Synchronization (MSOP Only)
To select low ripple Burst Mode operation, tie the SYNC pin
below 0.4V (this can be ground or a logic low output). To
synchronize the LT8607 oscillator to an external frequency
connect a square wave (with 20% to 80% duty cycle) to the
SYNC pin. The square wave amplitude should have valleys
that are below 0.9V and peaks above 2.7V (up to 5V).
an external load to the INTV pin.
CC
Output Voltage Tracking and Soft-Start (MSOP Only)
The LT8607 allows the user to program its output voltage
ramp rate by means of the TR/SS pin. An internal 2µA
pulls up the TR/SS pin to INTVCC. Putting an external
capacitor on TR/SS enables soft-starting the output to
prevent current surge on the input supply. During the soft-
start ramp the output voltage will proportionally track the
TR/SS pin voltage. For output tracking applications, TR/SS
The LT8607 will not enter Burst Mode operation at low
output loads while synchronized to an external clock, but
instead will pulse skip to maintain regulation. The LT8607
may be synchronized over a 200kHz to 2.2MHz range. The
Rev. D
16
For more information www.analog.com
LT8607/LT8607B
APPLICATIONS INFORMATION
R resistor should be chosen to set the LT8607 switch-
inTg frequency equal to or below the lowest synchroni-
zation input. For example, if the synchronization signal
brownout conditions. The first is the switching frequency
will be folded back while the output is lower than the set
point to maintain inductor current control. Second, the
bottom switch current is monitored such that if inductor
current is beyond safe levels switching of the top switch
will be delayed until such time as the inductor current
falls to safe levels. This allows for tailoring the LT8607
to individual applications and limiting thermal dissipation
during short circuit conditions.
will be 500kHz and higher, the R should be selected for
T
500kHz. The slope compensation is set by the R value,
T
while the minimum slope compensation required to avoid
subharmonic oscillations is established by the inductor
size, input voltage, and output voltage. Since the syn-
chronization frequency will not change the slopes of the
inductor current waveform, if the inductor is large enough
to avoid subharmonic oscillations at the frequency set by
Frequency foldback behavior depends on the state of the
SYNC pin: If the SYNC pin is low the switching frequency
will slow while the output voltage is lower than the pro-
grammed level. If the SYNC pin is connected to a clock
source, tied high or floated, the LT8607 will stay at the
programmed frequency without foldback and only slow
switching if the inductor current exceeds safe levels.
R , then the slope compensation will be sufficient for all
T
synchronization frequencies.
For some applications it is desirable for the LT8607 to
operate in pulse-skipping mode, offering two major differ-
ences from Burst Mode operation. First is the clock stays
awake at all times and all switching cycles are aligned
to the clock. Second is that full switching frequency is
reached at lower output load than in Burst Mode operation
as shown in Figure 2 in an earlier section. These two differ-
ences come at the expense of increased quiescent current.
To enable pulse-skipping mode the SYNC pin is floated.
There is another situation to consider in systems where
the output will be held high when the input to the LT8607
is absent. This may occur in battery charging applications
or in battery backup systems where a battery or some
other supply is diode ORed with the LT8607’s output.
If the V pin is allowed to float and the EN pin is held
IN
For some applications, reduced EMI operation may be
desirable, which can be achieved through spread spec-
trum modulation. This mode operates similar to pulse
skipping mode operation, with the key difference that the
switching frequency is modulated up and down by a 3kHz
high (either by a logic signal or because it is tied to V ),
IN
then the LT8607’s internal circuitry will pull its quiescent
current through its SW pin. This is acceptable if the sys-
tem can tolerate several µA in this state. If the EN pin is
grounded the SW pin current will drop to near 0.7µA.
However, if the VIN pin is grounded while the output is
held high, regardless of EN, parasitic body diodes inside
the LT8607 can pull current from the output through the
triangle wave. The modulation has the frequency set by R
T
as the low frequency, and modulates up to approximately
20% higher than the frequency set by RT. To enable spread
spectrum mode, tie SYNC to INTV or drive to a voltage
SW pin and the V pin. Figure 4 shows a connection of
CC
IN
between 3.2V and 5V.
the V and EN/UV pins that will allow the LT8607 to run
IN
only when the input voltage is present and that protects
The LT8607 does not operate in forced continuous mode
regardless of SYNC signal. The LT8607 DFN is always
programmed for Burst Mode operation and cannot
enter pulse-skipping mode. The LT8607B DFN is pro-
grammed for pulse-skipping mode and cannot enter Burst
Mode operation.
against a shorted or reversed input.
Dꢊ
ꢀ
ꢁꢂ
ꢀ
ꢁꢂ
ꢃꢄꢅꢆꢇꢈ
ꢍꢂꢎꢏꢀ
ꢉꢂD
ꢅꢆꢇꢈ ꢋꢇꢌ
Shorted and Reversed Input Protection
The LT8607 will tolerate a shorted output. Several features
are used for protection during output short-circuit and
Figure 4. Reverse VIN Protection
Rev. D
17
For more information www.analog.com
LT8607/LT8607B
APPLICATIONS INFORMATION
PCB Layout
the ground plane as much as possible, and add thermal
vias under and near the LT8607 to additional ground
planes within the circuit board and on the bottom side.
For proper operation and minimum EMI, care must be
taken during printed circuit board layout. Note that large,
switched currents flow in the LT8607’s V pins, GND
IN
Thermal Considerations
pins, and the input capacitor (C ). The loop formed by
IN
For higher ambient temperatures, care should be taken in
the layout of the PCB to ensure good heat sinking of the
LT8607. Figure 5 shows the recommended component
placement with trace, ground plane and via locations.
The exposed pad on the bottom of the package must be
soldered to a ground plane. This ground should be tied
to large copper layers below with thermal vias; these lay-
ers will spread heat dissipated by the LT8607. Placing
additional vias can reduce thermal resistance further. The
maximum load current should be derated as the ambient
temperature approaches the maximum junction rating.
Power dissipation within the LT8607 can be estimated
by calculating the total power loss from an efficiency
measurement and subtracting the inductor loss. The
die temperature is calculated by multiplying the LT8607
power dissipation by the thermal resistance from junction
to ambient. The LT8607 will stop switching and indicate
a fault condition if safe junction temperature is exceeded.
the input capacitor should be as small as possible by
placing the capacitor adjacent to the V and GND pins.
IN
When using a physically large input capacitor the result-
ing loop may become too large in which case using a
small case/value capacitor placed close to the V and
GND pins plus a larger capacitor further away iIsN pre-
ferred. These components, along with the inductor and
output capacitor, should be placed on the same side of
the circuit board, and their connections should be made
on that layer. Place a local, unbroken ground plane under
the application circuit on the layer closest to the surface
layer. The SW and BOOST nodes should be as small as
possible. Finally, keep the FB and RT nodes small so
that the ground traces will shield them from the SW and
BOOST nodes. The exposed pad on the bottom of the
package must be soldered to ground so that the pad is
connected to ground electrically and also acts as a heat
sink thermally. To keep thermal resistance low, extend
ꢆRꢋꢌꢇD ꢕꢒꢊꢇꢎ ꢋꢇ ꢒꢊꢖꢎR ꢗ
ꢓ
ꢋꢌꢍ
ꢒ
ꢓ
ꢓ
ꢉꢇ
ꢔꢑꢍ
ꢚ
ꢓ
ꢈꢓꢓ
ꢓ
ꢘꢋꢕꢍꢙ
ꢉꢇ
R
ꢍ
R
ꢕꢆ
Rꢛ
Rꢜ
ꢑꢑ
Rꢚ
ꢓ
ꢄꢄ
Rꢗ
ꢓ
ꢀꢁꢂꢃ ꢄꢂꢅ
ꢆꢇD ꢈꢉꢊ
ꢈ
ꢉꢇ
ꢈꢉꢊ
ꢈ
ꢋꢌꢍ
ꢈꢉꢊ
ꢎꢇꢏꢌꢈ ꢈꢉꢊ
ꢋꢍꢐꢎR ꢑꢉꢆꢇꢊꢒ ꢈꢉꢊ
Figure 5. PCB Layout
Rev. D
18
For more information www.analog.com
LT8607/LT8607B
TYPICAL APPLICATIONS
5V, 2MHz Step-Down
ꢀ
ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀꢁ
ꢀ.ꢁꢂ ꢃꢄ ꢅꢆꢂ
ꢀꢁ
ꢀꢁ
ꢂ.ꢃꢄꢅ
ꢀꢁ
ꢂ.ꢁꢃꢄ
ꢀꢁꢂꢃꢄ
ꢂ.ꢃꢄꢅ
ꢆꢃR
ꢇꢁꢈꢉ
ꢀ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁꢂꢃ
ꢀꢁ
ꢀꢁꢂꢃꢄ
Rꢀ
ꢁꢂꢂꢃ
ꢀꢁꢂꢃꢄꢅ
ꢀꢁꢂꢃR
ꢀꢁꢁD
ꢀꢁ
ꢀꢁ
ꢂꢃꢄꢅ
ꢀꢁꢂꢃ
ꢀꢀ
ꢀꢁ
ꢂꢃꢄ
ꢀRꢁꢂꢂ
ꢀꢁ
Rꢀ
R2
1MΩ
ꢀꢁ
ꢀꢁ
ꢂꢃꢄꢅ
ꢀꢁD
ꢂꢂꢃꢄ
ꢅꢆR
Rꢀ
ꢁꢂꢃꢄ
Rꢀ
ꢀꢁ.ꢂꢃ
ꢀꢁꢂꢃ ꢄꢅꢂꢆ
ꢇꢂꢈꢉ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀꢁꢂ ꢃꢄꢀꢅꢆꢇꢆꢈꢅꢉꢇꢊꢋ
3.3V, 2MHz Step-Down
ꢀ
ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀꢁ
ꢀ.ꢁꢂ ꢃꢄ ꢅꢆꢂ
ꢀꢁ
ꢀꢁ
ꢂ.ꢂꢃꢄ
ꢀꢁ
ꢂ.ꢁꢃꢄ
ꢀꢁꢂꢃꢄ
ꢂ.ꢃꢄꢅ
ꢆꢃR
ꢀ
ꢀꢁꢂ
ꢀꢁꢂꢃ
ꢀꢁ
ꢀ.ꢀꢁ
ꢇꢁꢈꢉ
Rꢀ
ꢀꢁꢂꢃꢄ
ꢀꢁꢂꢃꢄꢅ
ꢁꢂꢂꢃ
ꢀꢁꢂꢃR
ꢀꢁꢁD
ꢀꢁ
ꢀꢁ
ꢂꢃꢄꢅ
ꢀꢁꢂꢃ
ꢀꢀ
ꢀꢁ
ꢂꢃꢄ
ꢀRꢁꢂꢂ
ꢀꢁ
Rꢀ
R2
1MΩ
ꢀꢁ
ꢀꢁ
ꢂꢃꢄꢅ
ꢀꢁD
Rꢀ
ꢀꢁꢂꢃ
ꢂꢂꢃꢄ
ꢅꢆR
Rꢀ
ꢀꢁ.ꢂꢃ
ꢀꢁꢂꢃ ꢄꢅꢂꢆ
ꢇꢂꢈꢉ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀꢁꢂ ꢃꢄꢀꢅꢆꢁꢇꢈꢇꢇꢇꢉꢊ
12V, 1MHz Step-Down
ꢀ
ꢀꢁ
ꢀ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ.ꢂꢃ ꢄꢅ ꢆꢁꢃ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢂ.ꢃꢄꢅ
ꢆꢃR
ꢂ.ꢁꢃꢄ ꢂꢂꢃꢄ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂꢃ
ꢀꢁꢂ
ꢇꢁꢈꢉ
Rꢀ
ꢁꢂꢂꢃ
ꢀꢁꢂꢃꢄ
ꢀꢁꢂꢃꢄꢅ
ꢀꢁꢂꢃR
ꢀꢁꢁD
ꢀꢁ
ꢀꢁꢂꢃ
ꢀꢀ
ꢂꢃꢄꢅ
ꢀꢁ
ꢂꢃꢄ
ꢀRꢁꢂꢂ
ꢀꢁ
Rꢀ
R2
1MΩ
ꢀꢁ
ꢀꢁ
ꢂꢃꢄꢅ
ꢀꢁD
Rꢀ
ꢁꢂ.ꢃꢄ
ꢂꢂꢃꢄ
ꢅꢆR
Rꢀ
ꢁꢂ.ꢃꢄ
ꢀꢁꢂꢃ ꢄꢅꢂꢆ
ꢇꢂꢈꢉ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀꢁꢂ ꢃꢄꢄꢅꢁꢆꢇꢈꢇꢇꢆꢃꢀ
Rev. D
19
For more information www.analog.com
LT8607/LT8607B
TYPICAL APPLICATIONS
1.8V, 2MHz Step-Down
ꢀ
ꢀꢁ
ꢀ.ꢁꢂ ꢃꢄ ꢁꢅꢂ
ꢀ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢂ.ꢂꢃꢄ
ꢀꢁ
ꢂ.ꢁꢃꢄ
ꢆꢇꢁꢂ ꢃRꢈꢉꢊꢋꢌꢉꢃꢍ
ꢀꢁ
ꢂ.ꢃꢄꢅ
ꢀꢁꢂꢃꢄ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂꢃ
ꢀ.ꢁꢂ
ꢀꢁꢂꢃꢄ
Rꢀ
ꢀꢁꢂꢃꢄꢅ
ꢁꢂꢂꢃ
ꢀꢁꢂꢃR
ꢀꢁꢁD
ꢀꢁ
ꢂꢃꢄꢅ
ꢀꢁꢂꢃ
ꢀꢀ
ꢀRꢁꢂꢂ
ꢀꢁ
ꢂꢃꢄ
ꢀꢁ
Rꢀ
R2
1MΩ
ꢀꢁ
ꢀꢁ
ꢂꢃꢄꢅ
ꢀꢁD
ꢂꢂꢃꢄ
ꢅꢆR
Rꢀ
ꢁꢂꢃꢄ
Rꢀ
ꢀꢁ.ꢂꢃ
ꢀꢁꢂꢃ ꢄꢅꢂꢆ
ꢇꢂꢈꢉ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
ꢀꢁꢂ ꢃꢄꢀꢅꢆꢁꢇꢈꢇꢇꢇꢉꢊ
Ultralow EMI, 5V, 1.5A Step-Down
ꢀꢁ
ꢂꢃꢄD
ꢀꢁ
ꢂ.ꢃꢄꢅ
ꢀ
ꢀꢁ
ꢀ.ꢁꢂ ꢃꢄ ꢅꢆꢂ
ꢀ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢂꢂꢃꢄ
ꢀꢁ
ꢂ.ꢁꢃꢄ
ꢀꢁ
ꢂ.ꢃꢄꢅ
ꢀꢁ
ꢂ.ꢁꢃꢄ
ꢀꢁ
ꢂꢂꢃꢄ
ꢀꢁ
ꢂ.ꢃꢄꢅ
ꢀꢁꢂꢃꢄ
ꢀ
ꢀꢁꢂ
ꢀꢁꢂꢃ
ꢀꢁ
ꢀꢁ
Rꢀ
ꢁꢂꢂꢃ
ꢀꢁꢂꢃꢄ
ꢀꢁꢂꢃꢄꢅ
ꢆꢇꢈꢉꢊꢋ
ꢀꢁꢂꢃR
ꢀꢁ
ꢀꢁꢁD
ꢀꢁ
ꢂꢃꢄꢅ
ꢀꢁꢂꢃ
ꢀꢀ
ꢀꢁ
ꢂꢃꢄ
ꢀRꢁꢂꢂ
ꢀꢁ
Rꢀ
R2
1MΩ
ꢀꢁ
ꢀꢁ
ꢂꢃꢄꢅ
ꢀꢁD
Rꢀ
ꢁꢂꢃꢄ
ꢂꢂꢃꢄ
ꢅꢆR
Rꢀ
ꢀꢀꢁꢂ
ꢀꢁꢂꢃ ꢄꢅꢂꢁ
ꢇꢂꢈꢉ
ꢀ
ꢀ ꢁꢂꢂꢃꢄꢅ
ꢀꢁ
ꢀꢁꢂ ꢀꢃꢂ ꢀꢄꢅ ꢆꢃR ꢇꢁꢈꢉ
ꢀꢊꢅ ꢉꢋꢌꢆꢍꢋꢋꢎ
ꢏꢇꢅ ꢎꢌꢌꢉꢇꢋꢁꢐꢁꢁꢋ
ꢏꢁꢅ ꢑꢒꢓꢁꢇꢁꢔꢕꢌꢇꢈꢇꢐꢖ
5V, 2MHz Step-Down
ꢀ
ꢀ
ꢀꢁꢂ
ꢀꢁ
ꢀꢁ
ꢀꢁ
ꢂ.ꢃꢄꢅ
ꢀ.ꢁꢂ ꢃꢄ ꢅꢆꢂ
ꢀꢁ
ꢂ.ꢁꢃꢄ
ꢀꢁ
ꢀꢁꢂꢃꢄ
ꢀ
ꢀꢁꢂ
ꢂ.ꢃꢄꢅ
ꢆꢃR
ꢀꢁꢂꢃ
ꢀꢁ
ꢀꢁ
ꢀꢁꢂꢃꢄ
Rꢀ
ꢇꢁꢈꢉ
ꢀꢁꢂꢃꢄꢅꢆꢇ
ꢁꢂꢂꢃ
ꢀꢁꢂꢃR
ꢀꢁꢁD
ꢀꢁ
ꢀꢁꢂꢃ
ꢀꢀ
ꢀRꢁꢂꢂ
ꢀꢁ
ꢂꢃꢄ
ꢀꢁ
Rꢀ
ꢀꢁ
ꢀꢁ
ꢂꢃꢄꢅ
ꢀꢁD
ꢂꢂꢃꢄ
ꢅꢆR
Rꢀ
ꢀꢁ.ꢂꢃ
ꢀꢁꢂꢃ ꢄꢅꢂꢃ
ꢇꢂꢈꢉ
ꢀꢁꢂ ꢃꢄꢀꢅꢆꢇꢆꢈꢅꢉꢇꢊꢋ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
Rev. D
20
For more information www.analog.com
LT8607/LT8607B
PACKAGE DESCRIPTION
MSE Package
10-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev I)
BOTTOM VIEW OF
EXPOSED PAD OPTION
1.88
(.074)
1.88 ±0.102
(.074 ±.004)
0.889 ±0.127
(.035 ±.005)
1
0.29
REF
1.68
(.066)
0.05 REF
5.10
(.201)
MIN
1.68 ±0.102
3.20 – 3.45
DETAIL “B”
(.066 ±.004) (.126 – .136)
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
10
NO MEASUREMENT PURPOSE
0.50
(.0197)
BSC
0.305 ± 0.038
(.0120 ±.0015)
TYP
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
0.497 ±0.076
(.0196 ±.003)
10 9
8
7 6
RECOMMENDED SOLDER PAD LAYOUT
REF
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
DETAIL “A”
0° – 6° TYP
0.254
(.010)
1
2
3
4 5
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ±0.0508
(.004 ±.002)
0.50
(.0197)
BSC
MSOP (MSE) 0213 REV I
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
Rev. D
21
For more information www.analog.com
LT8607/LT8607B
PACKAGE DESCRIPTION
DC8 Package
8-Lead Plastic DFN (2mm × 2mm)
ꢀReꢁeꢂeꢃꢄe ꢅꢆꢇ Dꢈꢉ ꢊ ꢋꢌꢍꢋꢎꢍꢏꢐꢑꢐ Rev ꢒꢓ
Exposed Pad Variation AA
1.8 REF
0.23
REF
0.90
REF
0.85 ±0.05
2.60 ±0.05
PACKAGE
OUTLINE
0.335 REF
0.25 ±0.05
0.45 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
2.00 SQ ±0.05
1.8 REF
5
8
0.23
REF
0.55 ±0.05
0.335
REF
2.00 ±0.05
(4 SIDES)
PIN 1 NOTCH
R = 0.15
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
(DC8MA) DFN 0113 REV Ø
4
1
0.23 ±0.05
0.45 BSC
0.75 ±0.05
0.200 REF
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
Rev. D
22
For more information www.analog.com
LT8607/LT8607B
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
06/17 Added DFN package option.
1, 2
2, 3
6
Clarified electrical parameters for DFN package option.
Clarified graphs for MSOP package option.
Clarified Pins Functions for DFN package option.
Clarified Operation to include DFN option.
Clarified Applications last paragraph and Figure 2 to include DFN option.
Clarified Applications section to include DFN operation.
Added DFN Package Description.
8
9
10
14, 15
20
B
C
11/17 Added H-grade option
2, 3
Clarified Oscillator Frequency R conditions
3
4
T
Clarified efficiency graph
Clarified Block Diagram
9
16
18, 22
Added Figure 5
Clarified Typical Applications for MSOP package option
11/18 Added B version
All
1
Added table to clarify versions
Modified text in Description to add DFN functionality
Added B version to Order Information
1
2
Clarified Minimum On-Time Conditions
Clarified efficiency graphs
3
4
Clarified Burst Frequency vs Output Current graph
Clarified Minimum Load to Full Frequency and Frequency Foldback graphs
Clarified Pin Functions on SYNC and TR/SS
Clarified Operation third paragraph
5
6
8
9
Clarified last paragraph to include DFN B version and Figures 1, 3
Clarified Applications to include DFN B version
Clarified PCB Layout
10
15
16
D
01/21 Added AEC-Q100 Qualified for Automotive Applications
Added Fixed 5V Output
1
1
Replaced table
1
Added new Pin Configuration
Fixed ordering information for DC package
Added #W Materials
2
2
3
Updated EC Table
3-4
5-6
9
Added V
Added V
Voltage and Load Supply graphs
comment for LT8607-5
OUT
OUT
Added FB comment for LT8607/LT8607B only
Added TR/SS
9
9
10
11
13
16
20
Updated Block diagram
Updated Operations
Updated Applications information
Output Voltage Tracking and Soft-Start (MSOP Only)
Added 5V, 2MHz Step-Down Typical Application
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license Fisogrrmanoterdebiynfimorpmlicaattiioonnowrwotwhe.rawniaselougn.dceormany patent or patent rights of Analog Devices.
23
LT8607/LT8607B
TYPICAL APPLICATION
5V and 3.3V with Ratio Tracking
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ꢂ.ꢃꢄꢅ
ꢀ
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ꢀꢁꢂ
ꢀꢁ
ꢀ.ꢁꢂ
ꢀꢁꢂꢃ
Rꢀ
ꢀꢁꢂꢃꢄ
ꢀꢁꢂꢃꢄꢅ
ꢆꢇꢈꢉꢊꢋ
ꢁꢂꢂꢃ
ꢀꢁꢂꢃR
ꢀꢁꢁD
ꢀꢁꢂꢃ
ꢀꢁ
ꢀꢀ
ꢀꢁ
ꢂꢃꢄꢅ
ꢀꢁ
ꢂꢃꢄ
ꢀRꢁꢂꢂ
ꢀꢁ
ꢀꢁ
ꢂꢃꢄꢅ
R2
1MΩ
Rꢀ
ꢀꢁD
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Rꢀ
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Rꢀ
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ꢀꢁꢂꢃ
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ꢁꢂꢂꢃ
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Rꢀ
ꢁꢂ.ꢃꢄ
ꢀꢁꢂꢃR
ꢀꢁꢁD
ꢀꢁꢂꢃ
ꢀꢁ
ꢀꢀ
ꢀꢁꢁ
ꢁꢂꢃꢄ
ꢀRꢁꢂꢂ
Rꢀꢁ
ꢂꢂꢃ
ꢀꢁ
Rꢀ
R6
1MΩ
ꢀꢁD
ꢀꢁꢂ
ꢃꢃꢄꢅ
Rꢀ
ꢁꢂꢃꢄ
Rꢀ
ꢁꢂ.ꢃꢄ
ꢀꢁꢂ
ꢁꢃꢄ
ꢀꢁꢂꢃ ꢄꢅꢂꢃ
ꢀ
ꢀ ꢁꢂꢃꢄ
ꢀꢁ
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ꢋꢁꢌ ꢋꢍꢌ ꢋꢎꢌ ꢋꢇꢆꢂ ꢃꢏR ꢇꢁꢆꢐ
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Rev. D
01/21
www.analog.com
ANALOG DEVICES, INC. 2017-2021
24
相关型号:
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LT8606HDC#TRMPBF
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LT8606HDC#TRPBF
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