HMC1099PM5ETR [ADI]
HMC1099PM5ETR;型号: | HMC1099PM5ETR |
厂家: | ADI |
描述: | HMC1099PM5ETR 高功率电源 射频 微波 |
文件: | 总18页 (文件大小:330K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
10 W (40 dBm), 0.01 GHz to 1.1 GHz,
GaN Power Amplifier
Data Sheet
HMC1099PM5E
FEATURES
FUNCTIONAL BLOCK DIAGRAM
High small signal gain: 20 dB typical
POUT: 41.5 dBm typical at PIN = 27 dBm
High PAE: 60% typical at PIN = 27 dBm
Instantaneous bandwidth: 0.01 GHz to 1.1 GHz across all
frequencies
Supply voltage: VDD = 28 V at a quiescent current of 100 mA
Internal prematching
1
2
3
4
5
6
7
8
GND
NIC
NIC
24 GND
23 NIC
22 NIC
HMC1099PM5E
RFOUT/V
RFOUT/V
NIC
21
20
19
18
RFIN/V
DD
DD
GG
RFIN/V
GG
NIC
NIC
NIC
Simple and compact external tuning for optimal
performance
17 GND
GND
PACKAGE
BASE
5 mm × 5 mm, 32-lead LFCSP
APPLICATIONS
NIC = NO INTERNAL CONNECTION. THESE PINS
ARE NOT CONNECTED INTERNALLY.
Extended battery operation for public mobile radios
Power amplifier stage for wireless infrastructures
Test and measurement equipment
Figure 1.
Commercial and military radars
General-purpose transmitter amplification
GENERAL DESCRIPTION
The HMC1099PM5E is a gallium nitride (GaN), broadband
power amplifier that delivers 10 W (40 dBm) with up to 60%
power added efficiency (PAE) across an instantaneous
bandwidth of 0.01 GHz to 1.1 GHz, at an input power (PIN) of
27 dBm. The gain flatness is between 0.5 dB to 2 dB typical at
small signal levels.
The HMC1099PM5E is ideal for pulsed or continuous wave
(CW) applications, such as wireless infrastructure, radars,
public mobile radios, and general-purpose amplification.
The HMC1099PM5E amplifier is externally tuned using low
cost, surface-mount components and is available in a compact
LFCSP.
Multifunction pin names may be referenced by their relevant
function only.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Technical Support
©2018 Analog Devices, Inc. All rights reserved.
www.analog.com
HMC1099PM5E
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
ESD Caution...................................................................................5
Pin Configuration and Function Descriptions..............................6
Interface Schematics .....................................................................6
Typical Performance Characteristics ..............................................7
Theory of Operation ...................................................................... 15
Applications Information.............................................................. 16
Evaluation PCB........................................................................... 17
Outline Dimensions....................................................................... 18
Ordering Guide .......................................................................... 18
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Specifications............................................................... 3
Total Quiescent Current by VDD ................................................. 4
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
REVISION HISTORY
9/2018—Rev. A to Rev. B
Change to Storage Temperature Range Parameter, Table 5 ........ 5
8/2018—Rev. 0 to Rev. A
Changes to Figure 34...................................................................... 11
Changes to Figure 35 and Figure 36............................................. 12
8/2018—Revision 0: Initial Version
Rev. B | Page 2 of 18
Data Sheet
HMC1099PM5E
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
TA = 25°C, VDD = 28 V, quiescent current (IDDQ) = 100 mA, and frequency range = 0.01 GHz to 0.4 GHz unless otherwise noted.
Table 1.
Parameter
FREQUENCY RANGE
GAIN
Symbol Min Typ Max Unit Test Conditions/Comments
0.01
0.4
GHz
Small Signal Gain
Gain Flatness
RETURN LOSS
Input
18
20
2
dB
dB
12
15
dB
dB
Output
POWER
Output Power
POUT
PAE
40
41
55
60
50
8
dBm Input power (PIN) = 25 dBm
dBm PIN = 27 dBm
Power Added Efficiency
%
%
PIN = 25 dBm
PIN = 27 dBm
OUTPUT THIRD-ORDER INTERCEPT OIP3
NOISE FIGURE
dBm POUT per tone = 30 dBm
dB
V
SUPPLY VOLTAGE
VDD
IDDQ
24
28
100
30
QUIESCENT CURRENT
mA
Adjust the gate bias control voltage (VGG) from −5 V to 0 V to
achieve IDDQ = 100 mA, VGG = −2.9 V typical to achieve IDDQ = 100 mA
TA = 25°C, VDD = 28 V, IDDQ = 100 mA, and frequency range = 0.4 GHz to 0.8 GHz unless otherwise noted.
Table 2.
Parameter
FREQUENCY RANGE
GAIN
Symbol
Min Typ
Max Unit Test Conditions/Comments
0.4
0.8
GHz
Small Signal Gain
Gain Flatness
RETURN LOSS
Input
16.5 18
0.5
dB
dB
8
13
dB
dB
Output
POWER
Output Power
POUT
PAE
39
41
45
50
47.5
5
dBm PIN = 25 dBm
dBm PIN = 27 dBm
Power Added Efficiency
%
%
PIN = 25 dBm
PIN = 27 dBm
OUTPUT THIRD-ORDER INTERCEPT
NOISE FIGURE
OIP3
dBm POUT per tone = 30 dBm
dB
V
SUPPLY VOLTAGE
VDD
IDDQ
24
28
30
QUIESCENT CURRENT
100
mA
Adjust VGG from −5 V to 0 V to achieve IDDQ = 100 mA,
VGG = −2.9 V typical to achieve IDDQ = 100 mA
Rev. B | Page 3 of 18
HMC1099PM5E
Data Sheet
TA = 25°C, VDD = 28 V, IDDQ = 100 mA, and frequency range = 0.8 GHz to 1.1 GHz unless otherwise noted.
Table 3.
Parameter
FREQUENCY RANGE
GAIN
Symbol
Min Typ
Max Unit Test Conditions/Comments
0.8
1.1
GHz
Small Signal Gain
Gain Flatness
RETURN LOSS
Input
16.5 18
1
dB
dB
12
15
dB
dB
Output
POWER
Output Power
POUT
PAE
40
41.5
55
60
45
5
dBm PIN = 25 dBm
dBm PIN = 27 dBm
Power Added Efficiency
%
%
PIN = 25 dBm
PIN = 27 dBm
OUTPUT THIRD-ORDER INTERCEPT
NOISE FIGURE
OIP3
dBm POUT per tone = 30 dBm
dB
V
SUPPLY VOLTAGE
VDD
IDDQ
24
28
30
QUIESCENT CURRENT
100
mA
Adjust VGG from −5 V to 0 V to achieve IDDQ = 100 mA,
GG = −2.9 V typical to achieve IDDQ = 100 mA
V
TOTAL QUIESCENT CURRENT BY VDD
Table 4.
Parameter
Symbol
Min Typ Max Unit Test Conditions/Comments
Adjust VGG between −5 V and 0 V to achieve IDDQ = 100 mA typical
VDD = 24 V
QUIESCENT CURRENT
IDDQ
100
100
100
100
mA
mA
mA
mA
VDD = 26 V
VDD = 28 V
VDD = 30 V
Rev. B | Page 4 of 18
Data Sheet
HMC1099PM5E
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 5.
Parameter1
Rating
32 V
−8 V to 0 V
33 dBm
6:1
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Supply Voltage (VDD)
Gate Bias Voltage (VGG)
Radio Frequency Input Power (RFIN)
Voltage Standing Wave Ratio (VSWR)2
Channel Temperature
Peak Reflow Temperature Moisture
Sensitivity Level 3 (MSL3)3
θJC is the junction to case thermal resistance.
Table 6. Thermal Resistance
Package Type
CG-32-21
225°C
260°C
θJC
Unit
6.6
°C/W
Continuous Power Dissipation, PDISS (TA = 85°C,
Derate 151.5 mW/°C Above 85°C)
Storage Temperature Range
Operating Temperature Range
Electrostatic Discharge (ESD) Sensitivity
Human Body Model
21.21 W
1 Thermal resistance (θJC) was determined by simulation under the following
conditions: the heat transfer is due solely to thermal conduction from the
channel, through the ground paddle, to the PCB, and the ground paddle is
held constant at the operating temperature of 85°C.
−65°C to +150°C
−40°C to +85°C
ESD CAUTION
Class 1B,
passed 500 V
1 When referring to a single function of a multifunction pin in the parameters,
only the portion of the pin name that is relevant to the absolute maximum
rating is listed. For full pin names of multifunction pins, refer to the Pin
Configuration and Function Descriptions section.
2 Restricted by maximum power dissipation.
3 See the Ordering Guide for additional information.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. B | Page 5 of 18
HMC1099PM5E
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
GND
24
GND
NIC
NIC
23 NIC
22 NIC
21
HMC1099PM5E
RFOUT/V
RFIN/V
DD
DD
GG
TOP VIEW
20 RFOUT/V
RFIN/V
GG
(Not to Scale)
NIC
NIC
GND
19
18
17
NIC
NIC
GND
NOTES
1. EXPOSED PAD. THE EXPOSED PAD MUST
BE CONNECTED TO RF AND DC GROUND.
2. NO INTERNAL CONNECTION. THESE PINS
ARE NOT CONNECTED INTERNALLY. HOWEVER,
ALL DATA WAS MEASURED WITH THESE PINS
CONNECTED TO RF AND DC GROUND EXTERNALLY.
Figure 2. Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
Mnemonic Description
1, 8, 9, 16, 17, 24, 25, 32
GND
Ground. These pins must be connected to RF and dc ground. See Figure 3 for the GND interface
schematic.
2, 3, 6, 7, 10 to 15, 18,
19, 22, 23, 26 to 31
NIC
No Internal Connection. These pins are not connected internally. However, all data was measured
with these pins connected to RF and dc ground externally.
4, 5
RFIN/VGG
RF Input/Gate Bias Control Voltage. This pin is a multifunction pin. The RFIN/VGG pin is dc-coupled
with internal prematching and requires external matching to 50 Ω, as shown in Figure 49. See Figure 4
for the RFIN/VGG interface schematic.
20, 21
RFOUT/VDD RF Output/Supply Voltage. This pin is a multifunction pin. The RFOUT/VDD pin is dc-coupled and requires
external matching to 50 Ω, as shown in Figure 49. See Figure 4 for the RFOUT/VDD interface schematic.
EPAD
Exposed Pad. The exposed pad must be connected to RF and dc ground.
INTERFACE SCHEMATICS
RFOUT/V
DD
GND
RFIN/V
GG
Figure 3. GND Interface
Figure 4. RFIN/VGG and RFOUT/VDD Interface
Rev. B | Page 6 of 18
Data Sheet
HMC1099PM5E
TYPICAL PERFORMANCE CHARACTERISTICS
25
25
23
21
19
17
15
13
11
9
+85°C
+25°C
–40°C
20
15
10
INPUT RETURN LOSS
OUTPUT RETURN LOSS
GAIN
05
0
–5
–10
–15
–20
7
5
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0
0.2
0.4
0.6
0.8
1.0
1.2
1.2
1.2
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 5. Response vs. Frequency, Broadband Gain and Return Loss
Figure 8. Gain vs. Frequency at Various Temperatures
25
25
23
21
19
17
15
13
11
9
30V
23
21
19
17
15
13
11
9
28V
26V
24V
50mA
100mA
150mA
200mA
250mA
7
7
5
5
0
0.2
0.4
0.6
0.8
1.0
1.2
0
0.2
0.4
0.6
0.8
1.0
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 6. Gain vs. Frequency at Various Supply Voltages
Figure 9. Gain vs. Frequency at Various Quiescent Currents
0
–5
0
+85°C
+25°C
–40°C
30V
28V
26V
24V
–5
–10
–15
–20
–25
–10
–15
–20
–25
0
0.2
0.4
0.6
0.8
1.0
1.2
0
0.2
0.4
0.6
0.8
1.0
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 7. Input Return Loss vs. Frequency at Various Temperatures
Figure 10. Input Return Loss vs. Frequency at Various Supply Voltages
Rev. B | Page 7 of 18
HMC1099PM5E
Data Sheet
0
0
–5
+85°C
+25°C
–40°C
–5
–10
–10
–15
–20
–25
–15
50mA
–20
100mA
150mA
200mA
250mA
–25
0
0.2
0.4
0.6
0.8
1.0
1.2
0
0.2
0.4
0.6
0.8
1.0
1.2
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 11. Input Return Loss vs. Frequency at Various Quiescent Currents
Figure 14. Output Return Loss vs. Frequency at Various Temperatures
0
0
50mA
30V
28V
26V
100mA
150mA
200mA
250mA
24V
–5
–10
–15
–20
–25
–5
–10
–15
–20
–25
0
0.2
0.4
0.6
0.8
1.0
1.2
0
0.2
0.4
0.6
0.8
1.0
1.2
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 12. Output Return Loss vs. Frequency at Various Supply Voltages
Figure 15. Output Return Loss vs. Frequency at Various Quiescent Currents
44
42
40
38
36
34
44
30V
28V
26V
24V
42
40
38
36
34
32
30
32
30
+85°C
+25°C
–40°C
0
0.2
0.4
0.6
0.8
1.0
1.2
0
0.2
0.4
0.6
0.8
1.0
1.2
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 13. Output Power vs. Frequency at Various Temperatures,
IN = 25 dBm
Figure 16. Output Power vs. Frequency at Various Supply Voltages,
IN = 25 dBm
P
P
Rev. B | Page 8 of 18
Data Sheet
HMC1099PM5E
44
42
40
38
36
34
44
42
40
38
36
34
32
30
50mA
100mA
150mA
200mA
250mA
+85°C
+25°C
–40°C
32
30
0
0.2
0.4
0.6
0.8
1.0
1.2
0
0.2
0.4
0.6
0.8
1.0
1.2
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 17. Output Power vs. Frequency at Various Quiescent Currents,
PIN = 25 dBm
Figure 20. Output Power vs. Frequency at Various Temperatures,
PIN = 27 dBm
44
42
40
38
36
44
42
40
38
36
34
34
50mA
30V
100mA
28V
26V
24V
32
30
32
30
150mA
200mA
250mA
0
0.2
0.4
0.6
0.8
1.0
1.2
0
0.2
0.4
0.6
0.8
1.0
1.2
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 18. Output Power vs. Frequency at Various Supply Voltages,
PIN = 27 dBm
Figure 21. Output Power vs. Frequency at Various Quiescent Currents,
PIN = 27 dBm
80
70
60
50
40
30
80
70
60
50
40
30
20
20
+85°C
+85°C
10
10
+25°C
+25°C
–40°C
–40°C
0
0
0
0.2
0.4
0.6
0.8
1.0
1.2
0
0.2
0.4
0.6
0.8
1.0
1.2
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 19. PAE vs. Frequency at Various Temperatures, PIN = 25 dBm
Figure 22. PAE vs. Frequency at Various Temperatures,
IN = 27 dBm
P
Rev. B | Page 9 of 18
HMC1099PM5E
Data Sheet
48
44
40
36
90
80
70
60
50
40
30
20
10
0
32
15dBm
17dBm
28
19dBm
21dBm
23dBm
25dBm
27dBm
30dBm
15dBm
17dBm
19dBm
21dBm
23dBm
25dBm
27dBm
30dBm
24
20
0
0.2
0.4
0.6
0.8
1.0
1.2
0
0.2
0.4
0.6
0.8
1.0
1.2
1.2
1.2
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 23. Output Power vs. Frequency at Various Input Powers
Figure 26. PAE vs. Frequency at Various Input Powers
1200
60
55
50
45
40
35
30
15dBm
17dBm
19dBm
21dBm
23dBm
25dBm
27dBm
30dBm
+85°C
+25°C
–40°C
1000
800
600
400
200
0
0
0.2
0.4
0.6
0.8
1.0
1.2
0
0.2
0.4
0.6
0.8
1.0
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 24. Supply Current (IDD) vs. Frequency at Various Input Powers
Figure 27. OIP3 vs. Frequency at Various Temperatures,
POUT per Tone = 30 dBm
60
60
55
50
45
40
35
30
30V
28V
26V
55
24V
50
45
40
35
30
50mA
100mA
150mA
200mA
250mA
0
0.2
0.4
0.6
0.8
1.0
1.2
0
0.2
0.4
0.6
0.8
1.0
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 25. OIP3 vs. Frequency at Various Supply Voltages,
OUT per Tone = 30 dBm
Figure 28. OIP3 vs. Frequency at Various Quiescent Currents,
OUT per Tone = 30 dBm
P
P
Rev. B | Page 10 of 18
Data Sheet
HMC1099PM5E
65
60
55
50
45
40
35
30
25
20
60
55
50
45
40
35
0.02GHz
0.1GHz
0.4GHz
1.0GHz
1.1GHz
20dBm
22dBm
24dBm
26dBm
28dBm
30dBm
32dBm
30
25
20
10
12
14
16
18
20
22
24
26
28
30
32
0
0.2
0.4
0.6
0.8
1.0
1.2
P
PER TONE (dBm)
FREQUENCY (GHz)
OUT
Figure 29. OIP3 vs. Frequency at Various POUT per Tone
Figure 32. IMD3 vs. POUT per Tone,
VDD = 24 V
65
60
55
50
45
40
35
30
25
20
65
60
55
50
45
40
35
30
25
20
0.02GHz
0.1GHz
0.4GHz
1.0GHz
1.1GHz
0.02GHz
0.1GHz
0.4GHz
1.0GHz
1.1GHz
10
12
14
16
18
20
22
24
26
28
30
32
10
12
14
16
18
20
22
24
26
28
30
32
P
PER TONE (dBm)
P
PER TONE (dBm)
OUT
OUT
Figure 30. Output Third-Order Intermodulation (IMD3) vs. POUT per Tone,
DD = 26 V
Figure 33. IMD3 vs. POUT per Tone,
VDD = 28 V
V
65
60
55
50
45
40
35
30
25
20
90
80
70
60
50
40
30
20
10
0
900
0.02GHz
0.1GHz
0.4GHz
1.0GHz
1.1GHz
P
OUT
GAIN
800
700
600
500
400
300
200
100
0
PAE
I
DD
10
12
14
16
18
20
22
24
26
28
30
32
0
2
4
6
8
10 12 14 16 18 20 22 24 26 28 30
INPUT POWER (dBm)
P
PER TONE (dBm)
OUT
Figure 31. IMD3 vs. POUT per Tone,
VDD = 30 V
Figure 34. Output Power, Gain, PAE, and IDD vs. Input Power at 0.02 GHz
Rev. B | Page 11 of 18
HMC1099PM5E
Data Sheet
70
840
720
600
480
360
240
120
0
80
70
60
50
40
30
20
10
0
800
700
600
500
400
300
200
100
0
P
OUT
OUTPUT POWER
GAIN
GAIN
60
50
40
30
20
10
0
PAE
PAE
I
DD
I
DD
0
2
4
6
8
10 12 14 16 18 20 22 24 26 28 30
INPUT POWER (dBm)
0
2
4
6
8
10 12 14 16 18 20 22 24 26 28 30
INPUT POWER (dBm)
Figure 38. Output Power, Gain, PAE, and IDD vs. Input Power at 0.4 GHz
Figure 35. Output Power, Gain, PAE, and IDD vs. Input Power at 0.1 GHz
35
30
25
20
15
10
80
70
60
50
40
30
20
10
0
600
525
450
375
300
225
150
75
P
OUT
GAIN
PAE
I
DD
5
0
+85°C
+25°C
–40°C
0
0
2
4
6
8
10 12 14 16 18 20 22 24 26 28 30
INPUT POWER (dBm)
0
0.2
0.4
0.6
0.8
1.0
1.2
FREQUENCY (GHz)
Figure 36. Output Power, Gain, PAE, and IDD vs. Input Power at 1.1 GHz
Figure 39. Second Harmonic vs. Frequency at Various Temperatures,
PIN = 15 dBm
35
35
30
25
20
15
10
30V
28V
26V
24V
30
25
20
15
10
5
50mA
100mA
150mA
200mA
250mA
5
0
0
0
0.2
0.4
0.6
0.8
1.0
1.2
0
0.2
0.4
0.6
0.8
1.0
1.2
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 37. Second Harmonic vs. Frequency at Various Supply Voltages,
PIN = 15 dBm
Figure 40. Second Harmonic vs. Frequency at Various Quiescent Currents,
PIN = 15 dBm
Rev. B | Page 12 of 18
Data Sheet
HMC1099PM5E
35
30
25
20
15
10
5
0
–10
–20
–30
–40
–50
–60
–70
+85°C
+25°C
–40°C
15dBm
17dBm
19dBm
21dBm
23dBm
25dBm
27dBm
30dBm
0
0
0.2
0.4
0.6
0.8
1.0
1.2
0
0.2
0.4
0.6
0.8
1.0
1.2
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 41. Second Harmonic vs. Frequency at Various Input Powers
Figure 44. Reverse Isolation vs. Frequency at Various Temperatures
12
10
8
24
20
16
12
8
6
4
2
4
+85°C
+25°C
–40°C
+85°C
+25°C
–40°C
0
0
0
0.2
0.4
0.6
0.8
1.0
1.2
0
20
40
60
80
100
FREQUENCY (GHz)
FREQUENCY (MHz)
Figure 42. Noise Figure vs. Frequency at Various Temperatures
Figure 45. Noise Figure vs. Frequency at Various Temperatures,
Low Frequency
12
12
10
8
30V
28V
26V
10
24V
8
6
4
2
0
6
4
50mA
100mA
150mA
200mA
250mA
2
0
0
0.2
0.4
0.6
0.8
1.0
1.2
0
0.2
0.4
0.6
0.8
1.0
1.2
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 43. Noise Figure vs. Frequency at Various Supply Voltages
Figure 46. Noise Figure vs. Frequency at Various Quiescent Currents
Rev. B | Page 13 of 18
HMC1099PM5E
Data Sheet
24
22
20
300
250
200
150
100
50
0.01GHz
18
0.1GHz
0.4GHz
16
0.8GHz
1.1GHz
14
MAXIMUM P
AT 85°C
DISS
12
10
8
6
4
0
2
–50
–3.5
0
–3.4
–3.3
–3.2
–3.1
(V)
–3.0
–2.9
–2.8
–2.7
0
5
10
15
20
25
30
V
INPUT POWER (dBm)
GG
Figure 48. IDD vs. VGG at VDD = 28 V, Representative of a Typical Device
Figure 47. Power Dissipation vs. Input Power at Various Frequencies,
TA = 85°C
Rev. B | Page 14 of 18
Data Sheet
HMC1099PM5E
THEORY OF OPERATION
The HMC1099PM5E is a 10 W (40 dBm), gallium nitride (GaN),
power amplifier that consists of a single gain stage that
effectively operates like a single field effect transistor (FET). The
device is internally prematched so that a simple, external
matching network optimizes the performance across the entire
operating frequency range. The recommended dc bias
conditions put the device in Class AB operation, resulting in
high output power (41.5 dBm typical at PIN = 27 dBm) at
improved levels of power efficiency (60% typical at PIN = 27 dBm).
Rev. B | Page 15 of 18
HMC1099PM5E
Data Sheet
APPLICATIONS INFORMATION
The supply voltage is applied through the RFOUT/VDD pin, and
the gate bias voltage is applied through the RFIN/VGG pin. For
operation of a single application circuit across the entire
frequency range, it is recommended to use the external matching
components specified in the typical application circuit (L1, C1, L3,
and C8) shown in Figure 49. If operation is only required across
a narrower frequency range, performance may be optimized
additionally through the implementation of alternate matching
networks. Capacitive bypassing of VDD and VGG is recommended.
The recommended power-down bias sequence follows:
1. Turn off the RF signal.
2. Set VGG to −8 V to pinch off the drain current.
3. Set VDD t o 0 V.
4. Set VGG t o 0 V.
All measurements for this device were taken using the typical
application circuit, configured as shown in the typical application
circuit (see Figure 49). The bias conditions shown in the
electrical specifications table (see Table 1 to Table 3) are the
recommended operating points to optimize the overall
performance. Unless otherwise noted, the data shown was taken
using the recommended bias conditions. Operation of the
HMC1099PM5E under other bias conditions may provide
performance that differs from what is shown in the Typical
Performance Characteristics section.
The recommended power-up bias sequence follows:
1. Connect the power supply ground to the circuit ground.
2. Set VGG to −8 V to pinch off the drain current.
3. Set VDD to 28 V to pinch off the drain current.
4. Adjust VGG between −3 V and −2.5 V until a quiescent
current of IDDQ = 100 mA is obtained.
5. Apply the RF signal.
The evaluation PCB provides the HMC1099PM5E in its typical
application circuit, allowing easy operation using standard dc
power supplies and 50 Ω RF test equipment.
V
DD
V
GG
C6
10µF
C9
10µF
C7
10µF
C10
10µF
32 31 30 29 28 27 26 25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
C4
C5
2200pF
2200pF
HMC1099PM5E
R1
L2
0.9µH
C2
68.1Ω
C3
2200pF
2200pF
RFIN
RFOUT
L3
5.6nH
L1
5.4nH
C8
3.3pF
C1
3.3pF
9
10 11 12 13 14 15 16
Figure 49. Typical Application Circuit
Rev. B | Page 16 of 18
Data Sheet
HMC1099PM5E
sufficient number of via holes to connect the top and bottom
ground planes. The evaluation circuit board shown in Figure 50
is available from Analog Devices, Inc., upon request.
EVALUATION PCB
Use RF circuit design techniques for the PCB used in the device.
Provide a 50 Ω impedance for the signal lines and directly
connect the package ground leads and exposed pad to the
ground plane, similar to that shown in Figure 50. Use a
Figure 50. Evaluation PCB
Table 8. Bill of Materials for Evaluation PCB EV1HMC1099PM5
Item
Description
J1
DC pin
J2, J3
J4
SMA connectors, 25-146-1000-92
Preform jumper
C1, C8
3.3 pF capacitors, 0603 package
C2 to C5
C6, C7, C9, C10
2200 pF capacitors, 0603 package
10 µF capacitors, 1210 package
L1
5.4 nH inductor, 0906 package
L2
0.9 µH inductor, 1008 package
L3
5.6 nH inductor, 0402 package
R1
68.1 Ω resistor, 0603 package
U1
HMC1099PM5E amplifier
Heat Sink
PCB
Used for thermal transfer from the HMC1099PM5E amplifier
EV1HMC1099PM5 PCB, circuit board material: Rogers 4350 or Arlon 25FR
Rev. B | Page 17 of 18
HMC1099PM5E
Data Sheet
OUTLINE DIMENSIONS
DETAIL A
(JEDEC 95)
5.10
5.00 SQ
4.90
0.30
0.25
0.20
PIN 1
INDICATOR
PIN 1
INDICATOR AREA OPTIONS
(SEE DETAIL A)
25
24
32
1
0.50
BSC
3.20
3.10 SQ
3.00
EXPOSED
PAD
17
16
8
9
0.45
0.40
0.35
TOP VIEW
SIDE VIEW
BOTTOM VIEW
3.50 REF
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
1.35
1.25
1.15
0.60 REF
0.40
0.050 MAX
0.035 NOM
SECTION OF THIS DATA SHEET.
COPLANARITY
SEATING
PLANE
0.08
0.203 REF
Figure 51. 32-Lead Lead Frame Chip Scale Package, Premolded Cavity [LFCSP_CAV]
5 mm × 5 mm Body and 1.25 mm Package Height
(CG-32-2)
Dimensions shown in millimeters
ORDERING GUIDE
Temperature
Range
MSL
Package
Option
Model1, 2
Rating3
MSL3
Description4
HMC1099PM5E
−40°C to +85°C
32-Lead Lead Frame Chip Scale Package, Premolded Cavity [LFCSP_CAV]
32-Lead Lead Frame Chip Scale Package, Premolded Cavity [LFCSP_CAV]
Evaluation Board
CG-32-2
CG-32-2
HMC1099PM5ETR −40°C to +85°C
EV1HMC1099PM5
MSL3
1 All models are RoHS compliant.
2 When ordering the evaluation board only, reference the model number, EV1HMC1099PM5.
3 See the Absolute Maximum Ratings section for additional information.
4 The lead finish of the HMC1099PM5E and the HMC1099PM5ETR are nickel palladium gold (NiPdAu).
©2018 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D16826-0-9/18(B)
Rev. B | Page 18 of 18
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